The Fault Detection, Localization, and Tolerant Operation of Modular Multilevel Converters with an Insulated Gate Bipolar Transistor (IGBT) Open Circuit Fault

Abstract

Reliability is one of the critical issues for a modular multilevel converter (MMC) since it consists of a large number of series-connected power electronics submodules (SMs). In this paper, a complete control strategy including fault detection, localization, and tolerant operation is proposed for the MMC under an insulated gate bipolar transistor (IGBT) open circuit fault. According to the output characteristics of the SM with the open-circuit fault of IGBT, a fault detection method based on the circulating current and output current observation is used. In order to further precisely locate the position of the faulty SM, a fault localization method based on the SM capacitor voltage observation is developed. After the faulty SM is isolated, the continuous operation of the converter is ensured by adopting the fault-tolerant strategy based on the use of redundant modules. To verify the proposed fault detection, fault localization, and fault-tolerant operation strategies, a 900 kVA MMC system under the conditions of an IGBT open circuit is developed in the Matlab/Simulink platform. The capabilities of rapid detection, precise positioning, and fault-tolerant operation of the investigated detection and control algorithms are also demonstrated.

1. Introduction

Owing to the superior characteristics of the modular design, high efficiency, low harmonic output, and so forth, modular multi-level converters (MMCs) are widely applied in the application of high voltage and power ratings, especially for high-voltage direct current (HVDC) transmission systems [1,2,3]. Usually, the MMCs used for HVDC power transmission systems consist of hundreds of submodules (SMs), each with an SM adopting the half-bridge or full-bridge topology. Each half-bridge topology contains two insulated gate bipolar transistors (IGBTs) and two diodes, while each full-bridge topology is composed of four IGBTs and four diodes. From this point of view, hundreds or even thousands of power electronics devices are included in an MMC, while each power electronics device can be regarded as a potential failure point in the MMC. Thus, the fault-tolerant operation of the MMC is extremely significant.

According to the position of the failure point, the potential failure modes of a converter are categorized as external and internal failures [4]. The external failures usually include AC-side faults and DC-side faults. The common internal failures are IGBT short-circuit and open-circuit faults. The fault-tolerant operations of MMCs under external failures have been extensively investigated [5,6,7,8,9,10,11,12], and the IGBT short-circuit fault detection and protection techniques in terms of the internal failures are relatively mature and have been embedded into commercial gate driver boards. Compared to the IGBT short-circuit fault, the IGBT open-circuit fault is not obvious for quick detection and it results in overcurrent, overvoltage, and waveform distortion problems, leading even to the failure of the whole MMC system. To quickly detect the IGBT open-circuit fault, the sliding mode observer was used to compare the observed states with the measured states for fault detection [13,14,15]. In Reference [16], the Kalman filter was used to optimally estimate the state of an MMC and then detect the fault based on comparisons between the measured states and the estimated states. State observer based and other observer-based fault detection and location methods were developed in References [17,18,19,20], which were used to provide an estimation of the states of an MMC and detect the fault by large difference comparisons. In Reference [17], a fault detection method based on the output current and the circulating current observers and a fault localization method based on the faulty SM capacitor voltage exceeding the set threshold were proposed. However, this method is restricted to the phase-shifted carrier-based pulse width modulation (PWM) strategy and an inevitable and unpredictable delay time for the faulty SM capacitor voltage increasing would affect the fault localization speed. Even worse, all SM capacitor voltages in the same faulty arm would increase simultaneously when the MMC adopts the common carrier lamination modulation strategy with a sort-selection algorithm. In this situation, the fault localization method based on the faulty SM capacitor voltage exceeding the set threshold would make it hard to discriminate the faulty SM from normal SMs. Two fault detection methods named the Clustering Algorithm based method and Calculated Capacitance (CC) based method were proposed in Reference [21], in which the clustering algorithm was used to detect and locate the faulty SMs by identifying the pattern of the 2-D trajectories of the SM characteristic variables, and the CC-based method was based on the nominal SM capacitance calculation and comparison. However, these two methods are complicated and have large computational burdens. The above-mentioned methods are based on measured electrical signals and control strategies. Other solutions are based on hardware change by adding an extra voltage sensor in each arm of the MMC [22], or by rearranging the voltage sensor position to measure the output voltage of submodule [23,24].

After the faulty SM is identified and bypassed, the MMC is supposed to continue operating with fault tolerant schemes. Usually, depending on whether the redundant SMs are put into operation under the normal modes, the redundant modes can be categorized into the cold redundant mode [25,26] and hot redundant mode [27,28]. In the cold redundant mode, the redundant SMs are in the bypass state under normal cases and they are in the operational modes only when faults happen. The biggest disadvantage of this method is that it takes time for the capacitor voltage of the activated SM to increase from zero to the rated value, which results in the variation in the bridge arm voltage. Besides, since the redundant SMs only operate when failures are encountered, the utilization rate of the redundant SMs is greatly reduced, resulting in a relatively high cost. When the hot redundant mode is adopted, the redundant SMs are put into operation in the same way as the normal SMs in the common cases, which avoids the two main issues arising from employing the cold redundant mode.

In this paper, a complete control strategy including the fault detection, localization, and tolerant operation is proposed for the MMC under the insulated gate bipolar transistor (IGBT) open circuit fault. The basic operation principle and characteristics of an MMC are analyzed first. According to the output characteristics of the SM with an IGBT open-circuit fault, a fault detection method based on the circulating current and output current observation is used. Considering the fact that the conventional fault localization method based on the faulty SM capacitor voltage exceeding the set threshold makes it hard to discriminate the faulty SM from the healthy SMs under the carrier lamination modulation strategy with a sort-selection algorithm, an improved fault localization strategy based on capacitor voltage difference observation is proposed. Additionally, a fault-tolerant operation based on the use of redundant SMs is adopted to guarantee the continuous operation of the converter after the bypass of the faulty SM. The proposed fault detection, fault localization, and fault-tolerant operation strategies are validated by applying a 900kVA MMC system under the condition of IGBT open-circuit faults.

The rest of this paper is organized as follows. Section 2 briefly introduces the basic operation principle of MMCs. Section 3 presents the improved method for fault detection, fault localization, and fault-tolerant operation. Section 4 presents the study results and Section 5 draws some conclusions.

2. The Basic Operation Principle of Modular Multilevel Converter

2.1. Basic Topology of Modular Multilevel Converter

The equivalent circuit of an MMC is shown in Figure 1, where each phase consists of the upper and lower arms, with N SMs in each arm. Usually, the half-bridge (b) or full-bridge (c) topology is employed in an SM. V_dc is the DC-bus voltage, L is the arm inductance, C is the SM capacitance, and V_c is the SM voltage. v_pj and v_nj are, respectively, the arm voltages produced by SMs; i_pj and i_nj are the currents in the upper and lower arms; i_j is the AC-side output currents (j = a, b, or c).

As shown in Figure 1b, a half-bridge SM is composed of two IGBTs, two diodes, and a capacitor. When S₁ is turned on, the SM output voltage equals the capacitor voltage. If the arm current i_arm is positive, the SM capacitor charges. On the other hand, if the arm current is negative, the SM capacitor discharges. When S₂ is turned on, the output voltage of SM is 0. Regardless of the direction of the current, the capacitor voltage of SM remains the same. As shown in Figure 1c, a full-bridge SM contains four IGBTs, four diodes, and a capacitor. When S₁ and S₄ are turned on, the SM output voltage is equal to the capacitor voltage. If the arm current i_arm is positive, the SM capacitor charges. If the arm current is negative, the SM capacitor discharges. When S₂ and S₃ are turned on, the SM output voltage is equal to the negative capacitor voltage. If the arm current is positive, the SM capacitor discharges. On the contrary, the SM capacitor charges when the arm current is negative. When S₁ and S₃ or S₂ and S₄ are turned on, the output voltage of SM equals 0, while the SM capacitor voltage stays unchanged. The charging and discharging characteristics of SMs are displayed in

Table 1. The charging and discharging characteristics of the half-bridge submodule.

State	Switch S1	Switch S2	Output Voltage vsm	Capacitor Voltage Vc
1	1	0	Vc	Charging (iarm > 0)
				Discharging (iarm < 0)
2	0	1	0	Unchanged

and

Table 2. The charging and discharging characteristics of the full-bridge submodule.

State	Switch S1	Switch S2	Switch S3	Switch S4	Output Voltage vsm	Capacitor Voltage Vc
1	1	0	0	1	Vc	Charging (iarm > 0)
						Discharging (iarm < 0)
2	0	1	0	1	0	Unchanged
3	1	0	1	0	0	Unchanged
4	0	1	1	0	−Vc	Charging (iarm < 0)
						Discharging (iarm > 0)

.

2.2. Steady-State Operation

Take phase a as an example, as shown in Figure 1a, the bridge arm currents i_pa and i_na can be expressed as follows [29,30,31]:

$$\begin{array}{l}{i}_{pa}=i_{cca}+\frac{i_a}{2}\\ i_{na}=i_{cca}-\frac{i_a}{2}\end{array},$$

(1)

where i_cca is the circulating current in phase a, and it only flows between the upper and lower arms, which does not affect the AC-side output currents.

The arm voltages v_pa and v_na can be expressed as:

$$\begin{array}{l}{v}_{pa}=\frac{V_{dc}}{2}-L\frac{d{i}_{pa}}{dt}-v_a\\ v_{na}=\frac{V_{dc}}{2}-L\frac{d{i}_{na}}{dt}+v_a\end{array},$$

(2)

where v_pa and v_na are, respectively, the voltages produced by the inserted SMs, whose mathematical expressions are given by the following equations:

$$\begin{array}{l}{v}_{pa}={\displaystyle \sum _{i=1}^N{s}_{pai}\times v_{cpai}}\\ v_{na}={\displaystyle \sum _{i=1}^N{s}_{nai}\times v_{cnai}}\end{array},$$

(3)

where s is the switching function of SM.

Therefore, the DC-side and AC-side voltages can be shown as:

$$\begin{array}{l}{V}_{dc}=v_{pa}+v_{na}+2L\frac{d{i}_{cca}}{dt}\\ v_a=\frac{v_{na}-v_{pa}}{2}-L\frac{d{i}_a}{dt}\end{array},$$

(4)

From Equation (4), it can be seen that the circulating current i_cca can be adjusted by controlling the sum of the voltages on the upper and lower arms and that the AC-side currents can be controlled by the difference between the upper and lower arm voltages.

Generally, the ideal output voltage can be expressed as:

$$v_a=m\cos \left({\omega }_{0}t+\varphi \right)\frac{V_{dc}}{2},$$

(5)

where m (0 ≤ m ≤ 1) represents the modulation ratio, ω₀ is the angular speed, and φ is the initial phase angle.

According to Equations (4) and (5), by neglecting the voltage drop on the arm inductor, the ideal voltages of the upper and lower bridge arms can be derived as shown below.

$$\begin{array}{l}{v}_{pa}=\left(1-m\cos \left({\omega }_{0}t+\varphi \right)\right)\frac{V_{dc}}{2}\\ v_{na}=\left(1+m\cos \left({\omega }_{0}t+\varphi \right)\right)\frac{V_{dc}}{2}\end{array}$$

(6)

3. Fault Detection, Fault Localization, and Fault-Tolerant Operation

This section mainly concentrates on analyzing the fault detection, fault localization, and fault-tolerant operation of an MMC under the circumstance of IGBT open-circuit fault. Firstly, the output characteristics of SMs under IGBT open-circuit faults are analyzed. Then, a fault detection method based on the circulating current and output current observation is proposed. Since the fault detection method can only reveal which arm includes the faulty SM, it is necessary to develop a fault localization scheme to find the faulty SM. Once the faulty SM is found, it will be cut off, and the fault-tolerant operation method based on the hot redundant mode 2 is employed to ensure the continuous operation of the MMC.

3.1. Steady-State Operation

As shown in Figure 2, the IGBT open-circuit fault is likely to happen in switch S₁ or S₂ of the half-bridge SM. For the first case, S₁ is turned on and S₂ is turned off. When the bridge arm current is positive, the capacitor can only be charged by the bridge arm currents through the parallel diodes if the open-circuit fault occurs in S₁. When the arm current is negative, it will flow through the parallel diode of S₂ (if S₁ is open circuited) and the capacitor voltage remains the same. For the second case that S₁ is turned off and S₂ is turned on, the arm current flows through S₂ and the capacitor voltage stays unchanged. Therefore, when the open-circuit fault occurs in switch S₁, the SM capacitor has only the charging period, leading to the continuous increase of the capacitor voltage. When S₂ is open circuited, the capacitor will be discharged by the arm current when S₁ is turned on and S₂ is turned off. However, if the switching command reverses, where S₁ is turned off and S₂ is turned on, the current through the parallel diode will charge the capacitor when the arm current is positive. On the other hand, when the arm current is negative, it will flow through the parallel diode of S₂, which makes the capacitor voltage remain at the original value. Therefore, when the open-circuit fault happens in switch S₂, although the charging period of the SM capacitor is prolonged, the discharging period still exists.

From the point of view of the SM output voltage, it is equal to zero when S₁ is with the open-circuit fault and the arm current is negative instead of V_c in the normal condition, meaning that the arm voltage correspondingly decreases. When S₂ is open circuited and the arm current is positive, the output voltage of SM is V_c instead of zero in the normal condition, which means that the arm voltage correspondingly increases. In the next section, a fault detection scheme will be presented according to the output characteristics of the faulty SMs discussed above. For the sake of analysis and looking up, the output characteristics of the faulty SM are summarized in

Table 3. The output characteristics of the fault submodule.

State of SM	iarm > 0		iarm < 0
	Switching Command S1 = 1; S2 = 0	Switching Command S1 = 0; S2 = 1	Switching Command S1 = 1; S2 = 0	Switching Command S1 = 0; S2 = 1
S1 Open Circuit	vsm = vc Charging the Capacitor	vsm = 0 Capacitor Voltage Unchanged	vsm = 0 Capacitor Voltage Unchanged	vsm = 0 Capacitor Voltage Unchanged
Normal State	vsm = vc Charging the Capacitor	vsm = 0 Capacitor Voltage Unchanged	vsm = vc Discharging the Capacitor	vsm = 0 Capacitor Voltage Unchanged
S2 Open Circuit	vsm = vc Charging the Capacitor	vsm = vc Charging the Capacitor	vsm = vc Discharging the Capacitor	vsm = 0 Capacitor Voltage Unchanged

.

3.2. Fault Detection

According to the above analysis, once the IGBT open circuit occurs in an SM, the capacitor voltage and arm voltage will vary respectively. When the open-circuit fault happens in S₁, only the charging period exists in the faulty SM and the capacitor voltage keeps increasing rapidly. When S₂ is open circuited, the charging period of the faulty SM is extended and the capacitor voltage increases correspondingly. Additionally, when S₁ is open circuited, the arm voltage decreases; on the contrary, when S₂ is open circuited, the arm voltage increases. Based on the above characteristics, changing the voltage sensor position or adding an extra voltage sensor can directly detect the fault but with the added cost. The other solution is to indirectly observe the arm current and output current changes to detect the fault according to relationships among the arm voltage, arm current, and output current.

By rewriting Equation (4), the following equation can be obtained:

$$\begin{array}{l}\frac{d{i}_{cca}}{dt}=\left(V_{dc}-\left(v_{pa}+v_{na}\right)\right)/2L\\ \frac{d{i}_a}{dt}=\left(\frac{v_{na}-v_{pa}}{2}-v_a\right)/L\end{array}$$

(7)

From Equation (7), it can be seen that when the upper arm voltage v_pa decreases, the circulating current i_cca increases swiftly and the capacitor voltage in the upper arm increases with a fast pace accordingly. Simultaneously, the output current i_a increases. On the other hand, when the voltage in the upper arm v_pa increases, the circulating current i_cca and the capacitor voltage decrease rapidly, and the decrease in the output current i_a is also presented. In a similar way, when the voltage in the lower arm v_na decreases, the circulating current i_cca and the capacitor voltage in the lower arm increases rapidly, while the output current i_a decreases. When v_na increases, i_cca and the capacitor voltage rapidly decrease, while the output current i_a increases. Therefore, according to the analysis above and the corresponding relationships among the IGBT open circuit fault types, the circulating current, SM capacitor voltage, and the output current can be derived as shown in

Table 4. The relationship between the opening fault type and the circulation and the output current change.

Open Circuit Fault Type	Circulating Current	Capacitor Voltage in the SM	Output Current
Open circuit of S1 in the upper bridge arm	Increase	Increase	Increase
Open circuit of S2 in the upper bridge arm	Decrease	Decrease	Decrease
Open circuit of S1 in the lower bridge arm	Increase	Increase	Decrease
Open circuit of S2 in the lower bridge arm	Decrease	Decrease	Increase

.

3.3. Fault Localization

By using the detection approach based on the circulating current and output current observation, the faulty arm with the faulty SM can be identified, but the exact location of the faulty SM cannot be obtained. In the conventional fault localization method, a maximum threshold for the capacitor voltage is set; when the faulty SM’s capacitor voltage reaches the set threshold, the faulty SM is located. This method has two drawbacks. Firstly, it has an inevitable and unpredictable delay time to wait for the capacitor voltage increase. Secondly, it is hard to discriminate the faulty SM from the healthy SMs when all SMs’ capacitor voltages simultaneously increase, which happens in the condition of the MMC employing carrier lamination modulation with a sorting-selection algorithm. To solve this issue, in this paper, a fault localization strategy based on the capacitor voltage difference observation is proposed.

According to Table 3, when the open circuit fault occurs in S₁ and the arm current is negative, the capacitor voltage remains unchanged. However, in the normal case, the capacitor voltage decreases. Similarly, when S₂ is open circuited and the arm current is positive, the capacitor voltage increases. While in the normal case, the capacitor voltage does not change. Therefore, the capacitor voltage in the faulty SM is larger than that in the normal SM in the same arm. Based on this point, the location of the faulty SM can be derived by measuring and comparing the capacitor voltages of the SMs in the same arm. Compared with the traditional threshold detection scheme, the proposed one extensively shortens the time for positioning and it minimizes the negative effects produced by the faulty SMs on the whole system.

3.4. Fault-Tolerant Operation

Once the faulty SM is located, the corresponding bypass switch is activated to cut off the faulty SM. In the control strategy, the faulty SM’s capacitor voltage is also removed from the pre-sorting sequence so as to ensure the faulty SM cannot be selected and that the other healthy SMs are sorted and selected based on the capacitor voltages and arm current directions. In this way, the fault-tolerant operation of the MMC can be realized after the cutting of the faulty SM.

As shown in Figure 3, assuming five normal SMs and a redundant SM exist in each arm, under normal conditions, the capacitor voltages of the six SMs are sequenced by the sorting algorithm at first, and the number of SMs to be inserted is derived from the carrier lamination modulation (in Figure 3, the number of inserted SMs is 4). When the arm current is positive, the selection process starts from the SM with the lowest capacitor voltage. When the arm current is negative, the selection process starts from the SM with the highest capacitor voltage. In the case that the fault occurs in SM₂, after it is detected, localized, and bypassed by the above-mentioned method, the capacitor voltage of SM₂ will also be removed from the pre-sorting sequence, and the remaining five healthy SMs are sequenced by the sorting algorithm, as shown in Figure 3b. From the above analysis, it can be seen that the faulty SM is automatically cut off in the modified sorting-selection algorithm, and the required SMs can be selected from the remaining healthy SMs and the redundant SM. The seamlessly continuous operation of the MMC can be ensured as long as the number of redundant SMs is larger than that of the faulty SMs.

4. Simulation Verification

To validate the proposed control strategy, an MMC system with five normal SMs and one redundant SM in each arm was established in Matlab/Simulink, operating as an inverter with a resistive load, as shown in Figure 4. The main electrical parameters are listed as shown below: the rated power is 900 kW, the DC-bus voltage is 6 kV, the output phase voltage is 2 kV (RMS value), the arm inductance is 10 mH, the SM capacitor voltage is 1.2 kV, the SM capacitance is 2.2 mF, the sampling frequency is 10 kHz, and the switching frequency is 5 kHz. The converter operates in the open-loop inverter mode and the common circulating current control strategy is used to eliminate the second-order circulating current component [32]. Additionally, the modified sorting-selection algorithm is adopted for the SM capacitor voltage balance. The control block diagram of the whole control system is displayed in Figure 5.

The simulation results of the normal operation are shown in Figure 6. It can be seen that, since the second-order circulating current elimination module is applied, the main part of the circulating current is the DC component. The output voltages are three-phase sinusoidal waveforms with low harmonic distortions.

Figure 7 shows the waveforms of the output voltages, output currents, circulating current, arm current, and capacitor voltage when the IGBT open circuit fault occurs in SMs at different positions. An IGBT open circuit fault is applied on the switch S₁ in the SM of the upper arm of phase B at 0.4 s. According to the analysis in Table 4, the fault would increase the circulating current in phase B, which is demonstrated by Figure 7a. Besides, since the circulating current increases, the negative interval of the arm current decreases, resulting in all the capacitor voltages of SMs in the upper arm of phase B to increase simultaneously. Thus, the conventional fault localization method based on the maximum voltage threshold would find it hard to localize the faulty SM. When the fault point is in switch S₂ in the SM of the upper arm of phase B, the circulating current in this phase would decrease swiftly, following the analysis in Table 4. As shown in Figure 7c,d, the results match the above analysis. At the same time, the output voltages and currents of phase B also decrease sharply, which can be explained by the fact that the increase of the upper arm voltage caused by the fault would result in the circulating current decrease and output voltage decrease, derived from Equation (4). The capacitor voltages increase with different slopes. It can be predicted that the fault SM localization requires considerable time to wait for the capacitor voltage to reach the threshold. When the switch S₁ in the SM in the lower bridge arm is open circuited, the lower arm voltage decreases, which leads to the rapid boosting of the circulating current in phase B. Meanwhile, the capacitor voltages of the SMs in the lower bridge arm of phase B also increase simultaneously due to the increase of the circulating current. The results shown in Figure 7e,f are in line with the analysis. When the fault occurs in switch S₂ in the SM in the lower bridge arm of phase B, a sharp decrease in the circulating current of phase B can be seen, as shown in Figure 7g,h, which is caused by the increase of the lower arm voltage in phase B. Additionally, the output voltages and currents of the phase decrease as well. The simulation results are in accordance with the results of the analysis in Table 4.

Figure 8 shows the performance of the proposed fault localization method based on the capacitor voltage difference observation. Under the scenario in Figure 8a, all SMs’ capacitor voltages increase simultaneously, which makes it hard to discriminate the faulty SM using the conventional methods with the fixed threshold detection. Under the scenario in Figure 8b, although the increase-slope of the capacitor voltage of the faulty SM is larger than that of the other SMs, the fault localization speed is heavily related to the fixed threshold, which should be much larger than the nominal voltage value for safety considerations. The results in Figure 8 demonstrate that the proposed fault localization method based on the capacitor voltage difference observation can locate the faulty SM. Although the localization time is related to different converter operation conditions and the set similarity ratio, the proposed method is faster than the conventional localization method, and the localization time is within 100 ms, under the condition of a simulation system.

Figure 9 shows the simulation results of the fault-tolerant operation of the MMC. An IGBT open circuit fault is applied on switch S₁ in SM₄ in the upper bridge arm of phase B, the faulty SM can be found and cut off by the fault localization module at 0.46 s. As shown on the red line in Figure 9b, when the faulty SM is cut off, the capacitor voltage is stable with a slight discharge, and the other healthy SMs’ capacitor voltages decrease to the nominal value. The system returns to the normal operation state within 120 ms. When the open circuit fault occurs in switch S₂ in SM₄ in the upper bridge arm of phase B, the faulty SM can be found and cut off by the fault localization module at 0.42 s, and then the faulty SM is bypassed and the capacitor voltage is stable with a slight discharge, as shown by the red line in Figure 9d. The system returns to the normal operational mode within 100 ms. From the simulation results, it can be seen that the fault detection, fault localization, and the fault-tolerant operation strategies can be used to swiftly detect, locate, and cut off the IGBT open-circuit fault in SMs, leading to the system returning to normal operation conditions immediately.

5. Conclusions

In this paper, a comprehensive analysis of the fault detection, fault localization, and fault-tolerant operation of MMCs under the circumstance of an IGBT open circuit fault was presented. According to the operation principle of MMCs and the output characteristics of the SM with an IGBT open circuit fault, a fault detection method based on the circulating current and output current observation was used to detect the fault time and the faulty phase. To precisely locate and bypass the faulty SM, a fault localization method based on the capacitor voltage difference observation has been proposed. Focusing on the issues of the conventional fault localization method based on the set threshold, the proposed method is based on the different charging and discharging behaviors between the faulty SM and the healthy SM. By measuring and comparing the capacitor voltages, the faulty SM can be located. The simulation results demonstrate that the proposed fault localization method can efficiently locate the faulty SM, under two specific conditions: (1) all SM capacitor voltages in the faulty arm increase simultaneously; (2) the SM capacitor voltages in the faulty arm increase with different slopes, where the conventional fault localization method finds it hard to work properly. After the faulty SM is located and cut off, the fault-tolerant operation strategy based on the use of redundant SMs was employed. The simulation results cater to the theoretical analysis, and the feasibility and effectiveness of the adopted method were also validated.