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Article

Integral Plus Resonant Sliding Mode Direct Power Control for VSC-HVDC Systems under Unbalanced Grid Voltage Conditions

1
School of Electrical Engineering, Xi’an Jiaotong University, No. 28, West Xianning Road, Xi’an 710049, China
2
Xuji Group Corporation, State Grid Corporation of China, No. 1298, Xuji Road, Xuchang 461000, China
3
Department of Precision Instrument, Tsinghua University, No. 30, Shuangqing Road, Beijing 100084, China
*
Author to whom correspondence should be addressed.
Energies 2017, 10(10), 1528; https://doi.org/10.3390/en10101528
Submission received: 11 August 2017 / Revised: 25 September 2017 / Accepted: 26 September 2017 / Published: 1 October 2017
(This article belongs to the Section F: Electrical Engineering)

Abstract

:
An integral plus resonant sliding mode direct power control (IRSMC DPC) strategy for voltage source converter high voltage direct current (VSC-HVDC) systems under unbalanced grid voltage conditions is proposed in this paper. Through detailed instantaneous power flow analysis, a generalized power compensation method, by which the ratio between the amplitude of active and reactive power ripples can be controlled continuously, is obtained. This enables the system to provide flexible power control, so that the desired performance of the system on both the ac and dc sides can be attained under different operating conditions. When the grid voltage is unbalanced, one or both of the active and reactive power terms contain ripples, oscillating at twice the grid frequency, to obtain non-distorted ac current. A power controller consisting of the proportional, integral and resonant control laws is designed using the sliding mode control approach, to achieve accurate power control objective. Simulation studies on a two-terminal VSC-HVDC system using MATLAB/SIMULINK (R2013b, Mathworks, Natick, MA, USA) are conducted to verify the effectiveness of the IRSMC DPC strategy. The results show that this strategy ensures satisfactory performance of the system over a wide range of operating conditions.

1. Introduction

Voltage source converter high voltage direct current (VSC-HVDC) technology is playing an ever-increasing role in power transmission systems all over the world [1,2,3]. The VSC-HVDC system can provide flexible power control, and facilitate power grid interconnection and the integration of distributed generations. Owing to these features, VSC-HVDC system-based flexible dc distribution networks have been attracting more and more interest in recent years [4,5,6]. The VSC-HVDC system shows great potential for wide-scale application in future power transmission system and power distribution network. However, the operating conditions of the grid often change drastically. The connection of renewable energy generation systems will further increase the degree of disturbance, due to their intermittent nature [7,8]. These pose potential threats to the performance and stability of the VSC-HVDC system, therefore, a control scheme that guarantees both high performance and strong robustness of the system is of crucial importance.
The most widely adopted control strategies for VSC-based systems can be classified into vector control (VC) and direct power control (DPC) [9,10] ones. The VC strategy can behave satisfactorily under balanced grid voltage conditions. However, the control structure of this strategy is complex, and the performance of the system will be significantly degraded due to the time delays introduced by sequence component extraction of system voltage and current, when the grid voltage is unbalanced [11,12]. Besides, stability problems may even arise due to the interaction between the phase-locked loop (PLL) and the grid impedance under these unbalanced conditions [13,14]. DPC can be realized by look-up tables (LUT-DPC) or space vector modulation (SVM-DPC). In this paper, the SVM-DPC is adopted, because it provides a fixed switching frequency and thereby produces high quality ac current waveforms. The DPC strategy is generally realized in the static two-phase reference frame, so there’s no need for rotating reference transformation, thus, making it easy to implement.
Three-phase voltage unbalance is common in practical power systems. When this happens, the performance of various control strategies for VSC-based systems will be affected. Many control methods are studied to improve the performance of the DPC strategies under unbalanced grid voltage conditions. The sliding mode control (SMC)-based DPC strategies for doubly fed induction generator (DFIG) rotor side converter and VSC inverter (VSI) are proposed in [15,16], respectively. However, the designed controllers are SMC-based proportional controllers, for which high gains are required to reduce the power control errors. This has negative effects on system stability. In [17], a SMC-based DPC strategy with integral sliding manifold for DFIG is proposed. However, the control force is equivalent to a proportional controller because the integral action is contained only in the switching function, which often accounts for a very small proportion of the total control force to reduce the chattering. Actually, as one or both of the active and reactive power terms contain ripples to obtain non-distorted ac current, power control errors can be reduced to some extent, but cannot be eliminated by proportional and proportional integral (PI) controllers. In order to achieve accurate power control objectives, controllers that possess tracking capabilities should be used.
A resonant backstepping-based DPC strategy for DFIG is proposed in [18]. Although sequence component extraction is not needed, PLL is used to achieve the desired objectives. In addition, high proportional gains have to be used, which may severely reduce system stability margins, to reduce the power control errors. A coordinated DPC scheme adopting PI control plus reduced order vector integrator for DFIG is presented in [19]. However, the impacts of the negative sequence (NS) voltage component are not considered and replacing of the PLL by a constant angular frequency may lead to degraded system performance. In [20,21], model predictive control-based DPC strategies are proposed for DFIG and VSC rectifiers, respectively. The main deficiency of this method is that the system performance relies on the accuracy of the model and is sensitive to time delays. In [22], a sliding mode controller with a multi-resonant sliding manifold is designed for single-phase grid-connected VSI. However, the ideal resonant law is used which cannot adapt to frequency changes, and may even lead to stability problems caused by its infinite gain. A common deficiency shared in the above DPC strategies is that the ratio between the amplitude of active and reactive power ripples cannot be controlled continuously. A generalized power control method to realize continuous control of the ratio is developed in [23]. However, the results are obtained under the assumption that the initial phase angle of the positive sequence (PS) and NS components of the grid voltage and current are the same. Besides, the assumption of constant reactive power reference will lead to significant performance degradation when reactive power ripples are desired.
In this paper, an integral plus resonant SMC-based DPC (IRSMC DPC) strategy for a VSC-HVDC system under unbalanced grid voltage conditions is proposed. The two main contributions of this paper are as follows: firstly, through detailed instantaneous power flow analysis, a generalized power compensation method, by which the ratio between the amplitude of active and reactive power ripples can be controlled continuously, is obtained. Secondly, as one or both of the active and reactive power terms contain ripples to obtain non-distorted ac current, and considering the impacts of time delays on system performance, a SMC-based power controller, consisting of the proportional, integral, and resonant control laws, is designed to achieve accurate power control objective. Stability and robustness of the system in the Lyapunov sense is proved, simulation studies on a two-terminal VSC-HVDC system using MATLAB/SIMULINK (R2013b, Mathworks, Natick, MA, USA) are conducted to verify the effectiveness of the IRSMC DPC strategy.
The paper is organized as follows: in Section 2, detailed instantaneous power flow analysis is conducted and different control objectives are derived for VSC-HVDC system, under unbalanced grid voltage conditions. In Section 3, the proposed IRSMC DPC strategy is designed, stability and robustness of the system in the Lyapunov sense is proved. In Section 4, the effectiveness of the IRSMC DPC strategy is verified through a simulation study on a two-terminal VSC-HVDC system, and Section 5 concludes the paper.

2. VSC-HVDC System Model

2.1. Schematic of the Studied VSC-HVDC System

Single-line diagram of the two-terminal VSC-HVDC system studied is shown in Figure 1. In the figure, the main technical parameters are also listed, and parameters with a unit provided represent actual physical quantities and parameters without units represent the per-unit values. The system mainly consists of two converter stations (CS), namely CS1 and CS2, ac line inductor and dc bus capacitor for each CS, and dc transmission lines. In this paper, it’s assumed that CS1 operates as a rectifier and functions to control the dc bus voltage at the specified value, and that CS2 operates as an inverter and is scheduled to transmit active power to ac system 2. Both CS1 and CS2 can output reactive power as instructed to the respective ac system to which they are connected.
The schematic of three-phase VSC for each CS is as shown in Figure 2. In the figure, each switching device symbol represents a series connection of insulated-gate bipolar transistor (IGBT) devices, which is a key technology for high voltage, high power VSC based applications. Up to now, most of the VSC-HVDC transmission projects in the world, ranging from several MW to several hundred MW, have adopted this technology.
In Figure 2, ea, eb, ec, and ia, ib, ic represent the grid voltage and ac current, respectively; va, vb, vc represent the converter pole voltage, R and L represent the ac line resistance and inductance, and Vdc and RL represent the dc bus voltage and dc load, respectively. The structures of the power control loop for each CS, irrespective of the operation mode, are identical; they are designed under a unified framework. Besides, it’s assumed that the grid voltage on each side contains only the fundamental components and the grid frequency is 50 Hz if not otherwise specified.

2.2. Mathematical Model of the Converter Station

The mathematical model of VSC in the α-β reference frame is:
{ e α = L d i α d t + R i α + v α e β = L d i β d t + R i β + v β
where eα, eβ, iα, and iβ are the respective α- and β-axis grid voltage and current components, and vα and vβ are the respective converter pole voltage components.
According to instantaneous power theory, instantaneous active power (P) and reactive power (Q) at the point of common coupling (PCC) are:
[ P Q ] = 3 2 [ e α e β e β e α ] [ i α i β ]
Then, variations of the instantaneous active and reactive power are:
{ d P d t = 3 2 ( e α d i α d t + i α d e α d t + e β d i β d t + i β d e β d t ) d Q d t = 3 2 ( e β d i α d t + i α d e β d t e α d i β d t i β d e α d t )
When the grid voltage is unbalanced, any space vector can be expressed as the sum of its PS and NS components, for the VSC based system as shown in Figure 2. In the α-β reference frame, the complex vectors of grid voltage and current can be expressed as:
{ e α β = ( e α + + e α ) + j ( e β + + e β ) i α β = ( i α + + i α ) + j ( i β + + i β )
where the subscripts + and − represent the PS and NS components of the respective space vector, and:
{ e α + = E m + cos ( ω t + θ e + ) ,   e α = E m cos ( ω t + θ e ) e β + = E m + sin ( ω t + θ e + ) ,   e β = E m sin ( ω t + θ e ) i α + = I m + cos ( ω t + θ i + ) ,   i α = I m cos ( ω t + θ i ) i β + = I m + sin ( ω t + θ i + ) ,   i β = I m sin ( ω t + θ i )
In Equation (5), Em+, Em, Im+, and Im are the amplitude and θe+, θe, θi+, θi the initial phase angle of the PS and NS components of grid voltage and current, respectively.
According to Equation (5), instantaneous variations of the PS and NS components of the grid voltage are:
{ d e α + d t = ω e β + ,   d e α d t = ω e β d e β + d t = ω e α + ,   d e β d t = ω e α
Instantaneous variations of grid current can be obtained from Equation (1) as:
{ d i α d t = 1 L ( e α R i α v α ) d i β d t = 1 L ( e β R i β v β )
Substituting Equations (6) and (7) into Equation (3), and through some mathematical manipulations, we have:
{ d P d t = 3 2 L [ ( e α 2 + e β 2 ) ( e α v α + e β v β ) ] R L P + ω Q d Q d t = 3 2 L ( e β v α + e α v β ) R L Q + ω P
where:
Q = 1.5 [ ( e β i α + + e β i α e α i β + e α i β ) ( e β + i α + + e β + i α e α + i β + e α + i β ) ]
P = 1.5 [ ( e α + i α + + e α + i α + e β + i β + + e β + i β ) ( e α i α + + e α i α + e β i β + + e β i β ) ]
Equation (9) can be expressed as:
Q = ω Q + 3 ω ( e β i α + + e β i α e α i β + e α i β )
or:
Q = ω Q 3 ω ( e β + i α + + e β + i α e α + i β + e α + i β )
Equation (10) can be expressed as:
P = ω P 3 ω ( e α i α + + e α i α + e β i β + + e β i β )
or:
P = ω P + 3 ω ( e α + i α + + e α + i α + e β + i β + + e β + i β )
In this paper, Equations (12) and (14) are used, as the P and Q terms can be calculated without the NS grid voltage component.
When the grid voltage is three-phase balanced, we have:
{ d P d t = 3 2 L [ ( e α 2 + e β 2 ) ( e α v α + e β v β ) ] R L P ω Q d Q d t = 3 2 L ( e β v α + e α v β ) R L Q + ω P
Comparing Equation (15) with Equation (8), we can find the dynamic model under balanced grid voltage condition is a special case of the one when the grid voltage is unbalanced.

2.3. Instantaneous Power Flow Analysis

Substituting Equation (4) into Equation (2), the expressions of instantaneous active and reactive power under grid voltage unbalance can be obtained as:
{ P = P 0 + P s 1 + P s 2 Q = Q 0 + Q s 1 + Q s 2
where P0 and Q0 are the average terms of the instantaneous active and reactive power, Ps1, Ps2, Qs1 and Qs2 are the power ripples oscillating at twice the grid frequency, and:
[ P 0 P s 1 P s 2 Q 0 Q s 1 Q s 2 ] = 3 2 [ e α + e β + e α e β 0 0 e α + e β + e α e β 0 0 e β + e α + e β e α 0 0 e β + e α + e β e α 0 0 ] [ i α + i β + i α i β ]
Substituting Equation (5) into Equation (17), yields:
[ P 0 P s 1 P s 2 Q 0 Q s 1 Q s 2 ] = 3 2 [ E m + I m + cos ( θ e + θ i + ) + E m I m cos ( θ e θ i ) E m + I m cos ( 2 ω t + θ e + θ i ) E m I m + cos ( 2 ω t θ e + θ i + ) E m + I m + sin ( θ e + θ i + ) + E m I m sin ( θ e θ i ) E m + I m sin ( 2 ω t + θ e + θ i ) E m I m + sin ( 2 ω t θ e + θ i + ) ]
From Equation (18), we can find that it’s the interaction between the PS (NS) voltage and the NS (PS) current that produces the active and reactive power ripples.
Instantaneous active and reactive power consumed in the inductor is:
S L = 3 L 2 d i d t i * = 3 L 2 [ ( d i α d t i α + d i β d t i β ) _ P L + j ( d i β d t i α d i α d t i β ) _ Q L ]
Expressing the grid current in terms of the PS and NS components, and expanding the above power terms, instantaneous power consumption in the inductor can be obtained as:
P L = 3 L 2 ( d i α + d t i α + + d i α d t i α + d i α + d t i α + d i α d t i α + + d i β + d t i β + + d i β d t i β + d i β + d t i β + d i β d t i β + )
Q L = 3 L 2 ( d i β + d t i α + + d i β + d t i α + d i β d t i α + + d i β d t i α d i α + d t i β + d i α + d t i β d i α d t i β + d i α d t i β )
Using Equation (5) and through some mathematical manipulations, we have:
P L = 3 ω L 2 ( i β + i α + + i β i α i β + i α + i β i α + + i α + i β + i α i β + i α + i β i α i β + ) = 3 ω L ( i α + i β i α i β + )
Q L = 3 ω L 2 ( i α + i α + + i α + i α i α + i α i α i α + i β + i β + + i β + i β i β + i β i β i β ) = 3 ω L 2 ( i α + 2 + i β + 2 i α 2 i β 2 )
which means that instantaneous active power consumption in the inductor is not zero if the ac current is not balanced. When the grid voltage is balanced, so is the ac current. Thus, instantaneous active power consumption in the inductor is zero under balanced voltage condition.

2.4. Power Reference Derivation

The power reference used depends on specific control objectives. When grid voltage unbalance happens, the references for active and reactive power should be set according to the actual operating conditions, so that they can provide the desired performance for the system on both the ac and dc sides. Generally, non-distorted ac current is desired. Therefore, a generalized power compensation method that makes Equation (18) always hold is required. To this purpose, the active and reactive power references are designed as:
{ P g r e f = P 0 + m P c o m p Q g r e f = Q 0 + n Q c o m p
with:
{ P c o m p = 3 2 ( e α i α + + e β i β + ) Q c o m p = 3 2 ( e β i α + e α i β + )
where m and n represent the oscillating amplitude coefficient (OAC) of active and reactive power ripples. The advantage of this power compensation method is that the use of NS current components is not required as they are often very small and large errors may be produced, when compared with using of the PS current components.
Active and reactive power should be controlled to track their respective references, i.e.:
P g r e f = P ,   Q g r e f = Q
As a consequence, the following equations can be obtained:
{ ( m 1 ) ( e α i α + + e β i β + ) = ( e α + i α + e β + i β ) ( n 1 ) ( e β i α + e α i β + ) = ( e β + i α e α + i β )
Combining Equations (18) and (27), we have:
{ ( m 1 ) E m I m + cos ( 2 ω t θ e + θ i + ) = E m + I m cos ( 2 ω t + θ e + θ i ) ( n 1 ) E m I m + sin ( 2 ω t θ e + θ i + ) = E m + I m sin ( 2 ω t + θ e + θ i )
Equation (28) consists of two nonlinear equations, and clearly finding the relationship between each constituting term and the power compensations is difficult. However, if we set:
{ cos ( 2 ω t θ e + θ i + ) = cos ( 2 ω t + θ e + θ i ) sin ( 2 ω t θ e + θ i + ) = sin ( 2 ω t + θ e + θ i )
or:
{ cos ( 2 ω t θ e + θ i + ) = cos ( 2 ω t + θ e + θ i ) sin ( 2 ω t θ e + θ i + ) = sin ( 2 ω t + θ e + θ i )
that is, controlling θi+ and θi to satisfy:
( θ e + θ i ) = k π + ( θ i + θ e ) , k = 0 , 1
we then get the relationship between m and n:
m + n = 2
The relationship determined by Equation (32) provides an effective means to continuously control the active and reactive power ripples with no current distortion. According to the above analysis, we can obtain the following four power control objectives for both CS, under unbalanced grid voltage conditions.

2.4.1. Obtaining Three-Phase Balanced Ac Current

This objective corresponds to the case where m = 1 and n = 1. The compensations for active and reactive power references are:
{ P c o m p = 3 2 ( e α i α + + e β i β + ) Q c o m p = 3 2 ( e β i α + e α i β + )
which indicates that the NS current component is zero, i.e., the ac current is three-phase balanced.

2.4.2. Removing Reactive Power Ripples at the PCC

For this objective, m = 2 and n = 0. The power compensations are:
{ P c o m p = 3 ( e α i α + + e β i β + ) Q c o m p = 0
This indicates that reactive power ripples are eliminated, i.e., Qs1 + Qs2 = 0 is satisfied. We can find from Equation (18) that Ps1 = Ps2. Replacing Ps1 with Ps2, then Equation (34) can be obtained.

2.4.3. Removing Active Power Ripples at the PCC

For this objective, m = 0 and n = 2. The power compensations are:
{ P c o m p = 0 Q c o m p = 3 ( e β i α + e α i β + )
This indicates that active power ripples are eliminated, i.e., Ps1 + Ps2 = 0 is satisfied. We can find from Equation (18) that Qs1 = Qs2. Replacing Qs1 with Qs2, then Equation (35) can be obtained.

2.4.4. Obtaining Continuously Controllable Active and Reactive Power Ripples at the PCC

In addition to the above three special cases, a more generalized power control objective is to obtain continuously controllable active and reactive power ripples. For this purpose, the respective power compensations are:
{ P c o m p = 3 m 2 ( e α i α + + e β i β + ) Q c o m p = 3 n 2 ( e β i α + e α i β + )
where ( m , n ) { ( 1 , 1 ) , ( 2 , 0 ) , ( 0 , 2 ) } but satisfies Equation (32). It should be noted that the OAC of active and reactive power ripples are governed by Equation (32) in order to obtain non-distorted ac current. This means if the OAC of active power ripple is increased (decreased), the OAC of reactive power ripple should be decreased (increased) accordingly to ensure Equation (32) holds.

3. IRSMC DPC Controller Design

3.1. IRSMC Control Law

Define Pe = PPr and Qe = QQr as the instantaneous active and reactive power errors, where Pr and Qr are references for the respective power terms. Taking power errors as the new state variables, Equation (8) can be expressed as:
d x d t = F ( x ) + G ( x ) u
where x = [Pe Qe]T is the state vector, u = [vα vβ]T is the control input vector, G(x) is the control gain matrix, and F(x) = [FP(x) FQ(x)]T is the vector of the nonlinear functions in the dynamic equation, and:
{ F P ( x ) = 3 2 L ( e α 2 + e β 2 ) R L ( P r + P e ) + ω Q P ˙ r F Q ( x ) = R L ( Q r + Q e ) + ω P Q ˙ r
G ( x ) = 3 2 L [ e α e β e β e α ]
where L, R, and ω are nominal values, and from Equations (18) and (24) it can be obtained that:
[ P ˙ r Q ˙ r ] = [ 2 m ω Q s 2 2 n ω P s 2 ]
Assume the actual values of ac line inductance, resistance, and angular frequency of the grid are L + ΔL, R + ΔR, and ω + Δω, respectively. Then, the system dynamic model can be rewritten as:
d x d t = F a ( x ) + G a ( x ) u + D 0 ( x , u )
where Fa(x) = [FPa(x) FQa(x)]T, and:
{ F P a ( x ) = 3 2 ( L + Δ L ) ( e α 2 + e β 2 ) R + Δ R L + Δ L ( P r + P e ) + ( ω + Δ ω ) Q P ˙ r F Q a ( x ) = R + Δ R L + Δ L ( Q r + Q e ) + ( ω + Δ ω ) P Q ˙ r
G a ( x ) = 3 2 ( L + Δ L ) [ e α e β e β e α ]
and D0(x,u) = [DP0 (x,u) DQ0 (x,u)]T denotes the disturbance vector.
Then, Equation (41) can be expressed as:
d x d t = F ( x ) + G ( x ) u + δ ( x , u )
where δ(x,u) = [δP(x,u) δQ(x,u)]T denotes the lumped uncertainty introduced by parameter inaccuracy and disturbances, with:
[ δ P ( x , u ) δ Q ( x , u ) ] = [ Δ F P ( x ) Δ F Q ( x ) ] + Δ G u + [ D P 0 ( x , u ) D Q 0 ( x , u ) ]
and:
[ Δ F P ( x ) Δ F Q ( x ) ] = [ 3 2 Δ L L + Δ L ( e α 2 + e β 2 ) + R Δ L L Δ R L + Δ L P + Δ ω Q R Δ L L Δ R L + Δ L Q Δ ω P ]
Δ G ( x ) = 3 2 Δ L L + Δ L [ e α e β e β e α ]
Assume that δ(x,u) satisfies:
| δ P ( x , u ) | ρ P ,   | δ Q ( x , u ) | ρ Q
for some positive real numbers ρ P and ρ Q .
In the following, arguments of various functions will not be written for the sake of convenience. The sliding manifold for active and reactive power control sub-systems are designed as:
S = [ S P S Q ] = [ P e Q e ] + K I [ P e Q e ] + K R G I [ P e Q e ]
where:
K I = [ K P I 0 0 K Q I ] ,   K R = [ K P R 0 0 K Q R ] ,
G I = [ 2 ω c s s 2 + 2 ω c s + ω 2 0 0 2 ω c s s 2 + 2 ω c s + ω 2 ]
for some KPI, KQI > 0 and KPR, KQR > 0.
In Equation (48), ωc is the bandwidth parameter of the generalized ac integrator (GI). It determines the effective bandwidth of the GI. Generally, ωc is in the range of 5–15 rad/s. Here, we use the non-ideal GI instead of the ideal one because it adapts to frequency variations, and the stability problem associated with the infinite gain of the ideal GI can be avoided.
Then, the derivative of S is:
S ˙ = [ S ˙ P S ˙ Q ] = [ P ˙ e Q ˙ e ] + K I [ P e Q e ] + K R D G I [ P e Q e ]
with:
D G I = [ 2 ω c s 2 s 2 + 2 ω c s + ω 2 0 0 2 ω c s 2 s 2 + 2 ω c s + ω 2 ] = [ 2 ω c 4 ω c 2 s + 2 ω c ω 2 s 2 + 2 ω c s + ω 2 0 0 2 ω c 4 ω c 2 s + 2 ω c ω 2 s 2 + 2 ω c s + ω 2 ]
Using U 1 = 0.5 S T S as the Lyapunov function candidate, the derivative of U1 along the system state trajectory is:
U ˙ 1 = S T S ˙ = S T ( F + G u + K I x + K R D G I x + δ )
If the control law is designed as:
u = G 1 ( F + K I x + K R D G I x + K S S + v )
where v is:
v = η [ s i g n ( S P ) s i g n ( S Q ) ] = [ η P 0 0 η Q ] [ s i g n ( S P ) s i g n ( S Q ) ]
and:
K S = [ K P S 0 0 K Q S ]
for some ηP > ρP, ηQ > ρQ, and KPS, KQS > 0.
Then,
U ˙ 1 S T K S S ( η P ρ P ) | S P | ( η Q ρ Q ) | S Q | 0
Substituting the signum function in Equation (52) by the high slope saturation function:
s a t ( S j / ε j ) = { 1 , i f   S j / ε j 1 S j / ε j , i f   | S j / ε j | < 1 1 , i f   S j / ε j 1
where j = P, Q and εj > 0 denotes the width of the boundary layer.
Then, the control law u can be obtained as:
u = G 1 ( [ F P F Q ] + K I [ P e Q e ] + K S [ S P S Q ] + K R D G I [ P e Q e ] + η [ s a t ( S P / ε P ) s a t ( S Q / ε Q ) ] )

3.2. Structure of the IRSMC DPC Strategy

The control structure of the proposed IRSMC DPC strategy is shown in Figure 3. It mainly consists of three parts: the instantaneous power calculation, the instantaneous power compensation, and the generation of the IRSMC DPC control law.
From Figure 3, we can see that the control structure of the IRSMC DPC strategy is simple, and thus it’s easy to implement. To obtain the instantaneous power outputs and compensations, the PS and NS components of system voltage and current are required. The equations used for sequence component extraction are [24,25]:
{ v s α p = 1 2 [ v s α ( t ) v s β ( t T / 4 ) ] , v s β p = 1 2 [ v s α ( t T / 4 ) + v s β ( t ) ] v s α n = 1 2 [ v s α ( t ) + v s β ( t T / 4 ) ] , v s β n = 1 2 [ v s α ( t T / 4 ) + v s β ( t ) ]
where T denotes one cycle period of voltage and current, v and v are the α- and β-axis components of vector Vs, and vsαp, vsαn, vsβp, and vsβn are their respective PS and NS components.
Considering the signals of interest have narrow frequency bands, a transfer function, based on cascaded low pass filters as in Equation (56), is used to obtain the T/4 delayed signals. This cascade achieves 90-degree phase lag with negligible amplitude attenuation for the frequency of interest. In addition, this low pass filter can be easily decomposed into two cascaded first-order low pass filters, which is easy to implement in digital signal processors.
H 1 ( s ) = ω 0 s + ω 0 ω 0 s + ω 0 = ω 0 2 ( s + ω 0 ) 2
The block diagram of PS and NS component extraction in static two-phase reference is shown in Figure 4. If the actual frequency deviates from ω0, a set of filters can be used to make the control system adapt to large frequency variations.

4. Simulation Study

4.1. General Configuration

The schematic of the VSC-HVDC system and its main parameters are as shown in Figure 1. The simulation studies are performed using a discrete model with a time step of 1 μs. Both the sampling and control periods are 100 μs. As time delays exist in practice, a 100 μs delay is inserted between the modulation reference output and the space vector pulse width modulation (SVPWM) generator. The forward voltage drop for IGBT and the anti-parallel diode are 50 V and 60 V, respectively. The switching frequency is 2 kHz, and the turn-on and turn-off time for each device are both 3 μs. A dead time of 2 μs is also set for the turn-on signals of each switching device. The main parameters of the designed IRSMC DPC controller are listed in Table 1.
For the purpose of simplicity, the per-unit values are used in the simulation results. The voltage bases are 40 kV for ac system and 100 kV for dc system, and the power base is 80 MVA. To maintain the voltage along the transmission line in a certain range, the dc bus voltage of CS1 is controlled at 1.025 p.u. The symbols used in the simulation results and their meanings are listed in Table 2.

4.2. Simulation Results

Figure 5 shows the responses of CS1 and CS2 to sudden grid voltage unbalance disturbances. The control objectives for CS1 and CS2 are to obtain constant active and reactive power, respectively. Initially, the grid voltage is balanced. At 0.05 s, voltage unbalance occurs and this lasts for 0.1 s. From 0.15 s onward, the grid voltage recovers to the initial state. The grid voltage at the PCC of CS1 and CS2 are shown in Figure 5b,d, and the degree of the NS voltage unbalance are about 5% and 6.5%, respectively. For comparison, Figure 5e,f shows responses of CS1 to the disturbance with only the proportional and resonant actions (namely RSMC DPC controller). For this RSMC DPC controller, the integral gain KPI and KQI are zero, the sliding mode gain KPS, KQS and the resonant gain KPR, KQR are the same as those listed in Table 1.
From Figure 5, we can see that the control objectives for both CS1 and CS2 are achieved with the proposed IRSMC DPC strategy. The active power ripples at the PCC of CS1 and the reactive power ripples at the PCC of CS2 are eliminated, and the other power terms accurately track their respective references. From Figure 5a, we can observe that there’re obvious dc voltage ripples, although active power ripples at the PCC of CS1 are removed. This is because the NS current is indispensible for this objective. The existence of the NS current makes the instantaneous active power consumption in the ac line inductor non-zero, but sinusoidal components oscillating at twice the grid frequency, as has been analyzed in section two.
From Figure 5e,f, we can see that accurate power control objectives cannot be achieved by the RSMC DPC controller. In Figure 5e, P1vref denotes the expected active power output from the PCC of CS1. Here, the active power output tracks P1vref, because this term is indirectly governed by the dc voltage (PI) control loop. We can also find from the figures that the power ripple tracking can be realized for both active and reactive power, and as a result, ac currents are sinusoidal waveforms. However, obvious (average) power regulation errors are produced for both of the power control sub-systems due to lack of the integral actions.
In Figure 6, responses of CS1 and CS2 to active power step changes, initiated by CS2 side under grid voltage unbalance, are illustrated. For this study, the grid voltage conditions are the same as the unbalanced disturbances used in Figure 5, and CS1 and CS2 are controlled to obtain balanced ac current and to remove active power ripples, respectively. For comparison, Figure 6e,f shows the response of CS2 to the active power step changes with only the proportional and integral actions (namely ISMC DPC controller). For this ISMC DPC controller, the resonant gain KPR and KQR are zero, the integral gain KPI, KQI and the sliding mode gain KPS, KQS are the same as listed in Table 1.
We can observe from Figure 6 that the power control objectives for both CS are achieved with the IRSMC DPC strategy. The ac current on CS1 side is three-phase balanced and sinusoidal, active power ripples at the PCC of CS2 are removed, all the power outputs track their respective references accurately. Both the active and reactive power outputs cannot track their respective references by the ISMC DPC controller, though accurate (average) power regulation objectives can be attained (see Figure 6e). As a consequence, ac current distortion occurs because the actual output of power ripples don’t make Equation (32) hold.
In Figure 7, the responses of CS1 and CS2 to sudden grid voltage unbalance disturbance, in the presence of parameter inaccuracy are shown. In this study, the grid voltage conditions for both CS are the same as those used for Figure 5, but (m, n) for CS1 and CS2 are set to (0.5, 1.5) and (1.2, 0.8), respectively. To investigate the robustness of the IRSMC DPC strategy, ac line inductance of CS1 and CS2 are set 20% smaller than the designed values. This poses more severe threats to system stability than when the inductance is larger than the designed value. In addition, we set the grid frequency for CS1 and CS2 to 49.5 Hz and 50.5 Hz, respectively.
We can observe from Figure 7 that the expected power control objectives are achieved with the IRSMC DPC strategy, in the presence of parameter inaccuracy and frequency deviation. Both power outputs track their references accurately, and the OAC of active and reactive power ripples can be controlled continuously. This enables the VSC-HVDC system to provide flexible power control functions according to actual operating conditions, which is a potential benefit for the performance of the system on both the ac and dc sides.

5. Conclusions

This paper proposes an integral plus resonant sliding mode direct power control (IRSMC DPC) strategy for VSC-HVDC systems, under unbalanced grid voltage conditions. The generalized power compensation method presented enables the VSC-HVDC system to provide flexible power control functions, so that the desired system performance on both the ac and dc sides can be obtained under different operating conditions. The adoption of sliding mode control ensures system robustness to parameter uncertainty and disturbance, within certain bounds. By designing a SMC-based power controller consisting of the proportional, integral and resonant control laws, accurate power control objectives for VSC-HVDC system under grid voltage unbalance can be achieved. Simulation results show that the proposed IRSMC DPC strategy can provide satisfactory performance of the system over a large range of operating conditions. In building the model and designing the control law, some practical factors such as imperfection of switching devices and time delays etc., that may affect significantly system performance have been considered. Nevertheless, in order to verify the effectiveness of the strategy in real-world systems, and put it into application, experiments are necessary, which will be studied in future works.

Acknowledgments

This work is supported by the National Key R&D Program of China (2016YFB0900500).

Author Contributions

Weipeng Yang conceived and performed the research; Jungang Li built the model; Hang Zhang designed parameters of the model; Guoqi Li designed the control law; Weipeng Yang and Aimin Zhang wrote the paper, Jianhua Wang revised the manuscript. All of the authors were involved in preparing this manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Single-line diagram of the two-terminal voltage source converter high voltage direct current (VSC-HVDC) system studied.
Figure 1. Single-line diagram of the two-terminal voltage source converter high voltage direct current (VSC-HVDC) system studied.
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Figure 2. Schematic of three-phase VSC for each converter station.
Figure 2. Schematic of three-phase VSC for each converter station.
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Figure 3. Control structure of the proposed integral plus resonant sliding mode direct power control (IRSMC DPC) strategy.
Figure 3. Control structure of the proposed integral plus resonant sliding mode direct power control (IRSMC DPC) strategy.
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Figure 4. Block diagram of sequence component extraction.
Figure 4. Block diagram of sequence component extraction.
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Figure 5. System response to grid voltage unbalance disturbances. (a) dc bus voltage, active and reactive power for CS1 by IRSMC DPC controller; (b) grid voltage and ac current for CS1 by IRSMC DPC controller; (c) dc bus voltage, active and reactive power for CS2 by IRSMC DPC controller; (d) grid voltage and ac current for CS2 by IRSMC DPC controller; (e) dc bus voltage, active and reactive power for CS1 by RSMC DPC controller; (f) grid voltage and ac current for CS1 by RSMC DPC controller.
Figure 5. System response to grid voltage unbalance disturbances. (a) dc bus voltage, active and reactive power for CS1 by IRSMC DPC controller; (b) grid voltage and ac current for CS1 by IRSMC DPC controller; (c) dc bus voltage, active and reactive power for CS2 by IRSMC DPC controller; (d) grid voltage and ac current for CS2 by IRSMC DPC controller; (e) dc bus voltage, active and reactive power for CS1 by RSMC DPC controller; (f) grid voltage and ac current for CS1 by RSMC DPC controller.
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Figure 6. System response to active power step changes under grid voltage unbalance. (a) dc bus voltage, active and reactive power for CS1 by IRSMC DPC controller; (b) grid voltage and ac current for CS1 by IRSMC DPC controller; (c) dc bus voltage, active and reactive power for CS2 by IRSMC DPC controller; (d) grid voltage and ac current for CS2 by IRSMC DPC controller; (e) dc bus voltage, active and reactive power for CS2 by ISMC DPC controller; (f) grid voltage and ac current for CS2 by ISMC DPC controller.
Figure 6. System response to active power step changes under grid voltage unbalance. (a) dc bus voltage, active and reactive power for CS1 by IRSMC DPC controller; (b) grid voltage and ac current for CS1 by IRSMC DPC controller; (c) dc bus voltage, active and reactive power for CS2 by IRSMC DPC controller; (d) grid voltage and ac current for CS2 by IRSMC DPC controller; (e) dc bus voltage, active and reactive power for CS2 by ISMC DPC controller; (f) grid voltage and ac current for CS2 by ISMC DPC controller.
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Figure 7. System response to grid voltage unbalance disturbance in the presence of parameter inaccuracy and frequency deviation by the proposed IRSMC DPC controller. (a) dc bus voltage, active and reactive power for CS1; (b) grid voltage and ac current for CS1; (c) dc bus voltage, active and reactive power for CS2; (d) grid voltage and ac current for CS2.
Figure 7. System response to grid voltage unbalance disturbance in the presence of parameter inaccuracy and frequency deviation by the proposed IRSMC DPC controller. (a) dc bus voltage, active and reactive power for CS1; (b) grid voltage and ac current for CS1; (c) dc bus voltage, active and reactive power for CS2; (d) grid voltage and ac current for CS2.
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Table 1. Main Parameters of the IRSMC DPC Controller.
Table 1. Main Parameters of the IRSMC DPC Controller.
ParameterValueParameterValue
KPI, KQI50KPR, KQR2.5
KPS, KQS1200ωc10
Table 2. Symbols used in the simulation results and their meanings.
Table 2. Symbols used in the simulation results and their meanings.
SymbolMeaning
Vdc1, Vdc2Dc bus voltage on CS1 and CS2 side
E1abc, E2abcGrid voltage on CS1 and CS2 side
I1abc, I2abcAc current on CS1 and CS2 side
P1, Q1, P2, Q2Active and reactive power at PCC of CS1 and CS2
P1ref, Q1ref, P2ref, Q2refActive and reactive power references to respective power control loop for CS1 and CS2

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MDPI and ACS Style

Yang, W.; Zhang, A.; Li, J.; Li, G.; Zhang, H.; Wang, J. Integral Plus Resonant Sliding Mode Direct Power Control for VSC-HVDC Systems under Unbalanced Grid Voltage Conditions. Energies 2017, 10, 1528. https://doi.org/10.3390/en10101528

AMA Style

Yang W, Zhang A, Li J, Li G, Zhang H, Wang J. Integral Plus Resonant Sliding Mode Direct Power Control for VSC-HVDC Systems under Unbalanced Grid Voltage Conditions. Energies. 2017; 10(10):1528. https://doi.org/10.3390/en10101528

Chicago/Turabian Style

Yang, Weipeng, Aimin Zhang, Jungang Li, Guoqi Li, Hang Zhang, and Jianhua Wang. 2017. "Integral Plus Resonant Sliding Mode Direct Power Control for VSC-HVDC Systems under Unbalanced Grid Voltage Conditions" Energies 10, no. 10: 1528. https://doi.org/10.3390/en10101528

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