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A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications
Min-Cheng Chen 1,*

,
Hao-Yu Chen 1,2 
,
Chia-Yi Lin 1 
,
Chao-Hsin Chien 2 
,
Tsung-Fan Hsieh 3 
,
Jim-Tong Horng 3 
,
Jian-Tai Qiu 3 
,
Chien-Chao Huang 1 
,
Chia-Hua Ho 1 
and
Fu-Liang Yang 1 
1
National Nano Device Laboratories, No. 26, Prosperity Road 1, Hsinchu Science Park, Hsinchu 300, Taiwan
2
Institute of Electronics, National Chiao Tung University, Hsin-Chu 300, Taiwan
3
Graduate Institute of Biomedical Sciences, Chang Gung University, Taoyuan 333, Taiwan
* Author to whom correspondence should be addressed.
Received: 13 January 2012; in revised form: 20 February 2012 / Accepted: 22 March 2012 / Published: 26 March 2012
Abstract: This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording.
Keywords: nano-sensor fabrication; nanowire FET; nonvolatile memories; semiconductive sensors
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Cite This Article
MDPI and ACS Style
Chen, M.-C.; Chen, H.-Y.; Lin, C.-Y.; Chien, C.-H.; Hsieh, T.-F.; Horng, J.-T.; Qiu, J.-T.; Huang, C.-C.; Ho, C.-H.; Yang, F.-L. A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications. Sensors 2012, 12, 3952-3963.
AMA Style
Chen M-C, Chen H-Y, Lin C-Y, Chien C-H, Hsieh T-F, Horng J-T, Qiu J-T, Huang C-C, Ho C-H, Yang F-L. A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications. Sensors. 2012; 12(4):3952-3963.
Chicago/Turabian Style
Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang. 2012. "A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications." Sensors 12, no. 4: 3952-3963.