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Sensors 2012, 12(10), 13126-13149; doi:10.3390/s121013126

A Low Cost Matching Motion Estimation Sensor Based on the NIOS II Microprocessor

1
Department of Computer Architecture and Automation, Complutense University of Madrid, Madrid 28040, Spain
2
Department of Electrical and Computer Engineering, FAMU-FSU College of Engineering, Tallahassee, FL 32310, USA
*
Author to whom correspondence should be addressed.
Received: 27 July 2012 / Revised: 5 September 2012 / Accepted: 11 September 2012 / Published: 27 September 2012
(This article belongs to the Special Issue Ultra-Small Sensor Systems and Components)
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Abstract

This work presents the implementation of a matching-based motion estimation sensor on a Field Programmable Gate Array (FPGA) and NIOS II microprocessor applying a C to Hardware (C2H) acceleration paradigm. The design, which involves several matching algorithms, is mapped using Very Large Scale Integration (VLSI) technology. These algorithms, as well as the hardware implementation, are presented here together with an extensive analysis of the resources needed and the throughput obtained. The developed low-cost system is practical for real-time throughput and reduced power consumption and is useful in robotic applications, such as tracking, navigation using an unmanned vehicle, or as part of a more complex system.
Keywords: computer vision; optical flow; block matching algorithm; NIOS II; very large scale integration (VLSI); FPGA; embedded systems computer vision; optical flow; block matching algorithm; NIOS II; very large scale integration (VLSI); FPGA; embedded systems
This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

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MDPI and ACS Style

González, D.; Botella, G.; Meyer-Baese, U.; García, C.; Sanz, C.; Prieto-Matías, M.; Tirado, F. A Low Cost Matching Motion Estimation Sensor Based on the NIOS II Microprocessor. Sensors 2012, 12, 13126-13149.

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