Performance Analysis of a 3D Wireless Massively Parallel Computer
AbstractIn previous work, the authors presented a 3D hexagonal wireless direct-interconnect network for a massively parallel computer, with a focus on analysing processor utilisation. In this study, we consider the characteristics of such an architecture in terms of link utilisation and power consumption. We have applied a store-and-forward packet-switching algorithm to both our proposed architecture and a traditional wired 5D direct network (the same as IBM’s Blue Gene). Simulations show that for small and medium-size networks the link utility of the proposed architecture is comparable with (and in some cases even better than) traditional 5D networks. This work demonstrates that there is a potential for wireless processing array concepts to address High-Performance Computing (HPC) challenges whilst alleviating some significant physical construction drawbacks of traditional systems. View Full-Text
Share & Cite This Article
Kamali Sarvestani, A.M.; Bailey, C.; Austin, J. Performance Analysis of a 3D Wireless Massively Parallel Computer. J. Sens. Actuator Netw. 2018, 7, 18.
Kamali Sarvestani AM, Bailey C, Austin J. Performance Analysis of a 3D Wireless Massively Parallel Computer. Journal of Sensor and Actuator Networks. 2018; 7(2):18.Chicago/Turabian Style
Kamali Sarvestani, Amir M.; Bailey, Christopher; Austin, Jim. 2018. "Performance Analysis of a 3D Wireless Massively Parallel Computer." J. Sens. Actuator Netw. 7, no. 2: 18.
Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.