Floating Ni Capping for High-Mobility p-Channel SnO Thin-Film Transistors

Abstract

We utilized Ni as a floating capping layer in p-channel SnO thin-film transistors (TFTs) to improve their electrical performances. By utilizing the Ni as a floating capping layer, the p-channel SnO TFT showed enhanced mobility as high as 10.5 cm²·V⁻¹·s⁻¹. The increase in mobility was more significant as the length of Ni capping layer increased and the thickness of SnO active layer decreased. The observed phenomenon was possibly attributed to the changed vertical electric field distribution and increased hole concentration in the SnO channel by the floating Ni capping layer. Our experimental results demonstrate that incorporating the floating Ni capping layer on the channel layer is an effective method for increasing the field-effect mobility in p-channel SnO TFTs.

1. Introduction

Nowadays, oxide semiconductor-based thin-film transistors (TFTs) have gained significant attention as the backplane of various displays because of their merits including high mobility, good operational stability, low process temperature, and excellent uniformity [1,2,3,4,5,6]. However, most of oxide-TFT logic circuits were fabricated using only n-channel TFTs because the electrical properties of p-channel oxide TFTs are still much poorer than those of n-channel oxide TFTs [7,8,9,10]. Complementary logic circuits consisting of n- and p-channel transistors have advantages over n-channel logic ones in terms of static power consumption and noise immunity [11,12,13,14,15]; therefore, to use oxide TFTs in more diverse applications, it is crucial to improve the electrical properties of p-channel oxide TFTs. Up till date, various p-type oxide semiconductors of Cu₂O [16,17], CuO [18,19], NiO [20,21,22], doped ZnO [23], and SnO [24,25,26], have been studied as channel materials for p-channel oxide TFTs. Among these p-type channel materials, SnO has gained special attention; this is because the hybridization of the O 2p and Sn 5_S orbitals in the valence-band edge form the pseudo-closed ns² orbitals in SnO, thereby providing an effective hole conduction path [27,28]. However, despite intensive research, most p-channel SnO TFTs reported thus far exhibit low field-effect mobilities (μ_FEs) of ~1–3 cm²·V⁻¹·s⁻¹ [29,30,31,32], thus limiting the development of oxide TFT-based advanced electronic systems. In this study, we fabricated a high mobility p-channel SnO TFT with a μ_FE of 10.5 cm²·V⁻¹·s⁻¹ utilizing a floating Ni capping layer. Metal or metal-oxide-based floating capping layers have been frequently used to increase the μ_FE values of various n-channel oxide TFTs [33,34,35,36,37]. However, no study has yet reported the effects of using a metal capping layer in p-channel oxide TFTs. As far as we know, the μ_FE of 10.5 cm²·V⁻¹·s⁻¹ is the highest value reported in p-channel SnO TFTs to date. Therefore, our experimental results are expected to be widely used in diverse fields requiring high-mobility p-channel oxide TFTs.

2. Experimental Procedure

Figure 1a,b shows the schematic structure and optical microscope image, respectively, of the p-channel SnO TFT with a floating Ni capping layer. The p-channel SnO TFTs were fabricated on thermal SiO₂ (40 nm)/highly doped n-type silicon wafer (resistivity < 0.005 Ω·cm), where the highly doped silicon wafer acted as the gate of the TFTs. A 16-nm-thick thin-film was formed using radio frequency (RF) magnetron sputtering with a Sn target (3-inch diameter, 99.999%) without substrate heating in an Ar/O₂ ambient (Ar/O₂ = 90 sccm/4 sccm) as a channel layer of the TFTs. The deposition pressure, wafer-to-target distance, and RF power were 3 mTorr, 140 mm, and 60 W, respectively. The thin film deposited on the SiO₂/n-type silicon wafer was then thermally treated at 180 °C in air ambient for 30 min by using a hot plate [38]. Subsequently, the source/drain electrodes were deposited with 100 nm thick indium-tin oxide (ITO) by using direct current magnetron sputtering; the 70 nm thick Ni floating capping layer was deposited using an e-beam evaporation system. Then, the fabricated devices were subjected to additional thermal treatment at 180 °C for 30 min in air. In this work, Ni was chosen as a material for a floating capping layer because of its high work function and an economical price. Finally, a SU-8 photoresist (thickness: 2 μm) was spin-coated as a passivation layer via the procedure described in our previous paper [39]. A lift-off process was applied to form every layer in this work. The structural properties of the tin oxide thin film were examined by X-ray diffraction (XRD, Rigaku, Tokyo, Japan) with CuKα radiation (λ = 1.5418 Å) at 40 kV and 200 mA. The chemical state and composition of the tin oxide thin film were evaluated by X-ray photoelectron spectroscopy (XPS, Thermo Fisher Scientific, East Grinstead, UK) with Al-Kα source (1486.6 eV) having a 100 μm aperture diameter. The electrical properties of the fabricated SnO TFTs were characterized at room temperature inside the dark chamber using a semiconductor parameter analyzer (Agilent Technologies., Santa Clara, CA, USA).

3. Results and Discussion

Figure 2a shows the XRD patterns of the thin film formed on the SiO₂/n-type silicon wafer. We can observe several diffraction peaks from the XRD characterization results, which implies that the thin film is polycrystalline. The XRD patterns in Figure 2a match with the (002), (101), (103), (110), (112), (200), and (211) planes of the tetragonal SnO phase (PDF card number 04-008-7670), which indicates that the dominant phase of the deposited thin film is SnO. Figure 2b shows the XPS Sn 3d_5/2 spectra of the deposited thin film. The XPS spectra were deconvoluted into three sub-peaks stemming from the oxidized states of Sn with 3 different oxidation numbers; here, the binding energies of the Sn⁰, Sn²⁺, and Sn⁴⁺ components were 484.8, 486.0, and 486.7 eV, respectively [40]. Figure 2c shows the relative peak area ratios of the Sn⁰, Sn²⁺, and Sn⁴⁺ components calculated from the XPS spectra of the tin oxide thin film in Figure 2b. The XPS characterization results show that the deposited thin film is composed of Sn (15.8%), SnO (78.9%), and SnO₂ (5.3%); however, Sn²⁺ and SnO are the dominant states/phases.

The results in Figure 2c are consistent with the XRD characterization results in Figure 2a. Figure 3a,b compares the semi-logarithmic- and linear-scale transfer characteristics of the pristine SnO TFT with those of the SnO TFTs having different lengths of the floating Ni capping layer, respectively. Here, I_D, V_GS, and V_DS represent the drain current, gate-source voltage, and drain-source voltage, respectively. The width/length (W/L) ratio of the channel was 500 μm/700 μm in all TFTs and those of the floating Ni capping layer (W_C/L_C) were 700 μm/100 μm, 700 μm/400 μm, and 700 μm/600 μm. Measurements were conducted at V_DS = −1.0 V for all TFTs. From the results in Figure 3, it is evident that the floating Ni capping layer enhances the μ_FE of the SnO TFT, and μ_FE increases significantly with an increase in L_C. Moreover, we can observe that the threshold voltage (V_TH) and turn-on voltage (V_ON) move slightly toward the positive direction in the SnO TFTs with the floating Ni capping layer compared to the pristine SnO TFT.

Table 1. Electrical parameters measured for the pristine SnO TFT and SnO TFTs with different L_C values.

	w/o Ni Capping	Lc = 100 μm	Lc = 400 μm	Lc = 600 μm
μFE (cm2/V·s)	1.7	1.9	4.0	10.5
SS (V/decade)	3.1	2.9	2.8	2.5
VTH (V)	5.2	5.4	5.8	6.1
VON (V)	12.5	12.6	12.9	13.2

shows the electrical parameters calculated from the SnO TFTs with different Lc values. Here, V_TH was extracted from the intercept of the linearly extrapolated curve with the V_GS axis in Figure 3a and was calculated from the maximum value of the transconductance at V_DS = −1.0 V using the following equation:

$${\mu }_{FE}=\frac{L{g}_m}{W{C}_i{V}_{DS}}$$

(1)

where C_i is the capacitance of the gate dielectric per unit area and g_m is the transconductance. V_ON is the value of V_GS at which I_D increases. The subthreshold swing (SS) was calculated using the subthreshold region data in Figure 3b based on the following equation:

$$SS=\frac{d{V}_{GS}}{d\left(log{I}_D\right)}$$

(2)

The data in Table 1 show that the μ_FE of the SnO TFT increased from 1.7 to 10.5 cm²·V⁻¹·s⁻¹ after incorporating the floating Ni capping layer with L_C = 600 μm. Figure 4 displays the output characteristics of the floating-Ni-capped SnO TFT (L_C = 600 μm); the output characteristics show a solid pinch-off and strong saturation behavior. Experimental results in Figure 3 and Figure 4 demonstrate that incorporating of the floating Ni capping layer is an effective method for increasing the μ_FE value in p-channel SnO TFTs. Nevertheless, the physical mechanism responsible for the increase in μ_FE after forming the floating Ni capping layer in the p-channel SnO TFT is still controversial. The most plausible mechanism is the changed vertical electric field distribution inside the SnO channel by the floating Ni capping layer. We measured the work-function (Φ) of the deposited SnO thin-film as 4.68 eV using the Kelvin probe force microscopy method (Model: KP Technology SKP5050). Considering that Ni has Φ value (5.0–5.3 eV) higher than that of SnO [41,42], the back-surface potential of SnO changed such that the holes accumulated at the SnO-Ni interface. Figure 5a,b illustrates the band diagrams for pristine (without capping layer) and floating Ni capped SnO channels, respectively. In the pristine SnO TFT, the negative V_GS induces hole accumulation only at the front interface (SnO-SiO₂ interface). However, in the SnO TFT with the floating Ni capping layer, hole accumulation occurs at both front (SnO-SiO₂) and back (SnO-Ni) interfaces when the negative V_GS is applied to the gate electrode. Because the channel thickness of the fabricated SnO TFT is very low (t_SnO = 16 nm), two channels can overlap and form the bulk channel [42]. When the holes move through the bulk channel, they can avoid scattering at the interface, and μ_FE can be increased. The increase in μ_FE caused by the formation of the bulk channel is already reported in previous works for dual-gate IGZO (n-channel) [43] and SnO (p-channel) TFTs [44]. Another possible mechanism is the enhanced percolation conduction caused by the increased hole concentration in the SnO channel. The formation of hole accumulation layers by the floating Ni capping layer could have increased the hole concentration in SnO, which induced an increase in the percolation conduction probability and μ_FE value [45]. Studies have reported that the random distribution of Sn²⁺ ions modulates the electronic structure of SnO near the valence band maximum and form a potential barrier distribution with a width of a few tens of meV and a height of 0.10 eV [45]. Further studies need to be conducted to understand the exact physical mechanism responsible for the reported phenomenon in this work.

Figure 6a–c shows the linear scale transfer characteristics of the p-channel SnO TFTs with and without the floating Ni capping layer (L_C = 600 μm) obtained from devices having different t_SnOs of 16, 21, and 32 nm. The data show that μ_FE of the SnO TFT increases after forming the floating Ni capping layer in all devices; however, the degree of μ_FE enhancement decreases as the t_SnO increases. Figure 6d presents the ratios of the μ_FE extracted from the SnO TFT with the floating Ni capping layer (L_C = 600 μm) to that extracted from the SnO TFT without the capping layer in every TFT with different t_SnOs.

The results presented in Figure 6 show that the enhanced μ_FE in the SnO TFT with a floating Ni capping layer is not simply due to the additional conduction path formed by the capping layer, but are consistent with the possible physical mechanisms suggested in the above paragraph because decreases in channel thicknesses facilitate both the bulk channel formation and increase in the channel carrier concentration through band bending at the back-surface in the TFTs.

4. Conclusions

In this work, we studied the effects of incorporating a floating Ni capping layer on the electrical characteristics of p-channel SnO TFTs. The obtained results show that the floating Ni capping layer enhanced the μ_FE of the SnO TFT, and this enhancement became more significant with an increase in L_C and a decrease in t_SnO. Applying the floating Ni capping layer that almost covered the channel region (L_C/L = 600/700 μm) increased the μ_FE to a value as high as 10.5 cm²·V⁻¹·s⁻¹. Although the physical mechanism responsible for the reported phenomenon is still controversial, the formation of the bulk channel and increase in the percolation conduction probability are considered as possible mechanisms. We believe that our method can offer a simple and promising way to enhance the μ_FE of p-channel SnO TFTs.