Dual-Active-Bridge Model and Control for Supporting Fast Synthetic Inertial Action

Abstract

This article proposes a dual-active-bridge control to support the fast synthetic inertial action in DC microgrids. First of all, the selection of the isolated DC/DC converter to link an energy storage system with the DC bus in a microgrid is analyzed and the advantages of the dual-active-bridge converter controlled by a single-phase shift modulation justify its selection. An active front-end can be then adapted to connect the DC bus with an AC grid. Secondly, this paper presents the design of a discrete PI controller for supporting fast synthetic inertial action. In particular, a discrete dual-active-bridge model based on the transferred power between both converter bridges, which overcomes the approximations of the output current linearization model, is proposed. Moreover, the article introduces a novel equation set to directly and dynamically tune discrete PI parameters to fulfill the design frequency specifications based on the inversion formulae method. In this way, during the voltage/power transients on the DC bus, the controller actively responds and recovers those transients within a grid fundamental cycle. Since the developed set of control equations is very simple, it can be easily implemented by a discrete control algorithm, avoiding the use of offline trial and error procedures which may lead to system instability under large load variations. Finally, the proposed control system is evaluated and validated in PLECS simulations and hardware-in-the-loop tests.

1. Introduction

In conventional power plants, synchronous generators (SGs) are commonly used to convert mechanical power into electrical power. Electrical networks characterized by the presence of these generators are typically referred to as generator-dominated systems. In such networks, SGs slightly accelerate or decelerate during load transients to preserve power balance and system voltage and frequency stability [1]. The dynamics with which these changes of angular speed occur depend strongly on the inertia of the rotor [2]. As a result, whenever there is a sudden disturbance or transient in the grid, such as load or generation connection or disconnection, the variation of kinetic energy stored in the rotor temporarily restores the power imbalances until the intervention of the control on the turbines, which steadily clears out power level mismatches, voltage fluctuations, and frequency deviations. Therefore, sufficiently significant inertia acts as temporary energy storage before appropriate control action takes place [3].

In most cases, SGs operate within conventional fossil fuel-based power plants. However, extensive efforts are being made by the international community to reduce the use of fossil fuels in view of their long-term depletion and because of the known environmental and health issues caused by their combustion [4]. A solution to challenges caused by fossil fuels combustion is to move towards sustainable sources [5]. Such solutions are characterized by distributed generation (DG) systems, based on renewable energy sources (RESs), spreading widely throughout the electrical networks. The large penetration of DG systems has led to the widespread development of the microgrid concept [6]. These microgrids can be connected to the centralized power grid or operated in the islanded mode [7]. With a centralized power grid, microgrids are dominated by the SGs, which provide sufficient inertial support during power imbalances. On the contrary, in the case in which the microgrids are predominant, the diffusion of RES-based DGs, as in the extreme case of the islanded mode, the generator-dominated system becomes an inverter-dominated system (IDS) [8]. This IDS network suffers from low inertia since it has few rotating masses. The stability of such systems is supported by mimicking the synchronous generator rotor activity and providing the inertia virtually using energy storage systems (ESSs), such as batteries, flywheels and supercapacitors coupled with dedicated power converters [9].

To improve the stability of IDS, virtual inertia control (VIC) techniques have been studied and implemented in [10,11]. VIC is proposed mainly to reduce the voltage fluctuations and frequency deviation in the AC bus by the inverter in IDS. This process involves power injection/absorption, mainly to/from the batteries connected with a bidirectional DC-DC converter [12]. It stands clear that the DC bus voltage should be kept constant, permitting optimal inverter operability and achieving frequency and voltage stability in the AC bus using VIC. The control of IDS systems is very complex, and its effectiveness is unequivocally related by one side to the selection of the converter and by the other side to the considered control strategy.

In this paper, the bidirectional DC-DC converter model has been analyzed to achieve a fast response controller. The batteries with the proposed control algorithm for a DC-DC converter can quickly stabilize the DC bus voltage during power imbalances, which later connect to the grid-connected inverter that operates VIC. A similar approach can be adopted to improve the robustness of the DC-link in DC microgrids. In this paper, instead of using a non-isolated bidirectional DC-DC converter, as done in previous literature [13,14], an isolated bidirectional DC-DC converter is employed. Specifically, a dual-active-bridge (DAB) converter is used because it provides isolation through the high-frequency transformer, protecting the batteries during huge load transients or power network collapse, which even leads to avoiding the usage of a low-frequency transformer within the power network. Moreover, DABs can be controlled with different modulation techniques, such as the single-phase-shift (SPS), extended-phase-shift (EPS), dual-phase-shift (DPS), triple-phase-shift (TPS) which already exists in the previous literature [15]. Compared to the SPS, the other modulation techniques improve the degree of freedom, leading to optimizing the converter operation. However, with more degrees of freedom, there will be several control variables needed to be controlled, which makes it difficult to achieve sophisticated calculations and cohesive control [16]. Considering these difficulties with other modulation techniques, the SPS technique has been selected in this paper as it provides some major advantages, such as low switching losses, ease of implementation, high reliability and high efficiency (especially if wide bandgap technology is considered) [17,18]. This work demonstrates the possibility of obtaining performances, in terms of control dynamics, comparable or superior to the systems proposed in [12,19], indicating how the SPS-DAB converter’s fast response can ensure the stability of the network. Therefore, the proposed results can apply to inverter-dominated low and medium-voltage microgrids. The general schematic of the microgrid with isolated DC-DC converters is shown in Figure 1.

Broad research on the SPS-DAB converter for widespread diffusion in various applications has been carried out. However, modeling and stability analysis of the digital controlled DAB converter remains a challenge [20]. In particular, [21] demonstrated that the classical state-space averaging technique is unsuitable for capturing the DAB converter’s small-signal dynamic. This is due to the zero steady-state average value of the transformer current [22]. An improved generalized averaging model (GAM) was presented in [23]. However, this method considers only the first harmonic of the inductor current Fourier series. This approximation leads to a significant steady-state error for the large-signal model [24]. Third-order modeling was proposed in [25] to improve the overall accuracy. However, the complexity of the state-space model renders it challenging to find a direct relation in terms of the circuit parameters and small-signal transfer function useful for control design [26]. An alternative approach called the output current linearization (OCL) model is based on the power flow equations from the leading to lagging bridge. A comparative analysis between GAM and OCL models has been carried out in [27]. In particular, the GAM model presents a steady-state error in the large-signal model, as previously described, a magnitude error, and phase oscillations at the converter’s switching frequency. For these reasons, the OCL model has been selected for the design of the regulator in [27]. Generally, the controller design is achieved in the continuous-time domain meeting specifications on the open-loop transfer function, as the gain crossover frequency and phase margin. Alternatively, the design requirements refer to the settling time and the overshoot of the step response. The discrete-time controller is then achieved using discretization methods [27,28].

This paper presents a discrete DAB model based on the transferred power between both converter bridges, which overcomes the approximations introduced by the OCL model, which may affect the controller tuning process. The main idea is to change the generally adopted regulator control variable, i.e., the PMW phase shift, into the averaged output converter current. In this way, an effortless and linear first-order discrete transfer function of the system to be controlled can be obtained. The discrete controller parameters can be set based on the given design specifications. The PMW phase shift is then computed at the end of each sampling period, applying a proposed nonlinear function.

Based on DAB models, several regulators and control procedures can be found in the literature. However, there are still open issues to be tackled concerning the different application fields of the DAB converter. In particular, the essence of nonlinearity of the DAB converter may cause instability of the closed-loop system under a large load variation [29]. For this reason, easy trial and error procedures for classical PI/PID controllers are not suitable. More complex heuristic approaches, like the genetic algorithm technique, are used to minimize the error functions by applying optimization techniques, see [30]. In this case, the fractional PI controller has been considered. The main advantage of this controller over classical PI regulator is that it has a more degree of freedom, providing a broader range of controllability and more robustness to the system [31]. However, any inappropriate selection of the algorithm parameters, such as the population size, the rate of mutation, and crossover will produce inadequate results, see [32].

In this paper, the selected form of the regulator is the well-known discrete PI controller based on the trapezoidal integration method [33]. This choice is due to the simple structure of the PI controller, its wide use in microgrid controls, and its capability to automatically guarantee zero steady-state error on DC voltage step response. Moreover, discrete formulae for obtaining PI parameters as a function of DAB converter parameters are derived and presented. These parameters are derived through the so-called inversion formulae design method to exactly meet the gain crossover frequency and phase margin design specifications [34]. Since a phase margin equal to 75° guarantees good robustness on DAB converter and control system parameter variations, the PI proportional gain and integral time parameters can be analytically computed to exactly meet the given gain crossover frequency. Since the variation of this specification affects the response dynamic, it could be seen as a design requirement degree of freedom on the base of different operating modes of the DAB converter. For example, during the charging process of a battery, the DAB converter can be controlled to realize constant current (CC) mode, constant power (CP) mode, and constant voltage (CV) mode, while, when the battery works as an energy generator, the DAB converter control challenge is to stabilize undesired oscillations due to load variations promptly. When a large load power variation is generated, the control could be improved by changing the gain crossover frequency requirement. The presented discrete formulae for PI parameters can be easily implemented in a control algorithm for real-time parameters variation.

Firstly, this paper highlights the fast response controller, i.e., to stabilize the DC bus voltage, and the rest of the paper is divided into the following sections: Section 2 discusses the DAB converter with the single-phase shift controller. Section 3 discusses the proposed discrete control model and formulae for PI tuning. The simulation results, comparison with the method proposed in [35] for fast inertial action, and comparison of the proposed discrete control model with a classical pole-placement methodology are discussed in Section 4, respectively. Hardware-In-The-Loop (HIL) results and the comparison with simulation results are discussed in Section 5. Finally, the conclusions and perspectives about future developments of the work are reported in Section 6.

2. Dual-Active-Bridge Converter Connected to Energy Storage

The considered DAB converter topology is shown in Figure 2. Here, the converter input and output voltages represent the battery voltage $v_{bat}$ and the DC Bus voltage $v_{out}$, while $i_1$ and $i_2$ denote the DAB input and output currents, respectively. The output capacitor $C$ is characterized by the voltage $v_C$, the current $i_C$ and the equivalent series resistance $R_C$. The two symmetric H-bridges are interconnected by a high-frequency transformer. This is characterized by a turn ratio $n$, primary and secondary voltages $v_p$ and $v_s$, and a primary referred equivalent leakage inductance $L$, and its current $i_L$. Variables $Q_i$ are used to refer to the switching functions of the H-bridge switches. In the considered SPS modulation, the voltages of each bridge are square-wave modulated with a phase shift $\mathsf{\delta }\in \left[-\mathsf{\pi }/2:\mathsf{\pi }/2\right]$ between them. The switches operate at a 50% duty ratio and period $T_s=1/f_{s }($ where $f_{s }$ is the switching frequency) and following operation modes are described in

Table 1. SPS-DAB Operation Modes.

Mode	Conducting Switches	Duration
1	$Q_{1 }{Q}_4 Q_6 Q_7$	$\frac{\mathsf{\delta }}{\pi } \frac{T_s}{2}$
2	$Q_1 Q_4 Q_5 Q_8$	$\left(1-\frac{\mathsf{\delta }}{\pi }\right) \frac{T_s}{2}$
3	$Q_2 Q_3 Q_5 Q_8$	$\frac{\mathsf{\delta }}{\pi } \frac{T_s}{2}$
4	$Q_2 Q_3 Q_6 Q_7$	$\left(1-\frac{\mathsf{\delta }}{\pi }\right) \frac{T_s}{2}$

. The corresponding switching sequence and the main signals are represented in Figure 3. When $\mathsf{\delta }>0$, $v_p$ leads $v_s$, conversely $\mathsf{\delta }<0$ means that $v_p$ lags $v_s$. Note: All the abbreviations are well defined in the text and are also reported at the end of the paper.

The considered DAB converter model hinges on the conservation of the average value of the power $P\left(\mathsf{\delta },t\right)$ flowing in the DC input section, high-frequency switching bridge section, and DC output section,

$$P\left(\mathsf{\delta },t\right)={\overline{v}}_{bat}\left(t\right){\overline{i}}_1\left(\mathsf{\delta },t\right)={\overline{v}}_p\left(t\right){\overline{i}}_L\left(\mathsf{\delta },t\right)={\overline{v}}_{out}\left(t\right){\overline{i}}_2\left(\mathsf{\delta },t\right)$$

(1)

neglecting the power dissipation in the converter. Notice that the variables in Equation (1) represent the average values over a switching period of the correspondent signals. The power $P\left(\mathsf{\delta },t\right)$ can be computed by the average value of inductor current over a half switching period for symmetry conditions,

$${\overline{i}}_L\left(\mathsf{\delta },t\right)=\frac{1}{\mathsf{\pi }}\left[{{\displaystyle \int }}_0^{\mathsf{\delta }}{i}_L\left(\mathsf{\theta }\right)d\mathsf{\theta }+{{\displaystyle \int }}_{\mathsf{\delta }}^{\mathsf{\pi }}{i}_L\left(\mathsf{\theta }\right)d\mathsf{\theta }\right]$$

(2)

where $\mathsf{\theta }=2\mathsf{\pi }{f}_{s}t=\mathsf{\omega }t$. From Equations (1) and (2), it follows that:

$$P\left(\mathsf{\delta },t\right)=\frac{{\overline{v}}_{bat}\left(t\right){\overline{v}}_{out}\left(t\right)}{\mathsf{\omega }Ln}\mathsf{\delta }\left(t\right)\left[1-\frac{\left|\mathsf{\delta }\left(t\right)\right|}{\mathsf{\pi }}\right],$$

(3)

$${\overline{i}}_1\left(\mathsf{\delta },t\right)=\frac{{\overline{v}}_{out}\left(t\right)}{\omega Ln}\mathsf{\delta }\left(t\right)\left[1-\frac{\left|\mathsf{\delta }\left(t\right)\right|}{\pi }\right],$$

(4)

$${\overline{i}}_2\left(\mathsf{\delta },t\right)=\frac{{\overline{v}}_{bat}\left(t\right)}{\mathsf{\omega }Ln}\mathsf{\delta }\left(t\right)\left[1-\frac{\left|\mathsf{\delta }\left(t\right)\right|}{\pi }\right],$$

(5)

and the correspondent SPS-DAB model can be represented as in Figure 4 [29,36].

Classical compensator design requires perturbing and linearizing Equation (5) to obtain a linear small-signal model of the DAB converter. For this purpose, the output current linearization (OCL) method can be applied, see [27]. In particular, the phase shift can be rewritten as $\mathsf{\delta }\left(t\right)=\mathsf{\phi }+\hat{\mathsf{\delta }}\left(t\right)$, where $\mathsf{\phi }$ is the phase shift required to transfer the desired power $P_2=v_{out}^2/R$ at the correspondent operating point, and $\hat{\mathsf{\delta }}\left(t\right)$ is the small-signal variable. The phase shift at the steady-state condition can be calculated from Equations (1) and (5) as:

$$\mathsf{\phi }=\frac{\mathsf{\pi }}{2}\left(1-\sqrt{1-P_2\frac{8n{f}_{s}L}{v_{bat}{v}_{out}}}\right) .$$

(6)

In the same way, we can write ${\overline{i}}_2=I_2+{\hat{i}}_2$, where $I_2$ is the average current around the operation point, while ${\hat{i}}_2$ is the correspondent small-signal variable. Assuming that the first-order terms will be significantly more predominant than second-order terms, Equation (5) can be linearized around the operation point $\left(\mathsf{\phi },I_2\right)$. It follows that:

$${\overline{i}}_2\left(\mathsf{\delta },t\right)={\overline{i}}_2\left(\mathsf{\phi }\right)+\hat{\mathsf{\delta }}\left(t\right){\frac{\partial {\overline{i}}_2\left(\mathsf{\delta }\right)}{\partial \mathsf{\delta }}|}_{\mathsf{\delta }=\mathsf{\phi }}=I_2+\left(\hat{\mathsf{\delta }}\left(t\right)-\mathsf{\phi }\right)G_{i2d},$$

(7)

where,

$$I_2={\overline{i}}_2\left(\mathsf{\phi }\right)=\frac{v_{bat}}{\mathsf{\omega }Ln}\mathsf{\phi }\left[1-\frac{\left|\mathsf{\phi }\right|}{\pi }\right]; G_{i2d}=\frac{{\hat{i}}_2}{\hat{\mathsf{\delta }}\left(t\right)}=\frac{v_{bat}}{\mathsf{\omega }Ln}\left(1-\frac{2\mathsf{\phi }}{\mathsf{\pi }}\right).$$

(8)

Graphical representations of Equations (5) and (7) are shown in blue and orange lines in Figure 5.

The small-signal transfer function relating the phase angle to the output voltage,

$$G_{vd}=\frac{{\hat{v}}_{out}\left(s\right)}{\hat{\mathsf{\delta }}\left(s\right)}=\frac{b}{s+a},$$

(9)

where,

$$a=\frac{1}{RC}, b=\frac{v_{bat}}{\mathsf{\omega }LCn}\left(1-\frac{2\mathsf{\phi }}{\mathsf{\pi }}\right),$$

(10)

can be obtained as in [27], neglecting $R_C$. The controller $C_d\left(z\right)$ can be obtained by the discretization of Equation (9) and meeting design specifications in terms of phase margin and gain crossover frequency of the open-loop transfer function, see Figure 6.

3. The Proposed Discrete Control Method

This paper proposes a digital technique that overcomes the approximations introduced by the inductor current linearization and the consequent use of the small-signal DAB model in the controller tuning process. The main idea is to change the system control variable from the PMW phase shift $\mathsf{\delta }$, see Figure 6, to the mean value of the output converter ${\overline{i}}_2\left(z\right)$, see Figure 7.

In this way, the discrete-time system to be controlled has the following linear transfer function:

$$G_{vi}\left(z\right)=\frac{{\overline{v}}_{out}\left(z\right)}{{\overline{i}}_2\left(z\right)}=R_p\frac{z-\mathsf{\beta }}{z-\mathsf{\alpha }} ,$$

(11)

where,

$$R_p=\frac{R{R}_C}{R+R_C} , \mathsf{\alpha }=e^{-\frac{T_s}{C\left(R+R_C\right)}} , \mathsf{\beta }=\frac{\left(R+R_C\right)\mathsf{\alpha }-R}{R_C} .$$

(12)

Equations (11) and (12) have been obtained by the continuous-time counterpart $G_{vi}\left(s\right)={\overline{v}}_{out}\left(s\right)/{\overline{i}}_2\left(s\right)$ and the zero-order hold (ZOH) discretization method. In particular, the transfer function

$$G_{vi}\left(s\right)=R_p\frac{s+\overline{\mathsf{\beta }}}{s+\overline{\mathsf{\alpha }}}$$

(13)

where,

$$\overline{\mathsf{\alpha }}=\frac{1}{C\left(R+R_C\right)}, \overline{\mathsf{\beta }}=\frac{1}{C{R}_C},$$

(14)

has been derived by the circuit Kirchhoff’s laws of the circuit, shown in Figure 4, including the equivalent series resistance $R_C$.

The discrete compensator $C_i\left(z\right)$ can be designed to calculate the control variable ${\overline{i}}_2\left(z\right)$ to satisfy the given static and dynamic specifications.

The system is characterized by $G_{vi}\left(z\right)$ and is composed of the subsystems shown in Figure 8. In particular, the nonlinear function block $f\left({\overline{i}}_2\right)$ digitally computes the phase shift $\mathsf{\delta }\left(k\right)$ as function of ${\overline{i}}_2\left(k\right)$ using the following relation:

$$\mathsf{\delta }\left(k\right)=f\left({\overline{i}}_2\right)=\frac{\mathsf{\pi }}{2}\left(1-\sqrt{1-4\frac{{\overline{i}}_2\left(k\right)\mathsf{\omega }nL}{\mathsf{\pi }{\overline{v}}_{bat}}}\right),$$

(15)

which directly derives from Equation (5). The exact correspondence between ${\overline{i}}_2$ and $\mathsf{\delta }$ in Equation (15) avoids the linear approximation introduced in Equation (7). The SPS modulator generates the appropriate switching signals $Q_i$ according to the operation modes described in Table 1. The DC Bus voltage ${\overline{v}}_{out}$ is then sampled and held by the ADC converter.

PI Controller Model

The considered discrete-time PI controller can be described by the following expression:

$$C_i\left(z\right)=K_P\left(1+\frac{1}{T_i}\frac{z+1}{z-1}\right),$$

(16)

and the corresponding frequency response in rectangular form is given in Equation (17):

$$C_i\left(\mathsf{\omega },T_s\right)=K_P\left(1-j\frac{1}{T_i\tan \frac{\mathsf{\omega }{T}_s}{2}}\right).$$

(17)

Equation (17) can also be rewritten in polar form as a function of magnitude $M\left(\mathsf{\omega },T_s\right)$ and phase $\mathsf{\phi }\left(\mathsf{\omega },T_s\right)$,

$$C_i\left(\mathsf{\omega },T_s\right)=M{e}^{j\mathsf{\phi }}=M\cos \mathsf{\phi }+j\sin \mathsf{\phi },$$

(18)

while the frequency response of the discrete system of Equation (13) is:

$$G_{vi}\left(\mathsf{\omega },T_s\right)=R_p\left(\frac{1+\mathsf{\alpha }\mathsf{\beta }-\left(\mathsf{\alpha }+\mathsf{\beta }\right)\cos \mathsf{\omega }{T}_s+j\left(\mathsf{\beta }-\mathsf{\alpha }\right)\sin \mathsf{\omega }{T}_s}{1+{\mathsf{\alpha }}^2-2\mathsf{\alpha }\cos \mathsf{\omega }{T}_s}\right).$$

(19)

The proposed discrete formulae to exactly meet design specifications on zero position error, given gain crossover frequency ${\mathsf{\omega }}_g$, and phase margin ${\mathsf{\Phi }}_m$ of the loop gain transfer function $L\left(z\right)=C_i\left(z\right)G_{vi}\left(z\right)$, are:

$$K_P=M_g\cos {\mathsf{\phi }}_g,$$

(20)

$$T_i=-\frac{1}{\tan \left(\frac{{\mathsf{\omega }}_g{T}_s}{2}\right)\tan {\mathsf{\phi }}_g},$$

(21)

where,

$$M_g=\frac{1}{R_p} \sqrt{\frac{1+{\mathsf{\alpha }}^2-2\mathsf{\alpha }\cos {\mathsf{\omega }}_g{T}_s}{1+{\mathsf{\beta }}^2-2\mathsf{\beta }\cos {\mathsf{\omega }}_g{T}_s}},$$

(22)

$${\mathsf{\phi }}_g={\mathsf{\Phi }}_m-\mathsf{\pi }-{\tan }^{-1}\frac{\left(\mathsf{\beta }-\mathsf{\alpha }\right)\sin {\mathsf{\omega }}_g{T}_s}{1+\mathsf{\alpha }\mathsf{\beta }-\left(\mathsf{\alpha }+\mathsf{\beta }\right)\cos {\mathsf{\omega }}_g{T}_s}.$$

(23)

Since the DAB converter model is a type zero system, the pole at $-1$ of the PI controller guarantees zero steady-state error on nominal output voltage step response. Equations (20)–(23) have been obtained imposing that the open-loop response $L\left(\mathsf{\omega },T_s\right)$ as unity magnitude and phase are equal to ${\mathsf{\Phi }}_m-\mathsf{\pi }$ at frequency $\omega ={\mathsf{\omega }}_g$. This is when $\left|C_i\left({\mathsf{\omega }}_g,T_s\right)G_{vi}\left({\mathsf{\omega }}_g,T_s\right)\right|=1$ and $\angle C_i\left({\mathsf{\omega }}_g,T_s\right)+\angle G_{vi}\left({\mathsf{\omega }}_g,T_s\right)={\mathsf{\Phi }}_m-\pi$. From Equation (19), magnitude $M\left({\mathsf{\omega }}_g\right)=\left|C_i\left({\mathsf{\omega }}_g,T_s\right)\right|$ and the phase $\mathsf{\phi }\left({\mathsf{\omega }}_g\right)=\angle C_i\left({\mathsf{\omega }}_g,T_s\right)$ that the controller should have at a given frequency ${\mathsf{\omega }}_g$, are:

$$M_g=M\left({\mathsf{\omega }}_g\right)=1/\left|G_{vi}\left(e^{j{\mathsf{\omega }}_g{T}_s}\right)\right|$$

(24)

$${\mathsf{\phi }}_g=\mathsf{\phi }\left({\mathsf{\omega }}_g\right)={\mathsf{\Phi }}_m-\mathsf{\pi }-\angle G\left(e^{j{\mathsf{\omega }}_g{T}_s}\right).$$

(25)

By substituting Equations (17)–(19) in Equations (24) and (25), the following Equations (20)–(23) can be obtained, and this solution is admissible only if $K_P>0$ and $T_i>0$ [34].

4. Simulation Results

The PI controller and the SPS-DAB have been designed and carried out in the PLECS simulation software on two different resistive load values to verify the effectiveness of the proposed control in stabilizing the DC bus voltage. The simulation parameters are tabulated in

Table 2. Circuit parameters of the dual-active-bridge converter.

Parameter	Symbol	Value	Units
Battery voltage	$v_{bat}$	$600$	$\mathrm{V}$
Rated DC bus voltage	$v_{out}$	$600$	$\mathrm{V}$
Filter capacitance	$C$	$350$	$\mathsf{\mu }\mathrm{F}$
Series resistance	$R_c$	$1$	$\mathrm{m}\mathsf{\Omega }$
Leakage inductance	$L$	$53.64$	$\mathsf{\mu }\mathrm{H}$
Rated power	$P$	$10$	$\mathrm{kW}$
Switching frequency	$f_s$	$20$	$\mathrm{kHz}$
Sampling time	$T_s$	$0.1$	$\mathrm{ms}$
Transformer ratio	$n$	$1$	-

.

4.1. PI Design

The discrete-time system Equation (11), with the parameters shown in Table 2. The circuit parameters of the DAB converter are:

$$G_{vi}\left(z\right)=\frac{{\overline{v}}_{out}\left(z\right)}{{\overline{i}}_2\left(z\right)}=\frac{0.001·z+0.28}{z-0.99} .$$

(26)

The PI parameters can be designed to yield zero position error, a phase margin ${\mathsf{\Phi }}_m$ and a gain crossover frequency ${\mathsf{\omega }}_g$ of the open-loop frequency response equal to 75° and 1200 rad/s, respectively. They are $K_P=0.41,$ $T_i=60.58 s$. Using inversion Formulae (20)–(23), the PI controller has the following expression:

$$C_i\left(z\right)=\frac{0.41 z-0.39}{z-1}.$$

(27)

The Nyquist plot of the open-loop frequency response $L\left(\mathsf{\omega },T_s\right)$ is shown in Figure 9.

Notice that the design specifications are precisely met. The green lines represent the Nyquist plot of the open-loop frequency response $L\left(\mathsf{\omega },T_s\right)=C_i\left(\mathsf{\omega },T_s\right)G_{vi}\left(\mathsf{\omega },T_s\right)$ under a power load variation from 4 to 20 kW.

4.2. PLECS Simulation Results

The DAB converter and the controller are designed in two separate subsystems that can be used for offline and real-time simulation purposes. In particular, the controller subsystem has been developed, as shown in Figure 10. Nevertheless, the PI parameters have been derived for the discrete PI controller from Equation (16); they can also be used with other discrete-time controller types. Since PLECS discrete controller block implements the following parallel PI form selecting the trapezoidal integration method

$$C\left(z\right)=K_P+K_i\frac{Ts}{2} \frac{\mathrm{z} +1}{z-1} ,$$

(28)

the integral constant $K_i$ can be derived as

$$K_i=\frac{K_p}{T_i}\frac{2}{T_s} ,$$

(29)

To evaluate the performance of the implemented control, the system is brought to a steady-state condition by connecting a 60 Ω resistor as a load. This resistor value represents an equivalent 6 kW load. At instant t = 10 ms, a 4 kW increase in the load is emulated by lowering the resistor value to 36 Ω. As shown in Figure 11, the controller can react against the load variation and restore the rated output voltage in roughly 11 ms. At any moment of the transient, the voltage remains well confined within the ±5% of the nominal voltage (represented with the gray band).

Figure 12 shows the output power and voltage changes when load abruptly decreases from 10 kW to 6 kW at t = 10 ms. During this load transient, the DC bus voltage reaches a peak value of 614 V, and again the control allows the new steady-state within t = 11 ms. Moreso, in this case, voltage evolution is well limited within the ±5% boundary.

4.3. Simulated Performance Comparison for Fast Inertial Action

To evaluate the performance of the proposed controller, a comparison with the results presented in [35] has been made. This work, in fact, proposes a different control technique applied to the same DAB architecture supporting the fast synthetic inertial action. This work is taken as a reference for the comparison because, to the best of the authors’ knowledge, the technique presented guarantees one of the fastest responses found in the literature. The converter operates on a DC line at the rated voltage of 500 V, and the results summary of [35] are as follows: when the DC load changes from 12 kW to 6 kW, the DC bus voltage reaches 520 V, and when the DC load changes from 6 kW to 12 kW, the DC bus voltage reduces to 490 V with the settling time 0.4 s to 0.5 s. The authors of the paper claim that the dynamic of the control can be accelerated by modifying the virtual inertial time constant and damping coefficient, but with the cost of ripples in output power and output voltage.

Considering the same working conditions of the converter studied in [35], the controller proposed in the present work demonstrated better results in recovering the rated DC bus voltage in a much shorter time and guaranteed no oscillations. The following results are achieved with the phase margin ${\mathsf{\Phi }}_m$ and the gain crossover frequency ${\mathsf{\omega }}_g$ of the open-loop frequency response equal to 75° and 700 rad/s, respectively. When the DC load changes from 12 kW to 6 kW, the bus voltage varies by only 3.3 V, and the nominal value is restored in 14 ms. In such a case, the $K_P$ value remains fixed at 0.8006, while the $T_i$ value changes from 441.6 s to 488.9 s. When the DC load is increased from 6 kW to 12 kW, the DC bus voltage reduces to 496.9 V and the same settling time of 14 ms is maintained. In all the cases, the voltage does not overpass the ±5% nominal voltage threshold. The results are shown in Figure 13 and Figure 14, respectively.

4.4. Comparison of Proposed PI Controller Model with a Classical Pole-Placement Method

Apart from the previous discussion, to evaluate the effectiveness and to understand the robustness of the proposed discrete model, a comparison with the classical pole-placement method is studied in this section. Considering the same Table 2 circuit design specifications, new PI parameters are calculated using the classical pole-placement method for the second-order system [28,37]. In particular, considering the converter model (9), the parameters of the continuous-time PI controller $C\left(s\right)=K_P+\frac{K_i}{S}$ can be tuned by selecting the damping ratio and the natural frequency of the desired second-order closed-loop polynomial equal to 0.89 and 676 rad/s, respectively. These values lead to the same frequency design specifications considered in the proposed method when the load is at its nominal value. The resulting PI parameters are $K_P$ = 0.0051 and $K_i$ = 2.06. Bearing in mind that a discrete PI regulator has been used in the proposed model, the continuous-time PI controller in a classical pole-placement method is approximated using the trapezoidal discretization method and implemented in the PLECS simulation. Notice that the discretization process leads to a phase margin degradation from 75° to 73°. However, the PI parameters of a classical method are fixed, therefore the proposed model showed better results during the load transients. Figure 15 and Figure 16 show the simulation results during the load change from 6 to 10 kW and from 10 to 6 kW, respectively. Although in both the methods, the maximum overshoot and undershoot values are comparable and succeed in preserving the nominal voltage within the ±5% band, the settling time of the proposed controller is approximately 35% faster than the classical pole-placement method, maintaining the transient duration well within a grid fundamental period.

5. Hardware-in-the-Loop Results

The simulation results have been validated using the hardware-in-the-loop real-time testing platform RT Box 1 powered by PLECS. This device is fully integrated with the Xilinx Zynq system on a chip consisting of 64 digital and 32 analog I/O ports. The control hardware, i.e., Texas Instrument LaunchPad XL running the TMS320F28069M DSP, is connected to the RT Box for real-time operations using an RT Box LaunchPad Interface (Figure 17) [38]. In this experiment, the RT box is used to emulate the DAB converter, and the DSP runs the control scheme. The PWMs are generated with the switching frequency $f_{s }$ equal to 20 kHz, whereas the DAB converter operations are emulated with a sampling frequency of 100 kHz. The increase in the number of samples allows calculating the DAB converter’s output voltage accurately over a switching period. Due to the hardware limitations of the DSP, the operating frequency of the controller is limited to 10 kHz. The external setup has been made by connecting the RT Box 1 using an ethernet cable, and the DSP using the USB cable to the human interface device (Laptop/PC), which has PLECS (version 4.6.1) software installed in it. Once this external connection is made, the DAB and controller models are converted into the C code using the PLECS embedded coder. This PLECS embedded coder is a setting available in the PLECS software that enables the connection between the RT Box 1, DSP, and the PC and generates the C code for both the RT Box1 and DSP. More details regarding the setup and the code implementation procedure can be found in [39]. PLECS library has an inbuilt DAB converter block, which is suitable to use in the RT Box 1. Along with this converter block, analog I/O, digital I/O, analog-to-digital converter (ADC) blocks were used for transmitting and receiving the signals in between the RT Box 1 and DSP. Table 2 and

Table 3. PLECS hardware-in-the-loop parameters.

Parameter	Value	Units
Solver step size	$1$	$\mathrm{ms}$
Discretization step size for converter	$10$	$\mathsf{\mu }\mathrm{s}$
Discretization step size for controller	$100$	$\mathsf{\mu }\mathrm{s}$
Analog output scaling factor for voltage	$3.3/800$	$\mathrm{V}$
Analog output scaling factor for current	$3.3/40$	$\mathrm{A}$
Analog output offset value (voltage and current)	$0$	-
ADC voltage scaling factor	$800/3.3$	$\mathrm{V}$
ADC current scaling factor	$40/3.3$	$\mathrm{A}$
ADC offset value	$0$	-

parameters are considered and executed in the HIL experiment. The output power and output voltage are measured during the real-time operations, similar to the offline simulation.

The results of the real-time experiment shown in Figure 18 and Figure 19 are in good accordance with the results obtained from the offline simulation shown in Figure 11 and Figure 12.

The HIL results show that the DC bus voltage reaches the steady-state within 11 ms and the bus voltage varies by 12 V (i.e., 2%) during the DC load transients. A sub-cycle synthetic inertial action can be effectively supported by the settling time lower than a fundamental period and the voltage transient within the classical ±5% band.

For better understanding and visualizing purposes,

Table 4. Comparison of offline simulation and hardware-in-the-loop results.

Parameter	Nominal Values	6 kW to 10 kW Load Change		10 kW to 6 kW Load Change
		Simulation Result	HIL Result	Simulation Result	HIL Result
Power (kW)	$10$	$9.58$ maximum undershoot value	$9.60$ maximum undershoot value	$6.30$ maximum overshoot value	$6.25$ maximum overshoot value
DC bus voltage (V)	$600$	$588$ maximum undershoot value	$588$ maximum undershoot value	$614$ maximum overshoot value	$614$ maximum overshoot value

provides the comparison of obtained simulation results with HIL results. In both cases, the settling time is $11$ ms, whereas the voltage maximum overshoot and undershoot values are given below.

6. Conclusions

This paper addresses the discrete DAB converter model and the controller design for fast recovering voltage/power transients on the DC bus with sub-cycle transients compatible with synthetic inertia action. The proposed PI controller satisfies the exact standard design constraints, such as gain crossover frequency, phase margin, and zero position error. Moreover, the design has been developed so that PI parameters are updated in real-time without additional dedicated sensors. To prove the performance of the proposed controller, a comparison with the DAB parameters considered in [35] in the virtual inertial application point of view has been made and achieved the settling time of 14 ms with a 3.3 V voltage variation. Moreover, to understand the controller robustness, another comparison with the classical pole-placement method has been made. Even in this case, the results were promising, as it is proved that the proposed controller is 35% faster than the classical pole-placement method. HIL testing has also been carried out to verify that the controller can be implemented in real systems. Practically, the power/voltage transients compromise the safe and stable operation of DC microgrids or IDS networks, unless they are recovered within tens of milliseconds. Therefore, the proposed controller can be utilized in order to recover those transients and ultimately maintain grid stability. Since the controller design is based on the DAB converter power flow, more complex modulation strategies like dual-, triple-, and extended-phase-shift as well as the DAB in its three-phase structures, might be studied in the future to try and overcome the difficulties mentioned in the introduction, such as reducing the complex calculations and achieve unified control. The possibility to introduce supercapacitors and hybrid battery packs will also be considered in further contributions.