1. Introduction
The grid is a complex dynamic system originally. For controlling the current and grid voltage to obtain synchronization, it is indispensable to detect the variation of phase and frequency with grid voltage accurately and quickly. In addition, the explosive development of renewable energy, that is, wind and solar, results in the proportion of power electronic equipment in traditional power grid increasing gradually, such as grid-connected inverters, reactive compensators and other equipment, which brings a lot of new problems to the grid [
1,
2,
3], as well as increasing the difficulty to lock phase for phase-locked loop (PLL). There are two main schemes to realize the phase-locking, one based on PLL [
4,
5] that the paper focuses on and another without PLL [
6,
7] for the purpose of frequency tracking and phase locking of the gird. PLL is used to implement synchronization between the control loop and the grid system, however, a large amount of penetration of distributed generation systems in the grid will inevitably give rise to the grid system stability problem. Therefore, it is fairly necessary to research the phase-locked loop in order to ensure the system does not lose stability because of the phase synchronous problem.
In view of the PLL as an indispensable part of grid-connected system, scholars have always insisted on researching it to improve the performance of PLL. Synchronous reference frame-phase locked loop (SRF-PLL) is a common phase-locked way [
8,
9] due to simple control mode and fast response speed. However, if the conditions of voltage unbalance and high-order harmonics resulting from grid fault appear, SRF-PLL will have a larger error in phase locking. In light of decoupled double synchronous reference frame-PLL (DDSRF-PLL) [
10] utilizing the decoupling network to eliminate the double harmonics caused by the negative sequence component, a good result of phase lock is obtained [
11,
12,
13]. However, the method has a large amount of computation and slow dynamic response. Besides, the low pass filter will generate delay to some extent that may affect the real-time performance of the control. Whereas the second-order generalized integrator-PLL (DSOGI-PLL) can effectively deal with the inaccurate phase-locking problem of DDSRF-PLL under an unbalanced grid voltage fault. However, the phase-locked information cannot be accurately obtained under the condition of DC voltage and high harmonics included in the grid voltage. In [
14] Xie et al. compare systematically the seven advanced phase locking method based on the second-order generalized integrator (SOGI) in the inhibition capacity of DC bias, including the cascade SOGI, modified SOGI,
αβ-frame delayed signal cancellation (DSC), complex coefficient filter, in-loop dq-frame DSC, notch filter and moving average filter-based SOGI-PLL. However, the paper only considers the phase synchronization capacity of the PLL under DC bias without considering other conditions, such as three-phase unbalance of grid voltage; Jin et al. in [
15] proposes an adaptive filter based on SOGI to extract the positive and negative sequence of three-phase grid voltage, aiming at the tracking error generated by traditional PLL under harmonic distortion and grid asymmetry. However, the paper cannot explain detailed analysis on the PLL model. In allusion to the phenomenon that the traditional DSOGI-PLL cannot lock phase precisely when the DC components and high order harmonics are contained in the grid voltage, the paper proposes the improved second-order generalized integrator-quadrature signals generator (SOGI-QSG) structure. The SOGI-QSG is a significant part of the DSOGI-PLL. The grid voltage is transformed by Clark transform to be the input signal of the SOGI-QSG. The SOGI-QSG output signal is mutually orthogonal signals. Processing positive sequence q-axis signal can realize phase lock after the positive and negative sequence separation about SOGI-QSG output signals. The asymmetric three-phase voltage can be decomposed into positive sequence, negative sequence and zero sequence components by symmetrical component method. To extract the positive sequence component of the grid voltage signal, the phase offset signal of the original signal is necessary, that is, two phase orthogonal signals. It is important for DSOGI-PLL to analyze the SOGI-QSG characteristics and improve the SOGI-QSG structure.
The research on the stability of grid-connected LCL-type inverters is often based on the impedance model, which greatly simplifies the analysis complexity. Simultaneously, impedance stability criterion can be directly employed to evaluate the grid-connected system stability. Liu et al. in [
16] proposes the control strategy of optimization delay aiming to solving the problem that the control path calculation delay is not conductive to the system stability under the current control mode of LCL-type grid-connected inverter. The strategy is effective to improve the system stability. In [
17] Schiesser et al. proposes a simplified proportion multi-resonant (PMR) current controller tuning strategy considering grid-connected stability which effectively improves the current harmonic distortion, aiming to solve the problem of low frequency harmonics caused by the grid voltage distortion or the non-linear characteristics of current loop in the grid-connected voltage source inverter (VSI). Xin et al. in [
18] puts forward the inverter-side current feedback (ICF) without additional sensors to control the system harmonic, aiming to solving the problem that grid-connected current of LCL-type grid-connected inverter is vulnerable to the grid harmonic distortion. However, this method needs to use the resonant controller and additional compensation loop at the same time. Wen et al. in [
19] set up the small signal impedance model of three-phase grid-connected inverter considering feedback control and DDSRF-PLL in d-q coordinate. Based on the impedance, the influence of PLL, current loop and power loop on the inverter is discussed, and the influence of bandwidth in PLL on the system stability also is analyzed. The paper only establishes and analyzes the impedance model of an L-type grid-connected inverter based on small signal method without other simulation about control strategies. Zeng et al. in [
20] propose a novel impedance control strategy to reshape the output impedance of the PV grid-connected inverter in order to suppress the harmonic resonance phenomenon in the PV grid-connected system. For the aforementioned acumen, in [
21] Chen et al. studies the interaction between PV inverter and grid based on the impedance analysis. Active impedance control strategy based on voltage feedforward is proposed, so that the grid-connected inverter has better control robustness under different dynamic gird conditions. In [
22] Wu et al. deduces the stability criterion of a grid-connected inverter system considering PLL under different grid conditions, taking a single-phase LCL-type grid-connected inverter as an example. Meanwhile, the influence of PLL on the stability of single-phase LCL-type grid-connected inverter is also analyzed in detail, and the method of PLL parameter design based on the requirement of phase angle margin is proposed. For improving the stability of LCL-type grid-connected inverter, the output impedance model of LCL-type grid-connected inverter considering DSOGI-PLL structure is established. Meanwhile, the system phase margin at the impedance intersection is raised by introducing compensated grid-connected voltage into the current loop, thereby enhancing the system stability. The paper conducts research on the basis of three-phase LCL-type grid-connected inverter under the grid-connected current control mode. Aiming at the phenomenon that the traditional PLL cannot realize precise synchronization in the gird fault, the improved SOGI-QSG structure is presented, which can realize precise phase-locking in the grid fault, such as the unbalanced grid, DC components and harmonic included in the grid voltage. Meanwhile, the voltage feedback control strategy is introduced to raise the system stability based on impedance analysis. Firstly, an improved DSOGI-PLL is proposed to solve the problem that the original DSOGI-PLL cannot accurately lock the phase when the DC component included. Then, the output impedance mathematical model of LCL-type grid-connected inverter considering PLL is established and the stability of grid-connected inverter is analyzed based on the cascade stability criterion of impedance [
23,
24]. At last, the design parameters of improved SOGI-QSG structure and control strategy are displayed, which is verified by simulation. Simulation results show that the accuracy of improved PLL output frequency and the voltage and current characteristics of grid-connection are improved effectively.
2. Impedance Model
Figure 1 is the equivalent circuit of LCL-type inverter grid-connected system. The inverter adopts grid side current closed loop control mode.
Where
Zinv(
s) is the equivalent output impedance of the inverter AC terminal;
Zg(
s) is the equivalent impedance of the grid;
I(
s) is the equivalent current source of the inverter;
E(
s) is the ideal grid voltage source. Equation (1) is the expression of grid current
Ig(
s).
where
E denotes identity matrix.
In order to ensure the system stability under the conditions of impedance variation, the following two terms must be satisfied [
25]: (1) when the grid impedance is equal to zero, the system is stable; and (2) when the grid impedance exists,
Zg(
s)
(
s) needs to satisfy the impedance stability criterion. According to the Equation (1), the whole grid-connected system will be stable if the above terms can be satisfied at the same time. Then, the inverter output impedance and grid impedance are modeled respectively.
2.1. Grid Connected Inverter Model
A LCL-type grid-connected inverter can availably suppress the high-order harmonics of the grid current, while the grid inductance can also play a role in suppressing the impulse current.
Figure 2 is the grid-connected inverter topology which contains a LCL-type filter.
Where Udc and Idc represent DC link voltage and current respectively; L1, r1 represent the machine-side filter inductance and inductance parasitic resistance respectively; L2, r2 represent the grid-side filter inductance and inductance parasitic resistance respectively; Rd represents the damping resistance; C is the filter capacitance; Lg, rg represent the equivalent inductance and resistance of electric wires respectively; and ei (I = a,b,c) represents the ideal three-phase grid voltage.
Equation (2) is the state-space equation of grid-connected inverter in three-phase stationary coordinates.
where
ui,
ugi (
I = a,b,c) represent the three-phase voltage at the machine side and the grid side respectively;
ii (
I = A,B,C),
ii (
I = a,b,c) represent the three-phase current at the machine side and grid side respectively; and
uifc (
I = a,b,c) represents the capacitor terminal voltage.
The main circuit small signal simplified model is shown as Equation (3) obtained by analyzing Equation (2) with Laplace transform and the small signal analysis method.
where
represent current, voltage and duty ratio small signal perturbation on
d-q axis in grid side respectively;
Di (
I = d,q) represents duty ratio in steady state on
d-q axis;
represents the DC link voltage small signal perturbation;
Gg’ represents the grid-connected inverter output admittance; and
GgI represents the duty ratio to the grid side current transfer function.
Equations (4) and (5) denote the expressions of A and B respectively.
where
ω′ is the PLL output angular frequency.
The derivation of grid small signal model is similar to the grid-connected inverter. Equation (6) is the grid state-space equation in three-phase stationary coordinates.
The following Equation (7) showing the grid small signal model is received by transforming the Equation (6) with park transformation and small signal analysis method.
where
represent grid voltage small signal perturbation on
d-q axis.
2.2. Phase-Locked Loop Model
2.2.1. Traditional Second-Order Generalized Integrator-Quadrature Signals Generator Structure
Figure 3 is the traditional SOGI-QSG structure. The quadrature signal generator based on the traditional second-order generalized integrator (SOGI) not only can realize 90° phase angle offset of input signal, but also filter out high-order harmonics.
In
Figure 3,
ui is the input signal and
,
are SOGI-QSG output signals that are two orthogonal signals;
k is the damping coefficient;
ω′ is the PLL output angular frequency. Equations (8) and (9) denote the characteristic transfer functions of the SOGI-QSG.
2.2.2. Improved Second-Order Generalized Integrator-Quadrature Signals Generator Structure
Because
cannot suppress the dc component included in the input signals in the traditional SOGI structure, the improved SOGI-QSG structure is proposed shown in
Figure 4.
Equations (11) and (12) are the SOGI-QSG transfer functions after introducing feedback.
where
F(
s) is the high-pass filter and
Q2(
s) is the low-pass filter. The dc component and high-order harmonics input to the SOGI-QSG are weakened by feeding back
F(
s) and
Q2(
s) to the input signals. It is conducive to reducing the phase locking error.
Figure 5 shows the comparison of SOGI-QSG transfer function bode plot before and after PLL improvement. Obviously, the bandwidth of the improved SOGI-QSG is reduced and the filtering characteristic is enhanced. However, its dynamic performance is worse and the adjustment time is slightly longer.
Figure 6 shows the PLL output frequency waveform when the grid-connected voltage surges by 30%. The orange and light blue curves represent the PLL frequency output waveform of SOGI-QSG structure before and after improvement respectively. It can be seen from the Figure that the frequency fluctuation of improved SOGI-QSG structure is obviously reduced in the steady state, which indicates that the filtering effect of the improved structure is indeed greatly raised, however, it is not very good in the transient state. This is reasonable because the bandwidth of the improved SOGI-QSG transfer function decreases. The improved structure raises filtering performance at the expense of its dynamic characteristic. Therefore, the adjustment time is longer than the original structure output in the transient process. It also can be seen in the Figure that the dynamic response time of the improved SOGI-QSG output frequency has slightly increased, which has little impact on the overall performance of the structure compared with the improvement on filtering.
2.3. Inverter Impedance Model
2.3.1. Inverter Impedance Model without Feedback Control
As
Figure 7 shows, the DSOGI-PLL structure, the positive sequence q-axis signal which removed from SOGI output signal by positive and negative sequence separation, is processed to realize phase-locked. Equation (13) is the positive sequence signal expression under
α-
β coordinates.
where
D(
s),
Q(
s) are used to represent SOGI-QSG transfer function before and after improvement of SOGI-QSG, namely
D1(
s)
/D2(
s) and
Q1(
s)
/Q2(
s); Matrix
P is used to represent the previous matrix;
q = e−jπ2 is a 90° lagging phase-shifting operator applied on the time domain to obtain an in-quadrature version of the input waveform.
There are two kinds of coordinates in the whole system due to exist in PLL. One is the system
d-q coordinate defined by the grid voltage and another is the control loop
d-q coordinate defined by the PLL. Under a steady state, the control loop
d-q coordinate is consistent with the system
d-q coordinate. When a small disturbance happens in the grid voltage terminal, the system
d-q coordinate position will be changed. The control loop
d-q coordinate has not changed because the dynamic response characteristics of the PI controller in PLL which is no longer consistent with the system
d-q coordinate. There is an angle error between the two coordinates, that is ∆
θ. Equation (14) denotes the coordinate transformation of the system
d-q coordinate the control loop
d-q coordinate.
Figure 8 and
Figure 9 represent the DSOGI-PLL control strategy and the DSOGI-PLL average model respectively.
Equation (15) denotes the variables relationship between the system and the control loop under the steady-state condition when ∆
θ = 0.
where
xc (
x = U,
I,
D) represents the variables in the system’s main circuit;
xs (
x = U,
I,
D) represents the control loop variables. Equation (16) is obtained by adding a small signal disturbance to Equation (15).
where
represents the small signal voltage disturbance of main circuit in
d-q axis;
represents the small signal voltage disturbance of control loop in
d-q axis.
Equation (17) denotes the voltage expression under the control loop
d-q coordinate obtained by handling Equation (16) with trigonometric function approximation method in combination with the steady state condition.
According to the DSOGI-PLL average model in
Figure 8, PLL output angle ∆
θ can be written as Equation (18).
where
HPLL = kPLL_p + kPLL_i/s;
kPLL_p is the proportional coefficient of
PI regulator in PLL;
kPLL_i is the integral coefficient of
PI regulator in PLL. Equation (19), that ∆
θ is expressed by
and
, is received by substituting Equation (17) into Equation (18).
The
GPLL1 and
GPLL2 in the Equation (19) can be expressed as
The front part of Equation (22) can be derived from Equation (16) and the latter part can be obtained by substituting Equation (19) into the front part of Equation (22). Where
represent the transfer function matrix of the system voltage to the control loop voltage in
d-q axis.
The calculation method of transfer function
,
is similar to the
as above. Equations (24) and (25) are the derivation results of transfer function
,
respectively.
represent the transfer function matrix of the system voltage to the control loop current in
d-q axis;
represents the transfer function of the system voltage to the duty ratio.
Figure 10 shows the system small signal model considering the PLL. In
Figure 10,
Hig is the current loop PI regulator matrix;
M is the modulation matrix;
Gd is digital delay module, which means sampling switch, one beat delay and zero order retainer link are added to the model. Where
Hig = (
kp + ki/s)
*I;
M = (1
/Udc)
*I;
Gd = [(1 − 1.5
Tss)/(1 − 1.5
Tss)]
* I;
I is 2 × 2 unit matrix.
According to the system small signal control block diagram in
Figure 10, the grid-connected inverter output impedance
Zout mathematical model considering the PLL can be derived. As shown in the Equation (26).
2.3.2. Improved Inverter Impedance Model with Feedback Control
Figure 11 is the improved system small signal model with increased grid terminal voltage compensation.
F(
s) is the grid voltage feedback matrix expressed as Equation (27).
The improved grid-connected inverter output impedance
is shown as Equation (28) deriving from the improved system small-signal model.
where
,
represent the transfer function matrix with the improved SOGI-QSG structure of the system voltage to the control loop current and the duty ratio in
d-q axis respectively.
3. System Stability Analysis
In order to judge the system stability, the paper adopts the phase margin corresponding to the frequency of intersection between the inverter impedance amplitude-frequency curve and grid impedance amplitude-frequency curve as the judgement standard, as shown in Equation (29).
where
Zg(
fi) and
Zo(
fi) represent the grid input impedance and inverter output impedance of intersection frequency
fi respectively.
Figure 12 shows the inverter output impedance bode plot front and rear improvement. According to the Figure, the intersection point of amplitude-frequency characteristic curve between the inverter output impedance with feedback control and grid impedance moves to the right compared with the inverter output impedance without control strategy. The phase-frequency characteristic curve of inverter impedance with control strategy is raised compared with the inverter impedance without control strategy. Phase increasing causes the phase margin of the intersection point of amplitude-frequency characteristic between the inverter impedance with feedback control strategy and grid impedance to increase, this is helpful to the system stability in theory.
Figure 13 is the
Zdd bode plot with the damping resistance
Rd varying from 3 Ω to 10 Ω. In the process of damping resistance increasing, the amplitude-frequency curve intersection point of the inverter impedance and the grid impedance gradually moves to the right and the output impedance phase of the inverter impedance at the corresponding frequency of the intersection point gradually increases. The phase margin increasing gradually is beneficial to the system stability in theory.
Opposite to the variation trend of the damping resistance
Rd.
Figure 14 shows the
Zdd bode plot with the grid impedance
Lg = 2 mH,
rg = 0.1 Ω and
Lg = 5 mH,
rg = 0.1 Ω respectively. As the grid impedance increases, the intersection point of the inverter impedance and the grid impedance amplitude-frequency curve gradually move to the left and the output impedance phase of the inverter impedance at the corresponding frequency of the intersection point gradually decreases. Therefore, the increase of grid impedance is not conducive to the system stability theoretically.