Development and Implementation of Algorithms for an Intelligent IGBT Gate Driver Using a Low-Cost Microcontroller

Featured Application

The proposed solution for the high-power IGBT driver can be used as a reference for the design of similar intelligent gate drives, improving the reliability of power electronic converters in traction, industrial, and renewable energy applications.

Abstract

High-power IGBTs are used in power electronic converters in a variety of applications: traction drives, renewable power converters, mining equipment, oil and water pumping, and so on. To control a transistor, a special gate driver board is required. This board converts the logical control signal into the appropriate voltage values necessary to turn the resistor on and off. Gate drivers can perform the protection functions of IGBTs using hardware and algorithmic approaches. Application-specific integrated circuits are often used in driver solutions to implement control and protection. The development of an application-specific integrated circuit is a time-consuming and expensive procedure, which increases the cost of the driver. This paper describes the control and protection algorithms implemented in an intelligent IGBT driver based on a low-cost microcontroller. The use of the microcontroller makes the gate driver design more flexible and allows for the accurate tuning of the protection thresholds. The gate driver protects the IGBT from short-circuiting, overcurrent, and overvoltage, monitors the voltage supply, and controls the switch on and switch off processes in the transistor. The performance of the protection algorithms was tested experimentally using a specialized test bench.

1. Introduction

Over the last few years, the adoption of power electronics has increased in a variety of applications: traction applications [1,2,3], mining equipment [4,5,6], and oil production and pumping stations [7]. This became possible thanks to the development of semiconductor technologies and high-power transistors [8,9,10]. To control high-power transistors, a special gate driver board is required. This board converts the logical control signal into the appropriate voltage values necessary to turn the resistor on and off. A gate driver can perform transistor protection functions using hardware and algorithmic approaches [11,12,13]. Application-specific integrated circuits are often used in driver solutions as well as field-programmable gate array (FPGA) technologies [14,15]. The development of application-specific integrated circuits is a time-consuming and expensive procedure, which increases the cost of the driver. This paper describes the control and protection algorithms implemented in an intelligent IGBT driver based on a low-cost microcontroller from Texas Instruments (TMS320F28002x) [16]. The gate driver protects the IGBT from short-circuiting [17,18], overcurrent, and overvoltage, monitors the power supply, and controls the switch on and switch off processes of the transistor. The use of the microcontroller makes the gate driver design more flexible and allows for the accurate tuning of the protection thresholds. The developed driver has the same functions and communication protocol as 1SP0635V2M1-17 from CT-Concept Technologie GmbH [19]. The development process was carried out with the aim of producing a concurrent device by applying more accessible electrical components and upgrading existing protection functions. The experimental results show that all the control and protection functions were implemented successfully, enabling the low-cost implementation of the intelligent functions.

2. IGBT Gate Driver Hardware Solutions

The driver is shown in Figure 1a. The input power supply is generated by a DC/DC converter with a wide input voltage range of 9 to 36 V DC. It has galvanic insulation of 6000 V and provides power to all the circuits of the driver PCB. The driver has two optical communication channels for exchanging information with the upper-level control system. The first channel is the input, used to receive the transistor control signal, which is converted into a voltage of +15 V/–9 V that is supplied to the IGBT gate. The second optical channel is the output and serves as feedback. The feedback signal generates pulses of varying duration to inform the control system about the correct operation of the transistor or about a fault. The board has three power pins for connecting the collector, gate, and emitter of the IGBT. For analyzing transient processes in the IGBT, the internal analog-to-digital converter (ADC) of the microcontroller is used. Operational amplifiers (OAs) are used to implement the necessary gains in each channel. Thus, the TMS320F28002x microcontroller measures the values of gate current, gate voltage, and collector voltage and monitors voltage supply. Moreover, two collector voltage measurement circuits are implemented. Circuit #2 (see Figure 1b) makes it possible to control the entire collector voltage in the entire range of 0 to 1300 V, and circuit #3 (see Figure 1b) operates in a truncated range of 0 V to 15 V for a more accurate measurement of the desaturation of the transistor in its conducting state. A functional diagram of the driver is shown in Figure 1b.

3. Algorithms for Microcontroller

The TMS320F28002x (see Figure 1a) microcontroller receives a control signal from the upper-level control system and generates a feedback pulse with a 250 ns delay after each edge. The duration of the feedback pulse equals 700 ns. This signal allows us to verify the correct operation of the communication interface between the microcontroller and the upper-level control system. The control input signal and the driver feedback signal in normal operation are shown in Figure 2a,b. In normal operation mode without faults, the microcontroller sends the high-state logical signal “Enable” to the driver chip (see Figure 1b). In this case, the control signal is not blocked, and the driver chip performs the control of the IGBT. The driver chip forms the voltage transients required for the transistor to turn on and off. If a failure occurs, the control signal is blocked by the logical signal “Enable”, and the feedback pulse is set with a duration depending on the type of fault (Figure 2c–e). The driver chip is unlocked when the control signal corresponds to the “turn off” state and fault conditions do not occur. The software of the microcontroller makes a conclusion about the occurrence of failure based on measurements of gate voltage, gate current, collector voltage, and +15 V voltage supply, as shown in Figure 1b.

In the case of a fault related to the breaking of the gate circuit of the transistor, the control signal is blocked, and a feedback pulse with a duration of 1 μs is produced, which corresponds to Figure 2c. The normal operation of the gate circuit is validated by measuring the gate voltage and current with analog circuit #4 and analog circuit #1 (see Figure 1b). The reference gate voltage is 15 V in the case of the conducting state and –9 V for the turned-off state. At the instance of time when the driver changes the state of the transistor, a gate current pulse occurs. The appearance of the current pulse is detected by an internal analog comparator in the microcontroller. If the comparator triggering level is exceeded, a software flag is set. The presence of the flag is checked by the software and indicates the opening or closing of the transistor. If there is no flag from the comparator, then the gate circuit of the IGBT is disconnected.

The collector voltage value is measured by the embedded ADC using analog circuit #2 and analog circuit #3 (see Figure 1b). The measurement of the collector voltage by analog circuit #2 makes it possible to control the appearance of short circuits while the transistor is switching on. This voltage is specified in [19] for hard short-circuiting during the turn-on phase. If the voltage exceeds the reference value of 51 V after 7 µs, a short circuit is detected by software. Analog circuit #3 detects the overload current by measuring the collector voltage corresponding to the I–V characteristic of the IGBT in the conducting state. In the case of exceeding the reference collector voltage, the control signal is blocked, and a feedback pulse with a duration of 9 μs is produced, as shown in Figure 2d.

The voltage supply, +15 V, is monitored by analog circuit #5 (see Figure 1). If the voltage supply is out of range, it is triggered by the embedded analog comparator, the IGBT control signal is blocked, and the feedback signal is held up until the power is stabilized within acceptable limits, as shown in Figure 2e.

The main structure of the software is implemented by a finite-state machine. The finite-state machine has two states, “on” and “off”, which correspond to the on and off states of the IGBT control signal. Also, each state has substates with functions that correspondingly monitor the measured values. The functions and transition conditions of the finite-state machine are shown in Figure 3. In all substates, the voltage supply, +15 V, is monitored. The transition to the next substate is triggered by the corresponding hardware timers of the microcontroller. These timers are normally used as carrier signals to implement pulse-width modulation (PWM) when controlling a power electronic converter. In this case, the timers are synchronized with the falling and rising edges of the input optical control signal. The operation of the substate functions can be interrupted by corresponding events.

When the microcontroller detects the falling or rising edge of the input control signal, an interrupt function (XINT) is triggered. The XINT interrupt function determines the program’s “on” or “off” state in the finite-state machine and forces the finite-state machine into the initial condition substate because the switching of the transistor occurs (substate #1 in Figure 3).

To monitor the collector voltage, as mentioned above, two analog circuits are provided (circuit #2 and circuit #3 in Figure 1). The purpose of circuit #2 is to measure the collector voltage over the entire range. It is used to detect the appearance of a short circuit if the transistor is not turned on completely.

To detect a short circuit, one of the spare microcontroller hardware timers is assigned for short-circuit detection. The short-circuit timer is triggered by the rising edge of the control signal and counts the duration of the collector voltage transient process, as shown in Figure 4. The moment at which the end of this period is detected by the timer corresponds to the expected end of the transient process in the collector voltage, which is equal to 4 µs. At this point, the digitation of the analog signal is triggered, and the ADC converts the collector voltage four times in a row. After the conversion is completed, an ADC interrupt occurs once. The result is averaged and compared with the referenced level, which is equal to 51 V.

If the acceptable value is exceeded, the control signal is blocked, and a feedback pulse with a duration of 9 μs is generated, as shown in Figure 2d. If the voltage value is within acceptable limits, then initial substate #1 of the finite-state machine is changed into substate #2 of the “on” state, as shown in Figure 3 and Figure 4. The purpose of substate #2 is to verify the collector voltage measured by analog circuit #3 (see Figure 1) with a reduced range of 0 V to +15 V. This analog circuit is used when the transient process of the collector voltage is finished and the IGBT is switched on completely.

Circuit #3 is used to monitor the overload current in the collector–emitter circuit. According to the I–V characteristic of the IGBT, if the collector current increases, the collector voltage increases as well. Using this circuit, the collector voltage value is converted by the ADC and validated by the algorithm of the finite-state machine approximately every 3 µs in the infinite loop of the finite-state machine. If the result of the conversion exceeds the reference level of 4 V, the IGBT control signal is blocked, and a pulse with a duration of 9 μs is generated (see Figure 2d).

The driver’s algorithm implements the monitoring of the gate voltage by analog circuit #4 (see Figure 1) after the transistor is turned on completely. The gate voltage analysis time is determined by the period measured by the spare hardware timer assigned for gate monitoring. This timer counts the end of the gate voltage transient process and is triggered by the rising edge of the control signal. The gate monitoring timer counter is shown in blue in Figure 4. The timer period corresponds to the maximum possible duration of the transient process in the gate voltage of the IGBT. The timing can be adjusted depending on the particular IGBT type and is currently set to 20 µs.

If the gate monitoring timer reaches the end of the transient period, substate #2 of the finite-state machine is changed into substate #3 of the “on” state, as shown in Figure 3 and Figure 4. The validation of the gate voltage is carried out by substate #3’s algorithm. The gate voltage is converted by the ADC and validated by the finite-state machine approximately every 3 μs in the infinite loop of the finite-state machine. If the gate voltage exceeds the acceptable values, the control signal is blocked, and a feedback pulse with a duration of 1 μs is produced (see Figure 2c).

If the transistor is switched off, monitoring of the gate voltage is also performed. Similar to the case with the switched-on transistor, the voltage verification by analog circuit #4 (Figure 1) starts with the gate monitoring timer. The changing of initial substate #1 into substate #2 in the “off” state occurs as shown in Figure 3 and Figure 4, and monitoring the gate voltage is enabled. If the acceptable value is exceeded, the feedback signal is held up until the voltage is established within acceptable limits, as in the case of monitoring the +15 V power supply. Measuring the gate voltage in the switched-off state of the IGBT is equivalent to monitoring the –9 V power supply on the driver board.

At the end of each cycle of the finite-state machine, the condition of the transistor’s switching should be checked. The switching process can lead to an incorrect estimation of the electrical parameters of the gate or collector voltage. If commutation occurs while the finite-state machine is running, the evaluation result of this cycle is considered to be incorrect. One cycle of an infinite loop takes approximately 3 µs. The timeline of interrupts and the states of the finite-state machine are shown in Figure 4.

The algorithm for the generation of the feedback pulses is based on the utilization of the PWM module of the microcontroller. Timing diagrams of the PWM module’s operation are shown in Figure 5. This peripheral device provides a quick response to the edge of the control signal and determines pulses of the required duration. If the edge of the control signal appears, an internal synchronization signal is generated after a delay. This delay is associated with the filtering of the input discrete signal by the microcontroller. This synchronization signal forces the PWM module to reset the timer counter and load values from the shadow counter-compare (CMP) register to the active CMP register. If the timer counter is less than the CMP value, then the feedback signal is in a low state; otherwise, the feedback is in a high state within the time interval from t₂ to t₄, equal to 700 ns. At the instance of time t₁, the synchronization signal appears, and the value equal to “DELAY” stored in the shadow register is loaded into the active CMP register. The CMP value “DELAY” corresponds to the time necessary to provide a delay in the feedback pulse equal to 250 ns. The XINT interrupt occurs at the instance of time t₃ and is triggered by the edge of the control signal. The algorithm of this interrupt function changes the condition of the loading values from the shadow CMP register to the active CMP register. The “PRD” value, which is equal to the period value of the counter, is loaded into the shadow register CMP. Thus, the new loading of the CMP occurs at time t₄ when the PWM counter reaches the value “PRD”. At this moment, the feedback signal state changes from a high to a low state because the CMP value becomes unattainable for the timer counter. At the end of the XINT interrupt, at time t₅, the CMP shadow register is loaded with the value “DELAY”, and the loading from the shadow CMP register to the active CMP register is configured by the synchronization signal again. After exiting the XINT interrupt at time t₆, the PWM module is ready to set a pulse again.

If the duty cycle is very low or very high, the timer counters do not reach the end of the transient period during short-switched on or switched-off states because the synchronization signal resets the timer counters. In this case, the finite-state machine remains in initial substate #1, and only functions of voltage supply and gate current pulse monitoring are available (see Figure 3). It should be noted that the control system of the power converter should not utilize short pulses by default, as they cannot be realized.

4. Experimental Results

The performance of the control and protection algorithms of the driver was tested experimentally using a specialized test bench, which was designed for commissioning the driver in [20]. The functional diagram of the test bench is shown in Figure 6. A small IGBT is installed on the test bench, and the load is provided by a resistor. The applied voltage between the collector and emitter of the transistor is approximately 680 V due to a voltage drop across the internal resistance of the test bench. The test bench is capable of generating a control signal from the IGBT to the driver through the optical channel, receiving an optical feedback signal from the driver, and analyzing the result. Several resistors are installed on the test bench that can be shunted by the corresponding relays to simulate fault operating modes in the transistor. Resistor R6 and capacitor C1 are used to load the gate circuit with the rated power of the gate driver. Inductance is commutated by relay K2 and used to produce overvoltage over the IGBT during its turn off and to check for active clamping. Relays K1 and K3 are used to change the parameters of the load formed by R1, R2, and R3 and imitate short-circuiting by varying the voltage drop across the collector–emitter circuit. Relay K4 and resistor R4 are used to imitate the power loss fault.

The transient signals on the driver board are shown in Figure 7, Figure 8, Figure 9 and Figure 10. In the presented oscillograms, the control signal has inverse logic: the low state of the signal corresponds to the switched-on state of the transistor or the presence of light at the input of the optical receiver.

The generation of a feedback impulse with a 700 ns duration occurs with each appearance of the edge of the control signal in normal operation mode (see Figure 7). The duration of the feedback impulse is equal to 700 ns (see Figure 7a).

A short circuit is imitated using the test bench. The collector voltage is increased by means of disconnecting relay K1. During the turn-on phase, the voltage drop across resistor R1 is equivalent to the fault operation mode of the IGBT with a short circuit. The transient signals in the short-circuit operation mode are shown in Figure 8. As shown in the oscillograms, at the instance in time of 6.78 µs after the appearance of the edge of the control signal, a feedback pulse with a duration of 9 µs is produced. The transistor is switched off, and a fault pulse is generated because the voltage across the collector is greater than 51 V and equal to 66.3 V at that instance in time (see cursor 2 in Figure 8). The driver blocks the control signal to the IGBT, and the gate voltage begins to decrease from +15 V to –9 V. The transistor goes into the switched-off state, and the collector voltage increases.

In the normal operation mode, a gate current pulse occurs while the transistor is turning on (see the red graph in Figure 9a). The appearance of this pulse is checked by the driver, and if it is missing, a feedback fault pulse is generated. Using relay K5 installed in the test bench, the driver gate pin can be disconnected from the gate of the transistor. In the case of no gate current pulse, as shown in Figure 9b, a feedback fault signal pulse with a 1 µs duration is produced.

The IGBT driver has an input DC/DC converter, which supplies its circuits. The permitted range of the input voltage is from 9 to 36 V DC. The voltage supply +15 V fault voltage is simulated in the testbench by inserting serial resistor R4 into the supply chain and switching off relay K4 (see Figure 6). Transient processes are shown in Figure 10a,b. The moment at which the voltage supply decreases is shown in Figure 10a. The voltage goes out of the acceptable range, and the driver’s feedback signal changes from a low state to a high state, which corresponds to a voltage supply failure. The processes of establishing the voltage supply, +15 V, within the acceptable range of values and resetting the driver fault are shown in Figure 10b. The control circuit supply of the IGBT driver has some energy stored in its filtering capacitors and can withstand the turning off of the input DC/DC converter during the test.

5. Discussion and Conclusions

This paper describes the principles of the algorithms developed for an intelligent IGBT gate driver. The IGBT gate driver performs the functions of protecting and controlling the transistor. Also, it informs the upper-level control system about the occurrence of faults through an optical communication channel. The price of the original IGBT driver from Power Integrations starts at 289 USD at Digikey or Mouser. The proposed implementation costs less than 100 USD, being contract-manufactured, as it does not utilize application-specific integrated circuits and uses a microcontroller instead.

A special feature of the driver is that the algorithms were implemented on the basis of a low-cost TMS320F28002x microcontroller. The peripheral devices of the microcontroller provide the high-speed protection of the IGBT and implement a communication protocol with the upper-level system. The application of a microcontroller on the driver board instead of an application-specific integrated circuit makes the choice of electrical components wider and the production of driver boards more flexible. The performance of the algorithms was tested experimentally using a specialized test bench. Further research will be devoted to investigating the driver’s behavior in the inverter of the high-power drive.