Scaling-Friendly Analog/Digital Interfaces

Dear Colleagues,

Analog-to-Digital Converters are essential building blocks of electronic devices in a vast number of applications. Over the years, the analog/digital interface has moved closer and closer to the point where the information is sensed from the environment. This way, most of the signal processing is carried out in the digital domain, thus benefiting from technology downscaling and mainstream VLSI processes. However, ADCs are made up of analog and mixed-signal circuits, which are forced to grapple with the analog impairments of nanoscale technologies, such as short-channel effects, low supply voltage and process variability. This has prompted a number of innovative strategies to implement efficient digitizers integrated in deep nanometer CMOS.

This Topic aims to provide readers with recent research works and advances in the design of mostly digital/scaling-friendly ADCs. Both Nyquist-rate and oversampling architectures are welcome, including SAR, Pipeline and Sigma-Delta (ΣΔ) Modulation techniques, or hybrid combinations of them. Digital-assisted circuits and systems techniques, time/frequency-based quantization and signal processing as well as design methods and EDA tools are also within the scope of this Topic. Experimental verification is highly encouraged, either in the form of integrated circuits or as FPGA realization.

Among others, the following research topics will be addressed:

• Nyquist-rate ADCs: Flash, Semi-flash, SAR, Pipeline.
• ΣΔ Modulation techniques.
• Active-less, hybrid passive-active circuit implementations.
• Mostly digital, digital-assisted and scaling-friendly circuit techniques.
• Reconfigurable and programmable circuit techniques.
• Optimization design methods and CAD tools.

Prof. Dr. José M. de la Rosa
Dr. Gerardo Molina-Salgado
Topic Editors