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		<title>Semiconductors and Heterogeneous Integration</title>
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	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 8: Gate-Oxide Engineering in Staggered-Gap (GaSb/Si) Heterojunction Vertical Tunnel FETs: An In-Depth DC/RF and Linearity Analysis</title>
	<link>https://www.mdpi.com/3042-9013/1/2/8</link>
	<description>This study represents a deep investigation into how lateral and vertical gate-stack technology affects the electrical properties of an GaSb/Si Type-II heterojunction vertical tunnel FET with a source pocket. The implementation of GaSb, a low-band-gap semiconductor, in tunnel FETs generates a Type-II (staggered-gap) heterojunction with silicon, which enhances tunneling-based carrier transport. Incorporating a source pocket in these devices led to better sub-threshold performance. Since intrinsic capacitances play a crucial role in the overall performance of tunnel FETs, a thorough analysis was performed to examine how various gate-oxide stacking configurations impact intrinsic gate capacitances. The study utilized Silvaco ATLASTM 3-D TCAD software to assess performance metrics of different vertical tunnel FETs, including the ION/IOFF ratio, gate-oxide stack, and drive current. Accurately assessing the device&amp;amp;rsquo;s linearity is crucial, which is why the linearity estimation involves examining figures of merit like VIP3, IMD3, IIP3, and the 1 dB compression point to understand the device&amp;amp;rsquo;s stability.</description>
	<pubDate>2026-08-31</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 8: Gate-Oxide Engineering in Staggered-Gap (GaSb/Si) Heterojunction Vertical Tunnel FETs: An In-Depth DC/RF and Linearity Analysis</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/2/8">doi: 10.3390/shi1020008</a></p>
	<p>Authors:
		Manas Ranjan Tripathy
		Ashish Kumar Singh
		Ramesh Kumar
		Satyabrata Jit
		Shekhar Suman Borah
		Raghvendra Shukla
		</p>
	<p>This study represents a deep investigation into how lateral and vertical gate-stack technology affects the electrical properties of an GaSb/Si Type-II heterojunction vertical tunnel FET with a source pocket. The implementation of GaSb, a low-band-gap semiconductor, in tunnel FETs generates a Type-II (staggered-gap) heterojunction with silicon, which enhances tunneling-based carrier transport. Incorporating a source pocket in these devices led to better sub-threshold performance. Since intrinsic capacitances play a crucial role in the overall performance of tunnel FETs, a thorough analysis was performed to examine how various gate-oxide stacking configurations impact intrinsic gate capacitances. The study utilized Silvaco ATLASTM 3-D TCAD software to assess performance metrics of different vertical tunnel FETs, including the ION/IOFF ratio, gate-oxide stack, and drive current. Accurately assessing the device&amp;amp;rsquo;s linearity is crucial, which is why the linearity estimation involves examining figures of merit like VIP3, IMD3, IIP3, and the 1 dB compression point to understand the device&amp;amp;rsquo;s stability.</p>
	]]></content:encoded>

	<dc:title>Gate-Oxide Engineering in Staggered-Gap (GaSb/Si) Heterojunction Vertical Tunnel FETs: An In-Depth DC/RF and Linearity Analysis</dc:title>
			<dc:creator>Manas Ranjan Tripathy</dc:creator>
			<dc:creator>Ashish Kumar Singh</dc:creator>
			<dc:creator>Ramesh Kumar</dc:creator>
			<dc:creator>Satyabrata Jit</dc:creator>
			<dc:creator>Shekhar Suman Borah</dc:creator>
			<dc:creator>Raghvendra Shukla</dc:creator>
		<dc:identifier>doi: 10.3390/shi1020008</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-08-31</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-08-31</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>2</prism:number>
	<prism:section>Article</prism:section>
	<prism:startingPage>8</prism:startingPage>
		<prism:doi>10.3390/shi1020008</prism:doi>
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	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 7: AI-Enabled Preventive Action for Semiconductor Lithography Using LSTM, Transformers, and SHAP</title>
	<link>https://www.mdpi.com/3042-9013/1/2/7</link>
	<description>Semiconductor lithography is a complex cyber-physical system where timely integration of heterogeneous operational data and informed decision-making are critical to take preventive action. Data-driven analytics can predict equipment degradation, but due to poor information pipelines, complex decision logic, and a lack of human expertise integration, it can be difficult to put it into practice. This study aims to produce an integrated framework of industrial informatics for explainable, human-in-the-loop, predictive action in semiconductor lithography using sensor telemetry, maintenance records, and text analytics together with transformer-based approaches and SHAP explainability. The framework is tested with existing industrial lithography data from various facilities, collected in the past under different experimental conditions. Three experiments are conducted to evaluate the predictive performance (LSTM vs. Transformer models), monitoring behavior (anomaly detection using autoencoders), and human&amp;amp;ndash;AI collaboration with explainability. Evaluation looks at not only outcomes of human&amp;amp;ndash;AI interaction, but also predictive performance and monitoring behavior&amp;amp;mdash;not deployment and not causation. Transformer models yield 97.2% accuracy compared to 94.8% for the LSTM baseline (+2.4 pp). Anomaly detection results in a nominal 3.2 pp difference (Autoencoder 94.5% vs. Random Forest 91.3%; p=0.018, uncorrected). The integration of human-in-the-loop raises the operator&amp;amp;rsquo;s trust from 62% to 92% (p&amp;amp;lt;0.001) and decision acceptability from 70% to 92%. Under retrospective counterfactual evaluation, operational metrics estimate a 68% reduction in downtime, a 65.1% reduction in yield loss, and a 36% reduction in maintenance costs.</description>
	<pubDate>2026-07-31</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 7: AI-Enabled Preventive Action for Semiconductor Lithography Using LSTM, Transformers, and SHAP</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/2/7">doi: 10.3390/shi1020007</a></p>
	<p>Authors:
		Youssef Alothman
		Mohamed Bader-El-Den
		Lalit Maurya
		</p>
	<p>Semiconductor lithography is a complex cyber-physical system where timely integration of heterogeneous operational data and informed decision-making are critical to take preventive action. Data-driven analytics can predict equipment degradation, but due to poor information pipelines, complex decision logic, and a lack of human expertise integration, it can be difficult to put it into practice. This study aims to produce an integrated framework of industrial informatics for explainable, human-in-the-loop, predictive action in semiconductor lithography using sensor telemetry, maintenance records, and text analytics together with transformer-based approaches and SHAP explainability. The framework is tested with existing industrial lithography data from various facilities, collected in the past under different experimental conditions. Three experiments are conducted to evaluate the predictive performance (LSTM vs. Transformer models), monitoring behavior (anomaly detection using autoencoders), and human&amp;amp;ndash;AI collaboration with explainability. Evaluation looks at not only outcomes of human&amp;amp;ndash;AI interaction, but also predictive performance and monitoring behavior&amp;amp;mdash;not deployment and not causation. Transformer models yield 97.2% accuracy compared to 94.8% for the LSTM baseline (+2.4 pp). Anomaly detection results in a nominal 3.2 pp difference (Autoencoder 94.5% vs. Random Forest 91.3%; p=0.018, uncorrected). The integration of human-in-the-loop raises the operator&amp;amp;rsquo;s trust from 62% to 92% (p&amp;amp;lt;0.001) and decision acceptability from 70% to 92%. Under retrospective counterfactual evaluation, operational metrics estimate a 68% reduction in downtime, a 65.1% reduction in yield loss, and a 36% reduction in maintenance costs.</p>
	]]></content:encoded>

	<dc:title>AI-Enabled Preventive Action for Semiconductor Lithography Using LSTM, Transformers, and SHAP</dc:title>
			<dc:creator>Youssef Alothman</dc:creator>
			<dc:creator>Mohamed Bader-El-Den</dc:creator>
			<dc:creator>Lalit Maurya</dc:creator>
		<dc:identifier>doi: 10.3390/shi1020007</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-07-31</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-07-31</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>2</prism:number>
	<prism:section>Article</prism:section>
	<prism:startingPage>7</prism:startingPage>
		<prism:doi>10.3390/shi1020007</prism:doi>
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	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 6: High-Index Si(hhl) Templates for GaAs/AlGaAs-on-Si Integration: From First-Monolayer Initiation to Faceted Epitaxy</title>
	<link>https://www.mdpi.com/3042-9013/1/2/6</link>
	<description>High-index silicon surfaces provide anisotropic step networks, reconstruction states, and facet-adjacent geometries that can modify the first stages of III&amp;amp;ndash;V heteroepitaxy. This critical review examines GaAs/AlGaAs growth on Si(hhl) surfaces, with emphasis on the coupled roles of substrate orientation, surface preparation, first-monolayer initiation, and molecular beam epitaxy kinetics. The central viewpoint is that high-index Si can act as an active interfacial template: its anisotropy can bias early nucleation, relaxation, and faceting pathways before any intentional lithographic patterning is introduced. The discussion is anchored in two recent GaAs/Si studies. The first is a matched-condition benchmark comparing Si(001), Si(113), Si(111), and Si(331) under Ga-first and As-first initiation. The second is a Si(331) case study in which Ga pre-exposure followed by low-rate GaAs nucleation yields laterally ordered nanocorrugation/faceting and measurable in-plane optical anisotropy under the explored conditions. Surface-science precedents from adsorbate-induced reconstructions provide additional context for treating the first atomic layer as a meaningful growth variable. These studies point to a broader opportunity: using high-index Si(hhl) surfaces to link interface chemistry, anisotropic morphology, structural relaxation, and optical response within a common framework for GaAs/Si integration.</description>
	<pubDate>2026-06-29</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 6: High-Index Si(hhl) Templates for GaAs/AlGaAs-on-Si Integration: From First-Monolayer Initiation to Faceted Epitaxy</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/2/6">doi: 10.3390/shi1020006</a></p>
	<p>Authors:
		Esteban Cruz-Hernández
		</p>
	<p>High-index silicon surfaces provide anisotropic step networks, reconstruction states, and facet-adjacent geometries that can modify the first stages of III&amp;amp;ndash;V heteroepitaxy. This critical review examines GaAs/AlGaAs growth on Si(hhl) surfaces, with emphasis on the coupled roles of substrate orientation, surface preparation, first-monolayer initiation, and molecular beam epitaxy kinetics. The central viewpoint is that high-index Si can act as an active interfacial template: its anisotropy can bias early nucleation, relaxation, and faceting pathways before any intentional lithographic patterning is introduced. The discussion is anchored in two recent GaAs/Si studies. The first is a matched-condition benchmark comparing Si(001), Si(113), Si(111), and Si(331) under Ga-first and As-first initiation. The second is a Si(331) case study in which Ga pre-exposure followed by low-rate GaAs nucleation yields laterally ordered nanocorrugation/faceting and measurable in-plane optical anisotropy under the explored conditions. Surface-science precedents from adsorbate-induced reconstructions provide additional context for treating the first atomic layer as a meaningful growth variable. These studies point to a broader opportunity: using high-index Si(hhl) surfaces to link interface chemistry, anisotropic morphology, structural relaxation, and optical response within a common framework for GaAs/Si integration.</p>
	]]></content:encoded>

	<dc:title>High-Index Si(hhl) Templates for GaAs/AlGaAs-on-Si Integration: From First-Monolayer Initiation to Faceted Epitaxy</dc:title>
			<dc:creator>Esteban Cruz-Hernández</dc:creator>
		<dc:identifier>doi: 10.3390/shi1020006</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-06-29</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-06-29</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>2</prism:number>
	<prism:section>Review</prism:section>
	<prism:startingPage>6</prism:startingPage>
		<prism:doi>10.3390/shi1020006</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/2/6</prism:url>
	
	<cc:license rdf:resource="CC BY 4.0"/>
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        <item rdf:about="https://www.mdpi.com/3042-9013/1/1/5">

	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 5: Influence of the Synthesis Solvent on the Structural, Electronic, and Photocatalytic Properties of Ba2Li2/3Ti16/3O13</title>
	<link>https://www.mdpi.com/3042-9013/1/1/5</link>
	<description>Ba2Li2/3Ti16/3O13 (BLTO) tunnel structure titanate was successfully synthesized using a solvothermal methodology evaluating the effect of different solvents (isopropanol, ethylene glycol, and propylene glycol) on structural, optical, and electronic properties, as well as on photocatalytic hydrogen production using methanol as a sacrificial agent. The structural characterization revealed that the synthesis solvent greatly influences the phase purity, with ethylene glycol being the one that promoted the formation of a purer BLTO phase (96.1%), while the samples prepared with other solvents exhibited slightly higher amounts of BaTiO3, and BaTi5O11 impurities. All samples showed similar morphology and bandgap; however, differences in surface-defect chemistry were observed. In particular, the sample prepared using ethylene glycol exhibited a higher concentration of oxygen vacancies, which contributed to a more efficient separation of the photogenerated charges, as evidenced by the photoluminescence measurements. As a result, this sample showed enhanced photoactivity for hydrogen production. Additionally, it was observed that the BLTO material exhibited good stability over repeated irradiation cycles, highlighting its potential as a photocatalyst for hydrogen generation.</description>
	<pubDate>2026-06-09</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 5: Influence of the Synthesis Solvent on the Structural, Electronic, and Photocatalytic Properties of Ba2Li2/3Ti16/3O13</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/1/5">doi: 10.3390/shi1010005</a></p>
	<p>Authors:
		Luis F. Garay-Rodríguez
		Raquel Garza-Hernández
		Edith Luévano-Hipólito
		Leticia M. Torres-Martínez
		</p>
	<p>Ba2Li2/3Ti16/3O13 (BLTO) tunnel structure titanate was successfully synthesized using a solvothermal methodology evaluating the effect of different solvents (isopropanol, ethylene glycol, and propylene glycol) on structural, optical, and electronic properties, as well as on photocatalytic hydrogen production using methanol as a sacrificial agent. The structural characterization revealed that the synthesis solvent greatly influences the phase purity, with ethylene glycol being the one that promoted the formation of a purer BLTO phase (96.1%), while the samples prepared with other solvents exhibited slightly higher amounts of BaTiO3, and BaTi5O11 impurities. All samples showed similar morphology and bandgap; however, differences in surface-defect chemistry were observed. In particular, the sample prepared using ethylene glycol exhibited a higher concentration of oxygen vacancies, which contributed to a more efficient separation of the photogenerated charges, as evidenced by the photoluminescence measurements. As a result, this sample showed enhanced photoactivity for hydrogen production. Additionally, it was observed that the BLTO material exhibited good stability over repeated irradiation cycles, highlighting its potential as a photocatalyst for hydrogen generation.</p>
	]]></content:encoded>

	<dc:title>Influence of the Synthesis Solvent on the Structural, Electronic, and Photocatalytic Properties of Ba2Li2/3Ti16/3O13</dc:title>
			<dc:creator>Luis F. Garay-Rodríguez</dc:creator>
			<dc:creator>Raquel Garza-Hernández</dc:creator>
			<dc:creator>Edith Luévano-Hipólito</dc:creator>
			<dc:creator>Leticia M. Torres-Martínez</dc:creator>
		<dc:identifier>doi: 10.3390/shi1010005</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-06-09</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-06-09</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>1</prism:number>
	<prism:section>Article</prism:section>
	<prism:startingPage>5</prism:startingPage>
		<prism:doi>10.3390/shi1010005</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/1/5</prism:url>
	
	<cc:license rdf:resource="CC BY 4.0"/>
</item>
        <item rdf:about="https://www.mdpi.com/3042-9013/1/1/4">

	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 4: Orbital Selectivity from Orbital Ordering in a van Hove Singularity Hubbard Model</title>
	<link>https://www.mdpi.com/3042-9013/1/1/4</link>
	<description>We explore the electronic state of a van Hove singularity two-orbital model, showing the emergence of orbital selectivity arising from ferro-orbital ordering (FOO). Our microscopic description highlights the role of orbital degrees of freedom in realizing orbital selectivity with coexistent quasiparticle resonances and Mott-localized electronic states. This allows us to identify the emergent paramagnetic electronic state that gives rise to spontaneous formation of altermagnetism from electron interactions and orbital ordering. We also show why our DMFT results might be important for understanding the implications of FOO for memristors for future neuromorphics.</description>
	<pubDate>2026-05-22</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 4: Orbital Selectivity from Orbital Ordering in a van Hove Singularity Hubbard Model</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/1/4">doi: 10.3390/shi1010004</a></p>
	<p>Authors:
		Luis Craco
		</p>
	<p>We explore the electronic state of a van Hove singularity two-orbital model, showing the emergence of orbital selectivity arising from ferro-orbital ordering (FOO). Our microscopic description highlights the role of orbital degrees of freedom in realizing orbital selectivity with coexistent quasiparticle resonances and Mott-localized electronic states. This allows us to identify the emergent paramagnetic electronic state that gives rise to spontaneous formation of altermagnetism from electron interactions and orbital ordering. We also show why our DMFT results might be important for understanding the implications of FOO for memristors for future neuromorphics.</p>
	]]></content:encoded>

	<dc:title>Orbital Selectivity from Orbital Ordering in a van Hove Singularity Hubbard Model</dc:title>
			<dc:creator>Luis Craco</dc:creator>
		<dc:identifier>doi: 10.3390/shi1010004</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-05-22</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-05-22</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>1</prism:number>
	<prism:section>Article</prism:section>
	<prism:startingPage>4</prism:startingPage>
		<prism:doi>10.3390/shi1010004</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/1/4</prism:url>
	
	<cc:license rdf:resource="CC BY 4.0"/>
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        <item rdf:about="https://www.mdpi.com/3042-9013/1/1/3">

	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 3: Mo-4d Orbital Selectivity Induced by Disorder and Substrate&amp;ndash;Film Interaction in Monolayer MoS2</title>
	<link>https://www.mdpi.com/3042-9013/1/1/3</link>
	<description>Based on DFT+DMFT calculations, we explore the interplay between electron correlations, lattice disorder and substrate&amp;amp;ndash;film interaction on the Mo-4d spectra MoS2 monolayer. We show that MoS2 serves as an ideal testing ground for the exploration of weakly correlated phenomena with tunable semiconducting-to-metal phase transitions. We also show why our orbital-selective results in the dirty limit are important to understanding the emergence of substrate-induced localized in-gap states and the implication of it for future memristors for memory-based neuromorphic computing.</description>
	<pubDate>2026-04-21</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 3: Mo-4d Orbital Selectivity Induced by Disorder and Substrate&amp;ndash;Film Interaction in Monolayer MoS2</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/1/3">doi: 10.3390/shi1010003</a></p>
	<p>Authors:
		Luis Craco
		</p>
	<p>Based on DFT+DMFT calculations, we explore the interplay between electron correlations, lattice disorder and substrate&amp;amp;ndash;film interaction on the Mo-4d spectra MoS2 monolayer. We show that MoS2 serves as an ideal testing ground for the exploration of weakly correlated phenomena with tunable semiconducting-to-metal phase transitions. We also show why our orbital-selective results in the dirty limit are important to understanding the emergence of substrate-induced localized in-gap states and the implication of it for future memristors for memory-based neuromorphic computing.</p>
	]]></content:encoded>

	<dc:title>Mo-4d Orbital Selectivity Induced by Disorder and Substrate&amp;amp;ndash;Film Interaction in Monolayer MoS2</dc:title>
			<dc:creator>Luis Craco</dc:creator>
		<dc:identifier>doi: 10.3390/shi1010003</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-04-21</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-04-21</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>1</prism:number>
	<prism:section>Article</prism:section>
	<prism:startingPage>3</prism:startingPage>
		<prism:doi>10.3390/shi1010003</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/1/3</prism:url>
	
	<cc:license rdf:resource="CC BY 4.0"/>
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        <item rdf:about="https://www.mdpi.com/3042-9013/1/1/2">

	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 2: In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions</title>
	<link>https://www.mdpi.com/3042-9013/1/1/2</link>
	<description>Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functionalities and ultra performance, utilizing advanced heterogeneous integration and packaging technologies. This paper discusses emerging challenges and future research directions in developing robust electrostatic discharge protection solutions for future systems-on-integrated-chiplets.</description>
	<pubDate>2026-03-23</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 2: In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/1/2">doi: 10.3390/shi1010002</a></p>
	<p>Authors:
		Xunyu Li
		Runyu Miao
		Zijian Yue
		Albert Wang
		</p>
	<p>Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functionalities and ultra performance, utilizing advanced heterogeneous integration and packaging technologies. This paper discusses emerging challenges and future research directions in developing robust electrostatic discharge protection solutions for future systems-on-integrated-chiplets.</p>
	]]></content:encoded>

	<dc:title>In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions</dc:title>
			<dc:creator>Xunyu Li</dc:creator>
			<dc:creator>Runyu Miao</dc:creator>
			<dc:creator>Zijian Yue</dc:creator>
			<dc:creator>Albert Wang</dc:creator>
		<dc:identifier>doi: 10.3390/shi1010002</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2026-03-23</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2026-03-23</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>1</prism:number>
	<prism:section>Perspective</prism:section>
	<prism:startingPage>2</prism:startingPage>
		<prism:doi>10.3390/shi1010002</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/1/2</prism:url>
	
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	<title>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 1: Launching the Semiconductors and Heterogeneous Integration Journal</title>
	<link>https://www.mdpi.com/3042-9013/1/1/1</link>
	<description>The semiconductor industry stands at a transformative crossroads [...]</description>
	<pubDate>2025-11-05</pubDate>

	<content:encoded><![CDATA[
	<p><b>Semiconductors and Heterogeneous Integration, Vol. 1, Pages 1: Launching the Semiconductors and Heterogeneous Integration Journal</b></p>
	<p>Semiconductors and Heterogeneous Integration <a href="https://www.mdpi.com/3042-9013/1/1/1">doi: 10.3390/shi1010001</a></p>
	<p>Authors:
		Hei Wong
		</p>
	<p>The semiconductor industry stands at a transformative crossroads [...]</p>
	]]></content:encoded>

	<dc:title>Launching the Semiconductors and Heterogeneous Integration Journal</dc:title>
			<dc:creator>Hei Wong</dc:creator>
		<dc:identifier>doi: 10.3390/shi1010001</dc:identifier>
	<dc:source>Semiconductors and Heterogeneous Integration</dc:source>
	<dc:date>2025-11-05</dc:date>

	<prism:publicationName>Semiconductors and Heterogeneous Integration</prism:publicationName>
	<prism:publicationDate>2025-11-05</prism:publicationDate>
	<prism:volume>1</prism:volume>
	<prism:number>1</prism:number>
	<prism:section>Editorial</prism:section>
	<prism:startingPage>1</prism:startingPage>
		<prism:doi>10.3390/shi1010001</prism:doi>
	<prism:url>https://www.mdpi.com/3042-9013/1/1/1</prism:url>
	
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