Padmanabhan Balasubramanian is a Senior Research Fellow in the College of Computing and Data Science at Nanyang Technological University, Singapore. He received his Bachelor’s degree in Electronics and Communication Engineering from the University of Madras, India, in 1998; his Master’s degree in VLSI Systems from the National Institute of Technology, Tiruchirappalli, India, in 2005; and a Ph.D. degree in Computer Science from the University of Manchester, UK, in 2010. He has published over 130 research papers predominantly as the lead author in international journals and conferences. His professional service includes being a reviewer for 49 international journals covering IEEE, IET, Elsevier, Springer, etc., a technical program/steering committee member for 72 international conferences, and a reviewer for 32 international conferences. He was also a reviewer for an Elsevier book proposal. He is a Topical Advisory Panel Member of the Journal of Low Power Electronics and Applications and an Editorial Board Member of the International Journal of Reconfigurable and Embedded Systems. He was awarded certificates for outstanding contribution to reviewing by Microelectronics Reliability in 2016; Computers and Electrical Engineering in 2017 and 2018; and Integration, the VLSI Journal in 2018. His research interests are approximate computing, asynchronous circuits, computer arithmetic, digital integrated circuits, fault-tolerant design, and logic synthesis.

Douglas L. Maskell (Senior Member, IEEE) received B.E. (Hons.), M.Eng.Sc., and Ph.D. degrees in Electronic and Computer engineering from James Cook University, Townsville, Australia, in 1980, 1984, and 1996 respectively. He is an Associate Professor in the College of Computing and Data Science at Nanyang Technological University, Singapore. He has authored or co-authored over 220 research papers in international journals and conferences. His research interests include embedded systems, approximate computing, reconfigurable computing, intelligent systems, and algorithm acceleration for hybrid high-performance computing systems.