Phase Transition Field Effect Transistor Observed in an α -(BEDT-TTF) 2 I 3 Single Crystal

: The metal–insulator transition induced by the gate electric ﬁeld in the charge order phase of the α -(BEDT-TTF) 2 I 3 single-crystal ﬁeld-effect transistor (FET) structure was clearly observed near the phase transition temperature. An abrupt increase in the electrical conductance induced by the applied gate electric ﬁeld was evident, which corresponds to the partial dissolution of the charge order phase triggered by the gate electric ﬁeld. The estimated nominal dissolved charge order region (i.e., the gate-induced metallic region) was overestimated in 130–150 K, suggesting additional effects such as Joule heating. On the other hand, in the lower temperature region below 120 K, the corresponding dissolved charge order was several monolayers of BEDT-TTF, suggesting that it is possible to dissolve the charge order phase within the bistable temperature region.

However, despite the extensive interest in correlated organic materials and the effect of the gate electric field on the FET structure, few studies have been conducted on this effect on organic charge order materials [7,12], mainly because of the technical difficulties in sample preparation.To observe the gate electric field effect, a single-crystal sample is required that must possess at least three conditions: (1) a mirror crystal surface, (2) an inert interface between the crystal surface and gate insulator, and (3) a sufficiently thin crystal for adherence to the gate insulator and to distinguish the enhanced electrical current produced by the gate electric field from the bulk electrical current.
In addition, excess carriers of high density are required to induce metal-insulator transitions in strongly correlated materials.Electrical double-layer gating [58][59][60][61][62][63][64] is expected to be useful for high-density carrier accumulation but is not available in the organic charge-transfer complexes because it generally dissolves the organic charge-transfer complex.Therefore, we attempted to detect the gate electric field effect near the metal-insulator transition temperature (T MI ) instead of achieving high carrier accumulation at present.Even though a realistic applied gate voltage of up to 100 V is insufficient to inject a large number of excess carriers, a phase transition induced by an external field is expected to be observed because the energies of both the metallic and charge order phases are comparable near T MI .In other words, with a relatively small perturbation, we expected to break the thermal equilibrium balance in the population of coexisting metallic and charge order phases.In this study, we focused on the metal-insulator phase transition of α-(BEDT-TTF) 2 I 3 , which is a well-investigated organic charge order material comprising a donor molecule BEDT-TTF and an acceptor I 3 that undergoes a metal-insulator phase transition at approximately 140 K [53].
Moreover, we introduced technical improvements to the measurement of single-crystal organic FET.The Natural adhesion contact (NAC) used in this study was a thin-film Au four-probe electrode patterned on the surface of a thin parylene film.The NAC was so thin that it adhered spontaneously to the organic single crystals.The full details of NAC are presented in Ref. [65].In brief, the NAC adheres to the mirror surface of any organic single crystal very softly and establishes electrical contact between the Au thin-film electrode and the crystal surface without incurring any chemical or thermal damage.Figure 1a shows a photograph of NAC peeled off from the preparation substrate.Once the parylene film is peeled off from the preparation substrate, a four-probe Au electrode pattern is fabricated on the parylene thin film surface.The resulting NAC can be laminated onto the surface of an organic single crystal.

Experimental Details
Single crystals of α-(BEDT-TTF) 2 I 3 were grown via electrocrystallization.BEDT-TTF powder (3.6 mg) and tetrabutylammonium iodide (35.5 mg) were dissolved in benzonitrile (8 mL of benzonitrile at the anode and cathode sides, respectively).Two Pt wires were used as the electrodes for electrocrystallization.These procedures were conducted entirely in a glove box of N 2 .During the growth, the cell was maintained at a temperature of 308 K, and a constant electrical current of 0.3∼0.4µA was applied.The grown crystals were handled in anhydrous ethanol and settled on the surface of a polydimethylsiloxane (PDMS)-coated Neoplim film (Mitsubishi Gas Chemical Company Inc., Tokyo, Japan).The thermal expansion coefficient of the Neoplim film was 58 ppm/K.The thicknesses of the PDMS layer and Neoplim film were 800 nm and 50 µm, respectively.Therefore, the strain or slippage at the interface of the organic single crystal and substrate was effectively suppressed using PDMS/Neoplim.A single crystal of α-(BEDT-TTF) 2 I 3 on a substrate surface was selected and electrically contacted using the NAC. Figure 1b shows an optical micrograph of the thin α-(BEDT-TTF) 2 I 3 single crystal and the NAC placed on the crystal.A cross-sectional view of the FET measurement sample is shown in Figure 1c.The gate electrode in the NAC for FET measurement existed on the back side of the contact electrode plane in the 900 nm thick parylene thin film.
The terminal gap of the NAC between V 1 and V 2 was 40 µm, and the source-drain distance (channel length) and width were 180 and 50 µm, respectively.The NAC was placed on a single crystal using a four-axis xyzθ microstage.Four-terminal electrical measurements were conducted under an applied drain voltage of −0.2 V (from room temperature to 160 K), the lowest voltage possible, then slightly raised to −0.5 V (160 K to 110 K) to maintain a sufficiently S/N ratio in the high electrical resistivity regime below T MI .Electrical current measurements and the application of drain voltage were performed using a DC voltage/current generator (Model R6245, Advantest Corp., Tokyo, Japan).The four-terminal potential difference was measured using a digital multimeter (3458A; Keysight Technologies, California, CA, USA).The gate voltage was generated by a system source meter (Keithley 2635A).
Figure 2 shows a typical example of the temperature dependence of the electrical resistivity of a α-(BEDT-TTF) 2 I 3 single crystal measured using NAC.The metal-insulator phase transition was clearly observed, and almost no temperature hysteresis was observed in the cooling and heating cycles, demonstrating the reliability of the NAC contact even at low temperatures.The observed increase in the electrical resistance during the metal-insulator transition is sample dependent.The difference in the four-terminal electrical resistance arises mainly from the difference in the crystal uniformity.If the active phase transition path has a parallel nonactive conductor path, the observed temperature-dependent variation during the metal-insulator transition appears relatively weak.In addition, a slight shift in T MI was sometimes observed and was also dependent on the sample.It has been discussed that the phase transition temperature is increased in part by the induced stress in the organic crystal, which is probably the result of a difference in the thermal expansion coefficient between the organic crystal and the Neoplim substrate.In the present setup, the thermal expansion of the sample is dominated by the thermal expansion of Neoplim because its volume is predominantly greater than that of either the organic single crystal or the PDMS layer.The presence of the PDMS layer suppressed this effect; however, the difference in the thermal expansion induced tensile strain in the organic single crystal.

Results and Discussion
Figure 3 shows the temperature dependence of relative electrical conductance (G/G 0 ) with respect to the applied V GS .The electrical conductance (G) was normalized by the bulk electrical conductance under zero-gate voltage (G 0 ) at each temperature.Therefore, the V GS -induced increase in G/G 0 appeared to be relatively large at lower temperatures.At 140 K, G/G 0 was almost constant as V GS increased from 0 to 32 V, then gradually increased as V GS increased from 40 V, and saturated at about 1.07-1.08 as V GS increased to 100 V.When V GS decreases, G/G 0 remains at its saturated value of ∼1.08 down to 36 V, then decreases abruptly to approximately 1.0 as V GS decreases from 36 V to 24 V.In addition, for negative V GS , G/G 0 began to increase below −50 V, and then saturated from −52 V to −100 V. Along the decreasing V GS path, the saturated G/G 0 value remained until V GS reached −44 V, and then decreased abruptly to approximately 1.0 below −28 V. Hysteresis was observed in the four-probe transfer curve.At 110 K, G/G 0 began to rise sharply at V GS = 28 V in the upsweep path and abruptly decreased at V GS = 36 V.The contribution of the hysteresis in the four-probe transfer curve observed at 110 K was relatively lower than that at 140 K.These FET characteristics were observed in four-probe measurements; however, the gate-induced modulation of electrical conductance was hardly observed in the two-probe measurements because of the large contact resistance.The sharp increase in conductance is considered to arise from the partial melting of the correlated charge order electronic phase.Either the excess carriers injected during the V GS application could suppress the correlation effect or the excess carrier flow current could break the charge order domain.Consequently, the metallic phase fragments distributed in the channel connect to form a continuous metallic path.Therefore, G/G 0 indicates a steep increase in threshold voltage.This principle is completely different from that of conventional semiconductor field-effect transistors.In addition, the V GS -induced metalinsulator transition was observed under both positive and negative polarizations of V GS because of the low energy gap which was estimated from the observed thermal activationtype temperature dependence of the electrical resistance below T c (approximately 0.11 eV).That is, the charge gap of the charge order phase caused by Coulomb repulsion is small; therefore, electrons and holes are injected by applying a positive and negative gate electric field, respectively.
The amount of the gate-induced metallic phase was estimated using the framework described below.The effects of the induced carrier in the FET structure are only effective in several molecular layers at the interface of the gate insulator and crystal.Hence, the field-induced metallic phase was limited to the channel region of the FET.However, in this phase-transition FET, the electric-field-induced carriers not only create a channel by themselves but also possibly induce a metallic region in their periphery because the charge order is strongly correlated, and the collective electronic state (i.e., melting of the charge order fragment) may also induce the collapse of the surrounding charge order domain.We later estimated the induced collapse of charge order.
We employed a simple phase transition model that has been widely applied to many phenomena.As shown in Figure 4a, starting from the whole metallic bulk crystal, randomly distributed seeds of insulator began to grow.Subsequently, the volume of the insulator phase gradually increased in the metallic bulk, and the combined resistance between the source and drain abruptly increased because of the fragmentation of the continuous metallic path.Figure 4b shows a magnified view of the 180 × 90 cell square network of the electrical resistance of the metallic and insulating domains.This material is well known as a two-dimensional conductor [54,55]; therefore, the electrical conduction in this material is discussed in two-dimentional in-plane conduction models based on the fact that the interlayer transfer integrals are sufficiently small compared to in-plane transfer integrals [56,57].The seed of the insulator phase was randomly distributed in the entire metallic bulk crystal in the initial state, and the insulator seed grew by replacing the metallic site with the insulator site in the neighboring site of the insulator domain.The combined electrical resistivity of the resistance network was calculated at every step of the insulator domain growth.The combined resistance of the resistance network was calculated using the generated 100 ways of metallic and insulating phase distributions.Each result converged, and the average electrical resistivity was calculated.Figure 4c presents the calculated combined electrical resistivity for the metallic phase ratio.The calculated resistivity varied from 10 0 to 10 −4 Ωm.The calculated resistivity decreased steeply at a metallic ratio of approximately 0.55.This indicates that a 0.55 metallic ratio is necessary for the formation of a continuous metallic path from the source to the drain.
The solid blue line in Figure 5a shows the temperature dependence of the electrical resistivity of α-(BEDT-TTF) 2 I 3 [52].The red circles are the calculated electrical resistivities based on the phase transition model, including the thermal carrier generation in the insulator phase.The thermal activation energy of the electrical resistivity of the insulator phase considered in this curve fitting is 0.1103 eV.The temperature dependence of the resistivity of the metallic phase is also included as ∝ T. The calculated plot corresponded well with the experimental data.In the process of curve fitting between the experimental data and the calculations, we assumed a temperature dependence of the metallic phase ratio, as shown in Figure 5b.Consequently, we extracted the metallic phase ratio as a function of the temperature, as shown in Figure 5b.The metallic phase ratio was almost zero below 90 K, increased with temperature, and approached 1.0 toward 200 K.Although the steepest slope of resistivity was observed at around 140 K, the ratio of the metallic phase continuously changed from 90 K to 200 K.Thus, we clearly indicate that the temperature dependence of the electrical resistivity of α-(BEDT-TTF) 2 I 3 can be explained by the temperature dependence of the metallic phase ratio and thermal carrier generation across an energy gap of 0.1103 eV.The observed thermal activation energy can be attributed to the charge gap of the charge order phase.The temperature region where the transfer characteristics of the FET were observed was 100-150 K, which corresponds to the temperature region where the metallic and insulator phases coexisted.Therefore, we conclude that coexistence is essential for inducing a shift in the metallic phase ratio using an external gate electric field.Therefore, we next estimated the extent to which the metallic phase ratio increase corresponds to the observed gate-induced increase in electrical conductance based on the phenomenological metalinsulator coexistence situation.Because the physical principle of the observed gate-induced increase in electrical conductance is not clearly revealed, we attempted to explain the observed characteristics by a simple phenomenological model as described below.Next, we developed a simple model in which the observed electrical conductance G total consists of the parallel-combined conductance of the gate-induced metallic layer (GIML) and the bulk layer (corresponding to zero V GS ).Therefore, where x denotes the number of gate-induced metallic layers; σ GIML and σ zeroV GS denote the electrical conductivity of the GIML and the zero V GS layer, respectively.Here, we assumed σ GIML to be approximately equal to the electrical conductivity of the fully metallic phase, which approximately corresponds to that at 160 K (approximately 6 × 10 −1 Ωcm).
In this formula, G total at each temperature is expressed as a function of x.In contrast, G 0 corresponds to the G zeroV GS under x = 0 (i.e., bulk conductance at the temperature), and therefore, Hence, we obtained Thus, we can estimate the number of corresponding GIMLs from the gate variation in the relative conductance.
Figure 6a shows the temperature dependence of the calculated number of GIMLs.The nominal GIMLs were approximately 290-440 layers at 150 K; however, this value is so large that it cannot be explained by the gate field effect alone because the effect of the gate electric field is limited by the Debye length.The realistic number of GIML should be several MLs.The overestimation suggests the existence of an additional effect.The local Joule heat generated by the electrical current is a possible additional effect.The nominal number of GIMLs decreased with decreasing temperature, until it fell below five layers at 100 K.A GIML is relatively easy to generate at 150 K because the free energy of the metallic phase is not significantly different from that of the charge order phase.Therefore, a small perturbation produced by the external V GS and an additional effect could be sufficient to collapse the charge order phase.On the other hand, at 100 K, the charge order phase dominated the bulk, implying that the thermal stability of the charge order phase was stronger than that of the metallic phase.Therefore, making a charge order phase undergo a V GS -induced metal-insulator phase transition is relatively difficult at lower temperatures.In addition, the additional Joule heating effect is hard to continue in this temperature region because the ratio of metallic phase is below 10 percent; therefore, a continuous conductive filament path hardly exists.The Joule heating effect is suppressed in this temperature region.
An example of variation in the nominal number of GIMLs with V GS at 150 K (Figure 6b) shows the V GS hysteresis (red arrows in the figure) being quite consistent with the GIML behavior in the temperature range where the charge order and metallic phases coexist.From zero-V GS to 100 V or −100 V, that is, the upsweep path, it starts with the GIML being less than one monolayer and gradually increases owing to the effect of the gate electric field.In contrast, starting from 100 V or −100 V (i.e., the down-sweep path), with GIML already present, the GIML stability was higher than that in the up-sweep path.This mechanism underlies the observed V GS -hysteresis.The calculated nominal excess carrier density induced by the gate electric field (the dashed green curve in Figure 6b) corresponds well with the sub-threshold region of the observed four-probe transfer curve.Therefore, field-effect excess carrier injection occurs even in the subthreshold region.In this region, the device works as a normal organic FET.However, the number of GIMLs abruptly begins to increase and saturates when the excess charge density exceeds the tipping point.For positive V GS , the number of GIMLs begins to increase at 7.8 × 10 −4 C/m 2 (at V GS = 24 V) and saturates at 1.82 × 10 −3 C/m 2 (at 56 V).For a negative V GS , the number begins to increase at 1.0 × 10 −3 C/m 2 (at −32 V) and saturates at 2.1 × 10 −3 C/m 2 (at −64 V). 7.8 × 10 −4 C/m 2 corresponding to 1.2 × 10 −3 electrons per BEDT-TTF molecule.It is said that this number of excess carriers is generally insufficient to force the charge order phase to melt.However, in the temperature region where metallic and charge order phases coexist, a small perturbation, such as local excess charge and the succeeding Joule heating, could trigger the partial and transient metallic domain generation.We demonstrated that some of the charge order domains possibly change to the metallic domain from a relatively small number of excess carriers in the coexistence temperature region.

Figure 1 .
Figure 1.(a) Photograph of a NAC being peeled from a preparation substrate.NAC was formed as a patterned 4-probe thin Au electrode on a parylene thin film.When this film was peeled off, a 4-probe Au electrode pattern fabricated on the parylene thin film surface was obtained.The yellow contour outlines the polyimide tape used for reinforcement during peeling.(b) Optical micrograph of the 4-probe FET measurement sample.A thin single crystal was placed on the PDMS/Neoplim substrate, and the NAC was aligned and gently placed on the surface.Both the crystal/PDMS and NAC/crystal contacts were tightly held by natural adhesion.Therefore, no adhesion agent was used in the sample preparation.The NAC has five individual electrodes in a single thin sheet of parylene film.The electrodes were for the drain (marked as D in the figure), source (S), and gate (G); electrodes V 1 and V 2 were used in the electrical potential difference measurements.(c) Cross-section of the 4-probe FET measurement sample.The width of the gate electrode is almost the same as the channel length of the FET.

Figure 2 .
Figure 2. Temperature dependence of the electrical resistivity of α-(BEDT-TTF) 2 I 3 measured using the NAC during cooling and heating.A metal-insulator phase transition near 140 K was clearly observed, and almost no temperature hysteresis was observed because of the circumspect temperature control sequence, thereby demonstrating the reliability of the NAC.

Figure 3 .
Figure 3. Temperature dependence of the transfer curve of the FET shown as a relative electrical conductance (G/G 0 ) toward the applied gate voltage (V GS ).

Figure 4 .
Figure 4. (a) Illustration of phase transition from metallic to insulator phase.The blue and red regions indicate metallic and insulating phases, respectively.Starting from the entire metallic bulk, many insulator seeds begin to grow and continuous metallic paths from the source (S) to the drain (D) are fragmented by the growing insulator region.(b) Magnified view of one of the square networks of electrical resistance associated with the metallic and insulator domains used in the calculations.The blue and red regions indicate metallic and insulating phase domains, respectively.(c) Calculated average electrical resistivity.A 180 × 90-cell square network of mixed metallic and insulator regions was included in this model.

Figure 5 .
Figure 5. (a) Temperature dependence of the electrical resistivity of α-(BEDT-TTF) 2 I 3 cited from literature [52] and calculated result based on the phase transition model.(b) Temperature dependence of the metallic phase ratio extracted from the curve fitting of (a).The number of the total molecular layer in the crystal was roughly estimated to be n = total thickness d(001) = 1.0 µm 1.710 nm = 585, using lattice parameter values a = 9.21 Å, b = 10.85Å, c = 17.49Å, α = 96.95°,β = 97.97°,and γ = 90.75°forthis analysis.Here, d(001) is the interplanar distance of the equivalent (001) plane, calculated from the lattice parameters.Next, we developed a simple model in which the observed electrical conductance G total consists of the parallel-combined conductance of the gate-induced metallic layer (GIML) and the bulk layer (corresponding to zero V GS ).Therefore,

Figure 6 .
Figure 6.(a) Calculated number of temperature-dependent GIMLs.(b) Example of the relationship between V GS and the nominal number of GIMLs calculated from G/G 0 at 150 K, and the excess carrier density generated by V GS .