Dependability Assessment of a Dual-Axis Solar Tracking Prototype Using a Maintenance-Oriented Metric System

: This study presents a numerical method for evaluating the maintainability of a dual-axis solar tracking system that can be deployed in residential areas for improved energy production. The purpose of this research manuscript is threefold. It targets the following objectives: (i) First, we present the construction of a self-sufficient dual-axis solar tracking system based on a low-power electronic schematic that requires only one motor driver to control the azimuth and elevation angles of the photovoltaic (PV) panel. The automated system’s main electronic equipment comprises 1 × Arduino Mega2560 microcontroller unit (MCU), 1 × TB6560 stepper driver module, 2 × stepper motors, 2 × relay modules, 1 × solar charge controller, 1 × accumulator, and 1 × voltage convertor. Additional hardware components such as photoresistors, mechanical limit switches, rotary encoders, voltage, and current sensors are also included to complete the automation cycle of the solar tracking system. (ii) Second, the Arduino Mega 2560 prototyping board is replaced by a custom-made and low-cost application-specific printed circuit board (ASPCB) based on the AVR controller. The MCU’s possible fault domain is then further defined by examining the risks of the poor manufacturing process, which can lead to stuck-at-0 (Sa0) and stuck-at-1 (Sa1) defects. Besides these issues, other challenges such as component modularity, installation accessibility, and hardware failures can affect the automated system’s serviceability. (iii) Third, we propose a novel set of maintenance-oriented metrics that combine the previously identified variables to provide a maintainability index (MI), which serves as a valuable tool for evaluating, optimizing, and maintaining complex systems such as solar tracking devices. The experimental data show that the computed MI improves the system’s maintainability and enhances repair operations, increasing uptime.


Introduction
The Earth receives abundant energy from the Sun every second, surpassing humanity's energy requirements for over two hours [1].This makes solar power an attractive option due to its accessibility and sustainable nature [2].In the past, harnessing solar energy has been expensive yet effective, as evidenced by the nearly 300-fold increase in global solar power generation between 2000 and 2019.Technological advancements over the past two decades have driven down costs, leading to increased reliance on solar energy, and ongoing innovations hold the potential to enhance solar panel efficiency while further reducing expenses [3].
In the past 20 years, there has been a consistent decline in the expenses associated with solar cells, which convert sunlight into electricity.The National Renewable Energy Laboratory (NREL), a US governmental research institution focusing on solar cell technology, has analyzed the factors contributing to this trend in affordability [4].Their findings indicate that both hard costs, representing the physical components of solar cell hardware, and soft costs, encompassing factors like labor and regulatory approvals, have nearly equal significance, as shown in Figure 1.
Appl.Syst.Innov.2024, 7, x FOR PEER REVIEW 2 of 39 technology, has analyzed the factors contributing to this trend in affordability [4].Their findings indicate that both hard costs, representing the physical components of solar cell hardware, and soft costs, encompassing factors like labor and regulatory approvals, have nearly equal significance, as shown in Figure 1.Soft costs have decreased due to an expanding customer base and a growing pool of installation professionals, enabling companies to mass-produce photovoltaic (PV) modules and streamline installation processes.Meanwhile, hard costs have reduced to less than half of their levels since the beginning of the third millennium, primarily driven by declines in material expenses and enhancements in the light-capturing capabilities of PV modules.The pursuit of more economical and efficient solar cells entails a thorough exploration of the physics underlying solar energy capture, coupled with innovative design approaches.Exclusively, recent innovations have highlighted the design of perovskite solar cells [5][6][7] with an average conversion ratio greater than 25% [8], thus contributing to the future of PV modules [9].However, this type of solar cell has not yet reached the market since feasibility testing is ongoing [10,11], and several works are investigating techniques to improve its performance [12][13][14][15].
While current research seeks to discover new materials to improve solar cell efficiency, other studies are concerned with maximizing PV panel energy output [16][17][18][19].One particular study determined the importance of angular efficiency in solar panels [20], showing that optimum positioning towards the Equator can increase annual power generation.Typically, PV panels are mounted at a predetermined angle appropriate for each season of the year, preventing the system from harvesting the maximum amount of solar energy available.To address this issue, several studies were conducted on the design and evaluation of single-axis [21][22][23][24][25] and dual-axis [26][27][28][29][30] solar tracking devices, showing the advantages of these systems compared to their static counterparts.In the majority of cases, a single-axis solar tracker can increase energy production by 20-25% when compared to a fixed-tilt PV panel [31], whereas a dual-axis tracker can typically provide an additional energy gain of 25-35% when compared to its static model [32], reaching a peak value of 45% in recent studies [26].As illustrated in Figure 1, automated PV systems must support additional tracking costs, whereas maintenance costs can be lowered by employing proper testing methodologies, as will be detailed in the following sections of this manuscript.Soft costs have decreased due to an expanding customer base and a growing pool of installation professionals, enabling companies to mass-produce photovoltaic (PV) modules and streamline installation processes.Meanwhile, hard costs have reduced to less than half of their levels since the beginning of the third millennium, primarily driven by declines in material expenses and enhancements in the light-capturing capabilities of PV modules.The pursuit of more economical and efficient solar cells entails a thorough exploration of the physics underlying solar energy capture, coupled with innovative design approaches.Exclusively, recent innovations have highlighted the design of perovskite solar cells [5][6][7] with an average conversion ratio greater than 25% [8], thus contributing to the future of PV modules [9].However, this type of solar cell has not yet reached the market since feasibility testing is ongoing [10,11], and several works are investigating techniques to improve its performance [12][13][14][15].
While current research seeks to discover new materials to improve solar cell efficiency, other studies are concerned with maximizing PV panel energy output [16][17][18][19].One particular study determined the importance of angular efficiency in solar panels [20], showing that optimum positioning towards the Equator can increase annual power generation.Typically, PV panels are mounted at a predetermined angle appropriate for each season of the year, preventing the system from harvesting the maximum amount of solar energy available.To address this issue, several studies were conducted on the design and evaluation of single-axis [21][22][23][24][25] and dual-axis [26][27][28][29][30] solar tracking devices, showing the advantages of these systems compared to their static counterparts.In the majority of cases, a single-axis solar tracker can increase energy production by 20-25% when compared to a fixed-tilt PV panel [31], whereas a dual-axis tracker can typically provide an additional energy gain of 25-35% when compared to its static model [32], reaching a peak value of 45% in recent studies [26].As illustrated in Figure 1, automated PV systems must support additional tracking costs, whereas maintenance costs can be lowered by employing proper testing methodologies, as will be detailed in the following sections of this manuscript.
Solar cell technologies can benefit significantly from solar tracking systems.Solar tracking systems are mechanisms that orient PV panels or concentrating solar collectors toward the sun.The main advantage of using solar tracking is that it maximizes the amount of direct sunlight hitting the panels, thereby increasing the overall energy output.
Crystalline silicon solar cells (monocrystalline and polycrystalline), for instance, could benefit from solar tracking as it increases their exposure to direct sunlight throughout the day, thereby boosting their efficiency and power output.Monocrystalline cells, which are more efficient than polycrystalline cells, can see a significant increase in output with tracking, making the most of their higher efficiency potential.Upconversion (UC) involves the absorption of multiple photons, leading to the emission of radiation at a higher energy level than the initial excitation.This process has the potential to significantly improve the efficiency of solar energy harvesting systems, particularly in photovoltaic applications [33].The authors in [34] validate the benefits of UC by determining an increase of the short-circuit current density due to UC of sub-band-gap photons of 13.1 mA/cm 2 under a concentration of 210 suns.This represents a potential relative increase in the efficiency of solar cells by 0.19%.While thin-film solar cells (cadmium telluride, CIGS, amorphous silicon) are better at capturing diffuse light compared to crystalline silicon cells, solar tracking can still enhance their performance by ensuring they receive maximum direct sunlight.Thinfilm technologies, particularly CIGS and CdTe, can benefit from the consistent exposure to sunlight provided by tracking systems, resulting in more uniform energy production throughout the day [35].Perovskite solar cells are an emerging technology with the potential for high efficiency and low production costs.As they become more commercially viable, integrating solar tracking can help capitalize on their high-efficiency potential by ensuring consistent sunlight exposure [14].Bifacial solar cells, which can capture light from both the front and back sides, benefit from solar tracking as it optimizes the angle of incidence for both direct and reflected sunlight, thereby increasing their overall energy capture.Tracking systems can help bifacial panels maximize the use of reflected light from the ground or surrounding surfaces [36,37].
Regarding concentrated solar power (CSP), high-concentration photovoltaics (HCSPV), utilizing high-efficiency multijunction solar cells, hold significant promise for generating cost-effective and clean electricity on a large scale.These systems are more intricate than traditional photovoltaics due to the presence of multiphysics effects.Consequently, modeling their power output is essential for advancing their adoption in the market.Building on this, the work in [38] presents a multiphysics modeling procedure for high-concentration photovoltaics.This approach integrates an open-source spectral model, a single-diode electrical model, and a three-dimensional finite element thermal model.To validate these models and the overall multiphysics modeling procedure with real-world data, an outdoor experimental activity was carried out in Albuquerque, New Mexico, using an HCSPV monomodule, which is comprehensively described in terms of its geometry and materials.The experimental results closely matched (within 2.7%) the predicted maximum power point.While this multiphysics approach is more complex compared to empirical models, it not only predicts overall performance but also enhances understanding of the physical processes involved in converting solar irradiance into electricity.Consequently, it can be employed for the design and optimization of high-concentration photovoltaic modules.Based on the previous study, an outdoor characterization [39], as well as a power rating [40], is performed to validate the performance of the HCSPV monomodule under real operating conditions.Given the complexity involved in evaluating the outdoor performance of this technology [39], three relatively clear-sky days with varying atmospheric conditions were chosen to minimize noise in the measured parameters, thus providing a clearer understanding of its behavior.Data were collected at one-minute intervals to assess the monomodule's performance under real operating conditions.Initially, the monomodule's electrical characteristics were analyzed based on spectral changes, with various spectral indices evaluated for direct comparison.The study then examined the diurnal electrical characteristics and temperature of the monomodule in relation to spectral, irradiance, and ambient conditions.Over the three selected days, the results indicated a maximum operating efficiency of 23.2%, with peak temperatures reaching 70.3 • C on the diode and 67.6 • C on the heat sink.Power rating estimations for concentrator standard operating conditions (CSOCs) and concentrator standard test conditions (CSTCs) are conducted in [40] using various scenarios and compared with measurements from a Helios 3198 solar simulator.Different methods and filtering criteria based on the spectral matching ratio (SMR) between the middle and bottom sub-cells reveal differences of up to 3.64% for CSOC and 1.37% for CSTC estimations.When comparing the CSTC power rating obtained indoors, there is a discrepancy of up to 8.45%, attributed to tracking errors and the temperature sensitivity of the refractive optics.Using the spectral factor (SF) as a filtering criterion reduces this CSTC power rating difference to 6.74% compared to the indoor value.Additionally, CSOC power rating estimation with SF filtering shows results comparable to the standardized procedure using SMR indices, with a difference of only 1.21%.
Solar tracking systems, as mentioned in the third paragraph, offer several advantages, including increased energy production and efficiency.However, these systems also have certain disadvantages compared to fixed-tilted solar panels.One of these drawbacks is that solar trackers generally have higher initial costs due to the additional components required for tracking mechanisms, sensors, and controls.This can include the cost of the tracking hardware and installation.A further disadvantage is the increased construction complexity.Solar tracking devices are more complex in design and operation compared to fixed-tilted panels.They require additional moving parts, such as motors and gears, as well as electronic equipment which can lead to potential points of failure.Regarding the repair protocol of solar trackers, a major challenge is given by the higher maintenance costs, which is another drawback of the automated system.Aside from the moving parts involved, mobile PV systems demand additional attention at the circuitry level of the electrical equipment.For example, prolonged sunlight exposure and severe weather might affect the electrical equipment's performance by producing a chain of defects inside the solar tracker's components, such as thermal noise and parametric errors, to name only a few.These types of faults can be detected and traced using automated test equipment (ATE) that is not continuously connected to the device under test (DUT).Other types of defects, such as stuck-open or timing faults, can be accurately identified with built-in self-test (BIST) architectures.Several BIST diagnosis systems have been developed during the previous two decades [41][42][43][44][45], with promising results in terms of test time, power consumption, and configurability.
Considering the abovementioned aspects, this paper proposes a novel maintenanceoriented metric system that can evaluate the dependability of state-of-the-art solar tracking devices.For practical purposes, a dual-axis solar tracking prototype was constructed and improved with self-testing capabilities.By developing an application-specific printed circuit board (ASPCB) in Altium Designer, the main microcontroller unit (MCU) was adjusted to integrate a fault diagnosis system based on a modified built-in logic block observer (BILBO) schematic.The reconfigurable mechanism allows for the BILBO design to change its structure according to three polynomial functions G1, G2, and G3, thus improving fault coverage.We can then determine the probability-failure (P-F) curve by analyzing the fault coverage increase via a solar test factor (STF) and solar reliability factor (SRF), which describe the availability and reliability of the system.Finally, this manuscript compares the designed solar tracking prototype with other similar works regarding modularity, accessibility, and preventive maintenance.The experimental data show that the proposed metric set favors automated PV systems that provide higher preventive maintenance results, which encourages the integration of self-testing functions into future solar tracker design approaches.Additionally, the computed MI not only improves the maintainability of modern solar tracking systems but can also enhance repair processes, resulting in higher uptime.
The remainder of this paper is organized as follows: Section 2 provides new insights into PV system fault diagnosis and reliability evaluation.Section 3 describes the mechanical and electrical components of the developed dual-axis solar tracking prototype.Section 4 details the software implementation used for automating the solar tracking prototype.Section 5 depicts the modified BILBO architecture that will be included in the final ASPCB design.Section 6 introduces the novel maintenance-oriented metric system, which takes advantage of the solar tracker's modularity, accessibility, and predictive maintenance features.Section 7 presents the experimental results and discussion regarding the solar tracking system's reliability and maintainability.Finally, Section 8 concludes this work.

Related Work
Previous research [46][47][48][49][50] underscores the necessity of periodic assessment of additional equipment associated with static solar panels, including DC-DC converters, solar charge controllers, and power electronics, to ensure the overall reliability of PV systems.Moreover, CSP systems, which use lenses or mirrors to focus sunlight onto high-efficiency solar cells, rely heavily on direct sunlight.Solar tracking is essential for these systems to function optimally, as even small deviations from the sun's path can drastically reduce their efficiency.CPV systems typically use multijunction solar cells with very high efficiency rates.Solar tracking helps maximize the potential of these high-efficiency cells by ensuring they are always positioned to capture the most intense sunlight [51].
For diagnosing DC-DC inverter issues, an effective approach relies on artificial neural networks (ANNs), which accurately estimate current and voltage applied to an external resistive load, thereby achieving high detection rates for open circuit faults [46].On the other hand, rapid detection of short-circuit currents is feasible with a newly developed fast detection module, which, when combined with a dynamic reactive power compensator like STATCOM, facilitates various grid functions, including real-time monitoring of current rise rate and magnitude in PV grid systems [47].A more sophisticated fault diagnosis methodology involves the integration of PV panel power electronics (including estimator, fault detection and identification logic, and PV converter control system) into a single all-programmable system-on-chip (SoC) device, encompassing field-programmable gate array (FPGA) and ARM core functionalities [48].In DC systems, fault models such as transmission line faults and high-impedance faults are detectable using mathematical morphology (MM)-based filters [49].At the same time, Stockwell's transform-based multiresolution techniques prove useful for fault detection [50].Regardless of the specific fault models considered, PV systems must maintain continuous operation, with their availability ensured through a fault-tolerant control (FTC) strategy.From all PV system components, the DC-AC inverter remains the key element that is capable of transferring the collected energy into the power grid.A series of studies targeting this component shows that proper testing methods can establish its efficiency and performance for optimal PV system operation.The work in [52] proposes an empirical test strategy for verifying the efficiency of string PV inverters.By using the least square fitting method, the authors obtain a unique efficiency rate for each DC power point.Thus, the minimum value for the 5% power point was 87.88%, while the maximum value for 100% was 96.10%, demonstrating that the test method is a valuable dependability tool for PV panel users.Similarly, O. A. Rosyid et al. [53] present the validation of a solar inverter testing procedure for standalone PV systems.For this, several commercially available standalone inverters have been tested according to the IEC 61683 standard [54].Their experimental results show that the inverter achieves its best efficiency at 25% resistive load.The efficiency value rises with higher loads and drops with lower power factors.The test facility, established at Indonesia's B2TKE PV system testing laboratory, has been validated for inverters rated up to 15 kW.Higher values may result in enhanced test facility capacity, which will benefit overall inverter testing services.Furthermore, the work in [54] shows that inverter design flaws can affect the operation of grid-connected PV power systems and must therefore adhere to a specific standard.IEEE SCC21 establishes the IEEE 1547 standard [55] for integrating distributed resources with electric power systems.The standard covers technical specifications such as general principles, abnormal condition response, power quality, islanding, and test instructions.It also includes requirements for design, production, installation evaluation, commissioning, and periodic testing.The authors suggest a validation platform for evaluating PV system power inverters under abnormal conditions, with findings that meet the IEE standards.As a result, their test platform was integrated into the equipment certification of PV power systems in Taiwan [56].
In industrial settings, large-scale solar PV systems require reliability assessments beyond the test methodologies outlined earlier.A study by A. Golnas [57] sheds light on the reliability concerns of PV systems from an operator's perspective.The author emphasizes that the value of a PV system hinges primarily on its long-term performance, followed by the energy output per unit.The industry conventionally expects a PV system to efficiently convert photons into electrons with minimal disruptions throughout 20-25-year energy purchase agreements.Manually assembled macroscopic systems face significant challenges due to their reliance on physical labor and operation within uncontrolled environments.Moreover, the software embedded in inverters, crucial for system operation, can also experience failures.Ensuring optimal power plant operations, particularly with regional teams of mobile specialists, poses a considerable challenge for global operators who depend on local assembly crews and a diverse array of suppliers.The study highlights that service failures in mission-critical subsystems account for 69% of downtime incidents and contribute to 75% of energy losses in the PV system.
According to the work in [58], the reliability of PV power-generating systems is related to the security and stability of the electricity grid.Moreover, the reliability of PV systems is mostly determined by using the standard failure rate of each component, ignoring the effect of temperature environment variations on the failure rate.Thus, the authors make use of the fault tree analysis (FTA) to develop a reliability assessment method for PV power plants operating in variable environments via a hardware-in-the-loop simulation system.The scope of this system is to examine the impact of the thermal characteristics of the inverter's main components on the reliability of the PV power plant.Based on their experimental results, the overall reliability of bus capacitors, inverters, and PV power plants is lowered by 18.4%, 30%, and 18.7%, respectively, when bus capacitor thermal characteristics are not taken into account.The work underlines the significant impact of thermal attenuation on PV system reliability.
PV systems are constantly exposed to a variety of changing environmental variables, such as temperature, humidity, dust, and rain, which can cause electrical and visual failures.The work in [59] presents a comprehensive, microlevel methodology for failure data analysis and reliability model creation based on the FTA approach.The system reliability model is based on the median failure rates of 33 components/faults.The FTA results reveal that the reliability/probability of non-occurrence of the top event, i.e., 'No output or degraded output at Surge Protection Device (SPD)', is 0.5601 each year.Critical failures include solder bond failure, broken cell, broken interconnect, rack structure, grounding/lightening protection system, delamination, discoloration, and partial shading, all of which have a failure probability of 14.87%, 11.15%, 8.46%, 7.29%, 4.90%, 3.18%, 2.60%, and 0.88%.Critical intermediate occurrences include no input to SPD, no input to fuse, fault in a micro circuit breaker, and fault in a PV module, with failure probabilities of 43.79%, 43.78%, 43.72%, 43.72%, and 5.69%, respectively.
We distinguish ourselves from the abovementioned works by proposing a novel maintenance-oriented metric system based on the modularity, accessibility, and predictive maintenance characteristics of a solar tracking prototype.By integrating a modified BILBO schematic into an ASPCB design, we can evaluate the PF curve of the designed solar tracker, increasing its overall dependability during operation.

The Designing and Construction of an Autonomous Dual-Axis-Based Solar Tracking System
This section outlines the preliminary design of a residential solar tracking prototype, detailing both its mechanical structure and electronic components that control the automation for optimal PV panel positioning.Leveraging our previous research experience, we developed an enhanced solar tracking prototype with higher commercial potential compared to existing market products [60].

Mechanical Design and Construction Considerations
According to our previous studies [61][62][63][64][65][66][67][68][69], successful software and hardware testing, as well as reliability assessment of dual-axis solar trackers, requires a robust and reliable experimental platform.Therefore, in this work, we propose an alternative mechanical structure that avoids the requirement for redundant cogwheel blocking elements, which improved the stepping motors' holding torque but consumed more energy during the system's idle time [61].As can be seen in Figure 2, additional changes and safeguards were incorporated into the final mechanical design to guarantee stability, durability, and security in the face of extreme weather conditions such as thunderstorms and wind gusts.

The Designing and Construction of an Autonomous Dual-Axis-Based Solar Tracking System
This section outlines the preliminary design of a residential solar tracking prototype, detailing both its mechanical structure and electronic components that control the automation for optimal PV panel positioning.Leveraging our previous research experience, we developed an enhanced solar tracking prototype with higher commercial potential compared to existing market products [60].

Mechanical Design and Construction Considerations
According to our previous studies [61][62][63][64][65][66][67][68][69], successful software and hardware testing, as well as reliability assessment of dual-axis solar trackers, requires a robust and reliable experimental platform.Therefore, in this work, we propose an alternative mechanical structure that avoids the requirement for redundant cogwheel blocking elements, which improved the stepping motors' holding torque but consumed more energy during the system's idle time [61].As can be seen in Figure 2, additional changes and safeguards were incorporated into the final mechanical design to guarantee stability, durability, and security in the face of extreme weather conditions such as thunderstorms and wind gusts.First, two flat strips (400 mm long, 20 mm wide, and 3 mm thick) were screwed onto the aluminum frame of the solar panel (a) using four Metric 4 countersunk head screws and nuts on one side and the other.Fork-shaped iron support (e) was developed by welding a rectangular profile with dimensions of 40 mm × 20 mm.In addition, two flat bands were welded to one end and the other of the forks' two arms, which were used to secure the side bearings (b1).The solar panel was installed in the two lateral bearings via a pair of axes with diameters of 20 mm and lengths of 65 mm welded in the middle of the flat strips.A worm gear (c1) is positioned on the right side of the solar panel, with a shaft that First, two flat strips (400 mm long, 20 mm wide, and 3 mm thick) were screwed onto the aluminum frame of the solar panel (a) using four Metric 4 countersunk head screws and nuts on one side and the other.Fork-shaped iron support (e) was developed by welding a rectangular profile with dimensions of 40 mm × 20 mm.In addition, two flat bands were welded to one end and the other of the forks' two arms, which were used to secure the side bearings (b1).The solar panel was installed in the two lateral bearings via a pair of axes with diameters of 20 mm and lengths of 65 mm welded in the middle of the flat strips.A worm gear (c1) is positioned on the right side of the solar panel, with a shaft that drives the axis from the same side of the panel.The worm gear is then operated by a stepper motor (d1) via two gears, the first (with 77 teeth) mounted on the reducer's worm shaft and the second (with 33 teeth) fixed directly on the Stepper motor's axis.The interaction of the two gears produces a higher force effective for rotating the 6 kg solar panel in a vertical plane, as demonstrated by the transmission ratio given by Equation (1) [70]: where T R represents the transmission ratio, Z 1 designates the number of teeth of the primary cogwheel, and Z 2 represents the number of teeth of the secondary cogwheel.As indicated in Equation ( 1), the transmission ratio is equivalent to a value of 2.3, meaning that the stepper motor will perform approximately two and a half full rotations to move the solar panel via the worm reducer, until it reaches the maximum angle of 90 • , given by the mechanical limit switch (i1) illustrated in Figure 2.
Second, in the lower-middle region of the fork frame, a shaft with a diameter of 30 mm was welded, directly connecting with the inferior bearing component (b2) utilized for horizontal rotation.In turn, the bearing component is coupled with the second worm gear (c2), which is operated by the horizontal stepper motor (d2).In this scenario, the stepper motor's freedom angle is 180 degrees from the initial position till it reaches the secondary mechanical limit switch (i2) with the help of a blocking component (f).The two plates (upper and lower) were held together by four 120 mm Metric 10 screws, providing the bottom worm gear's protection casing.
All of the abovementioned components, including the solar panel, frame, and both worm reducers, are supported by a rectangle bar 40 mm × 40 mm in size, which is installed on a metallic leg composed of two 640 mm bars welded perpendicularly to provide balance to the entire system.An anemometer (g) was mounted on the right side of the fork-shaped profile to measure the wind in real-time and trigger the flat position of the solar panel at 90-degree angles when turned by the vertical stepper motor for maximum safety.A rotary encoder (h) was installed on the left side of the bearing housing (b1) for proper monitoring.
Finally, as can be seen in Figure 2, a 330 mm × 350 mm metal case (j) was affixed to the main bar, which would later house the solar tracker's electronic components.

Electrical Schematic and Power Management
Since climate change is a very relevant problem in our society [71] and considering goal number 7 (affordable and clean energy) and goal number 13 (climate action) of the UN's Sustainable Development Goals [72], efforts towards renewable energy have been made [73].Consequently, to reduce the carbon footprint and electricity bills, many researchers designed solar tracking systems [74,75] to capture the sun's energy with maximum efficiency.
Regarding the data provided in Table 1, the majority of a solar tracker's electrical equipment is generally composed of sensors (light-dependent resistors), DC geared motors (servo motors), motor drivers, and a main Arduino UNO board, aiding the PV panel to achieve an average of 22% more energy gain.Our previous solar tracking system presented in [61] replaced the traditional light-dependent resistors with four optocoupler components encapsulated in an LTV-847 integrated circuit (IC) and the conventional DC-DC motors with more accurate stepper motors.The proposed prototype, similar to those in the previous manuscripts, also made use of an Arduino UNO and two specialized motor drivers, to optimize the position of the solar panel.
Furthermore, previous attempts to use the solar tracking prototype [61] to power a realtime deep learning (DL)-based system [66] and sensor-driven smart home automation [69] resulted in an increased number of PV cells for improving energy generation [68] and a power management solution for reducing overall system power consumption [69].Solar panel, temperature sensor, G15 cube servo ID 1, G15 cube servo ID 2, G15 driver, 5 V and 12 V power supplies, SD module, PC.

21.4%
Because solar tracking systems are deployed outside of domestic homes for in-field testing and considering the complexity of the digital circuits (MCUs, ICs, and dual H-bridges) incorporated in the electrical equipment of solar trackers, a proper selection of hardware components is a critical step before using them in residential and industrial environments.
The electronic market offers a wide range of low-power and affordable embedded devices, examples varying from API-oriented Arduino MCUs to more energy-efficient STM32 Nucleo boards which can be easily integrated into an embedded platform.However, Arduino and STM32 boards lack BIST capabilities and therefore are more prone to hardware faults that can affect the device's stability, leading to system failure in more severe cases.These hardware errors can occur as a result of prolonged sunlight exposure and changing weather conditions, all of which impact the normal operation of the external circuitry.Therefore, mobile PV systems consisting of embedded components pose a more difficult issue in the DFT domain and fault diagnosis methodology due to the higher perplexity of the electrical equipment.Following these considerations, in this work, we focus on building a preliminary electronic schematic based on a reasonable number of affordable sensors and a new power management solution, as illustrated in Figure 3.For clarity and a general understanding of the schematic, 5 V supply rails are highlighted with red lines, and GND rails are represented with blue lines.
From a manufacturing perspective, the 100 W PV panel incorporates bypass diodes to reduce power loss during cloudy or winter conditions.The panel's monocrystalline cells are safeguarded by white-tempered glass and weather-resistant film.An anodized aluminum frame provides robust protection against severe environmental conditions and high mechanical stress, such as hail.This solar panel is suitable for both on-grid and off-grid applications, boasting a performance ratio of 90% over 10 years and 80% over 25 years.Additionally, the solar charge controller is crucial for supplying energy to the solar installation and battery.It regulates the battery charging voltage at 14.1 V, powering high-consumption components like the motor driver, stepper motors, and a relay module, which reduces the voltage to 5 V for the Arduino Mega 256 board and SIM800L module.
An Arduino Mega 2560 board manages the primary movements of the PV panel through two stepper motors using a single motor driver, the TB6560.Three digital pins are designated to control the solar tracker's motion system: a step command from pin D2, a direction signal from pin D3 for clockwise or counterclockwise rotation, and an enable signal from pin D4.Additionally, pin D5 is connected to a Bestep 5 V relay module to drive each stepper motor individually.Activating the relay with a LOW signal on D5 triggers a second 12 V relay module, which has normally open and closed contacts controlled by the Bestep module.The relay coil is protected by an anti-parallel diode to prevent reverse voltage.The stepper motors, one for horizontal and one for vertical rotation, are modified versions of motors with six and eight wires.The TB6560 motor driver's outputs are connected to the common contact of the 12 V relay module, providing a supply current of 0.6 A, configured via the motor driver's built-in jumpers.An Arduino Mega 2560 board manages the primary movements of the PV panel through two stepper motors using a single motor driver, the TB6560.Three digital pins are designated to control the solar tracker's motion system: a step command from pin D2, a direction signal from pin D3 for clockwise or counterclockwise rotation, and an enable signal from pin D4.Additionally, pin D5 is connected to a Bestep 5 V relay module to drive each stepper motor individually.Activating the relay with a LOW signal on D5 triggers a second 12 V relay module, which has normally open and closed contacts controlled by the Bestep module.The relay coil is protected by an anti-parallel diode to prevent The solar tracking system's data acquisition feature includes several sensors for realtime monitoring of weather conditions and tracker status.The system uses a custom-built anemometer, a 5 V DC motor with permanent magnets, to generate voltage through rotation.A 100 KOhm resistor sets the current threshold of a 4.7 V Zener diode, protecting the Arduino Mega 2560 from input voltages exceeding 5 V on analog pin A8.Four photoresistors, connected to analog inputs A0 to A3, help determine the optimal solar energy capture point.To measure the PV panel's power generation and the solar tracking system's power consumption, voltage and current sensors are connected to analog inputs A4 to A7.A DHT22 sensor, connected to digital pin D28, monitors the PV panel's temperature and humidity, while a UV sensor on A9 tracks ultraviolet levels.Additionally, a BH1750 light intensity sensor, connected to digital pins D20 and D22, measures solar radiation throughout the day.
In the solar tracking device, additional sensors are primarily used to prevent damage to the electrical system and ensure the PV panel's position is updated according to the photoresistor values.To avoid wire bottlenecks around the horizontal axis, mechanical endstop limit switches (MELSs) with version number SS-GL52 are installed for the stepper motors' homing position and the maximum rotation angles of both axes.These four limit switches are connected to digital pins D22-D25 via 10 KOhm resistors.Due to the lack of feedback features in the stepper motors, two rotary encoders are connected to digital pins D8-D13 to monitor the rotation angle in real-time and detect any faults.Software testing validates the stepper motors, activating one of two LEDs (connected to digital pins D26-D27 via 350 Ohm resistors) to indicate motor damage.All hardware components, except the engine, receive a 5 V supply from a dedicated voltage inverter, which reduces 12 V from a car accumulator.An additional Bestep relay module measures the raw power generation of the PV panel under short-circuit conditions, protected by a 10 A, 1000 V diode against reverse voltage.The SIM800L V2 GSM/GPRS module transmits sensor data in real-time, monitoring temperature, wind speed, and solar radiation to aid in the software development of the dual-axis solar tracker.

The Software Implementation of the Dual-Axis-Based Solar Tracking System
To deploy a modern, automated, IoT-based solar tracking device that optimizes the use of its hardware components and sensor modules while reducing overall power consumption, reliable software implementation is essential.The software code for the dual-axis solar tracker, written in C++, includes numerous variables and custom functions, necessitating the breakdown of the workflow diagram into several blocks for better comprehension of the automation process.
As shown in Figure 4, the first block (a) features a custom homing function for calibrating the horizontal and vertical axes of the solar tracking system.The horizontal limit switch (HLS) and vertical limit switch (VLS) are continuously monitored in a while loop until both axes are positioned to face the sunrise each day.After the stepper motors complete their rotation and the homing function is achieved, the software proceeds to the second block (b) for the initial verification of the horizontal stepper (HS) and vertical stepper (VS).This function, assisted by rotary encoders, checks the functionality of both steppers.If the current clock impulse equals the previous one, indicating no rotation, the system sends an SMS alert to a repair service via the SIM800L GSM module.The application then pauses for 30 min, awaiting maintenance actions.Once the issue is resolved, the software checks the second motor similarly.
If both motors are operational, the routine advances to the third block (c), which is for protection purposes and verifies wind speed (WS) using the custom-built anemometer.By collecting multiple voltage samples from the anemometer, an average value of 0.56 V was determined to correspond to a wind speed of 60 km per hour (kph).Moreover, the Arduino Mega 2560 board operates with analog-to-digital converters (ADCs) to convert incoming voltage values (0-5 V) into digital values (0-1023), with the help of the relation presented in Equation (2) [76]: where R ADC represents the resolution of the ADC, S V designates the system voltage, ADCR is the ADC reading, and AVM represents the measured analog value.By substituting the known values, we obtain the digital equivalent of the analog voltage that we measured: Thus, if two pairs of points exist in a Cartesian graph system (x 1 , y 1 ), respectively (x 2 , y 2 ), where x 1 = 0, y 1 = 0, x 2 = 114, and y 2 = 60, we can define the slope as in Equation ( 4): where m represents the conversion ratio between actual wind speed (y) and the measured analog value (x).
where RADC represents the resolution of the ADC, SV designates the system voltage, ADCR is the ADC reading, and AVM represents the measured analog value.By substituting the known values, we obtain the digital equivalent of the analog voltage that we measured: 1023 1023 1023 0.56 114 5 5 0 .5 6 5 Thus, if two pairs of points exist in a Cartesian graph system (x1, y1), respectively (x2, y2), where x1 = 0, y1 = 0, x2 = 114, and y2 = 60, we can define the slope as in Equation ( 4): where m represents the conversion ratio between actual wind speed (y) and the measured analog value (x).Consequently, the software program will compare the registered analog readings to the value 114 (associated with 60 kph) and will then decide, based on the result, if the solar panel will be moved to the flat position, or otherwise, continue the solar tracking procedure.Similarly, in block (d), the solar radiation (SR) level is verified between two limits, SR low = 5000 lux and SR high = 10,000 lux, which helps us establish if the weather conditions are proper for switching to solar tracking mode.Generally, if the SR value falls between the two limits, improper weather conditions appear, such as clouds or heavy fog, thus hindering the solar tracking system from harvesting the maximum capacity of solar energy.Therefore, as an energy preservation method, the tracker will move the solar panel to the standard position (90 degrees to the south location, 45 degrees elevation angle) and will collect solar energy as a regular fixed-tilted PV system.However, if after a 5 min delay, the SR level improves, the software program will trigger the automated PV panel harvesting mode.Another important scenario to take into consideration is found in block (e), where we test if the SR goes below the value SR low = 5000 lux, meaning that sundown will occur very soon, and certain protection measures must be applied before interrupting the entire system.While this block anticipates sundown, it can only move the solar panel to the flat position via software code to make sure that heavy wind will not damage the solar tracker overnight.Finally, block (f) describes the SIM800L V2 GPRS data transmission that can be executed in five steps according to Figure 4.The software program will commence with the GPRS data transmission protocol by connecting the chip to the GSM provider which is associated with the acquired SIM card.Once the SIM800L V2 module is tethered to the GSM network, the chip will retrieve the local wireless network IP and then will further connect to the ThingSpeak server where all the sensor data will be collected.The last step involves disconnecting from the local IP address and stopping the GPRS data transmission protocol.
All five previously described custom function blocks are now strategically integrated into the main automation flowchart presented in Figure 5.The entire solar tracking automation process is divided into several stages, with the custom-implemented functions being called multiple times during code execution to handle real-time environmental changes.Consequently, the entire automation process, described through the lenses of the workflow blocks and main flowchart diagram, was possible due to the multiple software libraries and programming features of the Arduino Mega2560 board (Arduino SRL, Ivrea, Italy).Nevertheless, the Atmega MCU is known for its lack of self-testing capabilities, which forces us to substitute the main board with a custom-made ASPCB on which we In the preparation stage, encompassing steps 1-4, all digital pins of the Arduino Mega2560 are assigned to the physical pins of the sensor modules.If the PV panel is in a random position, the horizontal and vertical stepper homing function block (a) will be triggered to bring both axes to their reference point.The software then verifies the functionality of all sensor modules and resets the steppers' internal counters to the origin point (0,0).These initial steps are executed only once when the solar tracker software is launched.
The subsequent 32 steps are periodically executed in the main loop function.Once the preparation stage is complete, all sensor values are calibrated to an initial value, ready to read environmental data.Periodically, a complete check-up (steps 7-10) ensures efficient performance, invoking the scenarios for blocks (b), (c), (d), and (e).This check-up is followed by steps 11-26, which form the main body of the loop function.
In this code section, the horizontal light intensity (HLI) is evaluated to see if it falls within an established tolerance range.If HLI exceeds the tolerance, the algorithm splits into two branches.Steps 12-14 adjust the horizontal motor if the west-side light-dependent resistor (LDRW) receives less energy than the east-side LDR (LDRE).Conversely, steps 15-17 adjust the motor if LDRW displays more voltage than LDRE.If the horizontal positioning is correct, the code checks the vertical light intensity (VLI) in steps 18-25, balancing discrepancies between the north-side LDR (LDRN) and the south-side LDR (LDRS).After achieving correct positioning, there is a 5 s delay, then the GPRS data transfer block (f) is called four times with 10 min intervals to send sensor data to the ThingSpeak server (steps [28][29][30][31][32][33][34].The routine runs multiple times daily, and security blocks for wind gusts (c) and nightfall anticipation (e) follow.If neither block is triggered (steps [35][36], the algorithm repeats.If nightfall is detected, the system moves to a flat position and the solar charge controller powers off the system until the next sunrise (steps [37][38]. Consequently, the entire automation process, described through the lenses of the workflow blocks and main flowchart diagram, was possible due to the multiple software libraries and programming features of the Arduino Mega2560 board (Arduino SRL, Ivrea, Italy).Nevertheless, the Atmega MCU is known for its lack of self-testing capabilities, which forces us to substitute the main board with a custom-made ASPCB on which we also integrate affordable and less power-consuming hardware testing utilities.

The Hardware Implementation of the Dual-Axis-Based Solar Tracking System
This section focuses on the development of a novel ASPCB design, which represents one of the main contributions of the present work.First, the key components of a conventional BILBO schematic are detailed, and then, by comparison, we show the improvements in the proposed reconfigurable architecture over traditional BIST solutions in terms of fault coverage and anti-aliasing features.The modified BILBO hardware implementation is simulated via Verilog language in the Altera Modelsim environment.Finally, the resulting design is integrated into an energy-efficient ASPCB that replaces the Arduino Mega 2560 prototyping board.

Main and Modified Versions of the BILBO Architecture
The BILBO is an embedded and offline BIST architecture because it employs existing flip-flops (FFs) from the CUT to deploy the test pattern generator (TPG) and output response analyzer (ORA) units.The CUT is therefore divided into groups of FFs and groups of combinational logic.Each group of FFs is enlarged with additional logic to ensure multiple modes of operation.When the BILBO functions as a TPG, it provides pseudo-random test patterns by operating as an LFSR.When the BILBO functions as an ORA, it performs multiple-input signature analysis by operating as a multiple-input signature register (MISR).The application of a BILBO to a CUT in its simplest form is depicted in Figure 6 where the FFs at the primary inputs and outputs are used to deploy two BILBOs. of combinational logic.Each group of FFs is enlarged with additional logic to ensure multiple modes of operation.When the BILBO functions as a TPG, it provides pseudo-random test patterns by operating as an LFSR.When the BILBO functions as an ORA, it performs multiple-input signature analysis by operating as a multiple-input signature register (MISR).The application of a BILBO to a CUT in its simplest form is depicted in Figure 6 where the FFs at the primary inputs and outputs are used to deploy two BILBOs.The BILBO at the primary inputs generates pseudo-random test patterns as a TPG, while the BILBO at the primary outputs operates as a MISR-based ORA, thus performing test vector compression.Consequently, the BILBO is a test-per-clock BIST method since a new test pattern is applied to the CUT and a new output response is compacted during each clock cycle of the BIST sequence [77].The additional gates added to the existing flipflops to create the BILBO (as it was originally proposed) are illustrated in Figure 7 for a 4bit BILBO implementation.For each FF, one exclusive OR gate, one AND gate, and one NOR gate are added [78].
For each BILBO, one multiplexer, one inverter, and one or more exclusive OR gates The BILBO at the primary inputs generates pseudo-random test patterns as a TPG, while the BILBO at the primary outputs operates as a MISR-based ORA, thus performing test vector compression.Consequently, the BILBO is a test-per-clock BIST method since a new test pattern is applied to the CUT and a new output response is compacted during each clock cycle of the BIST sequence [77].The additional gates added to the existing flip-flops to create the BILBO (as it was originally proposed) are illustrated in Figure 7 for a 4-bit BILBO implementation.
of combinational logic.Each group of FFs is enlarged with additional logic to ensure multiple modes of operation.When the BILBO functions as a TPG, it provides pseudo-random test patterns by operating as an LFSR.When the BILBO functions as an ORA, it performs multiple-input signature analysis by operating as a multiple-input signature register (MISR).The application of a BILBO to a CUT in its simplest form is depicted in Figure 6 where the FFs at the primary inputs and outputs are used to deploy two BILBOs.The BILBO at the primary inputs generates pseudo-random test patterns as a TPG, while the BILBO at the primary outputs operates as a MISR-based ORA, thus performing test vector compression.Consequently, the BILBO is a test-per-clock BIST method since a new test pattern is applied to the CUT and a new output response is compacted during each clock cycle of the BIST sequence [77].The additional gates added to the existing flipflops to create the BILBO (as it was originally proposed) are illustrated in Figure 7 for a 4bit BILBO implementation.For each FF, one exclusive OR gate, one AND gate, and one NOR gate are added [78].
For each BILBO, one multiplexer, one inverter, and one or more exclusive OR gates For each FF, one exclusive OR gate, one AND gate, and one NOR gate are added [78].
For each BILBO, one multiplexer, one inverter, and one or more exclusive OR gates (needed to construct a primitive characteristic polynomial) are added.As can be observed in Figure 7, the LFSR mode of operation uses an external feedback implementation for the characteristic polynomial expressed in Equation (5): There are two control leads used to switch the modes of operation of the BILBO.During BIST operation, the MISR mode is used for output data compaction.To provide a TPG during BIST, the Z inputs to the BILBO must be held at a constant logic 0. This forces the MISR to now operate as an LFSR generating a maximum length sequence of pseudo-random test patterns.This requires additional logic and/or additional control inputs to the BILBO.For example, additional AND gates can be added to the Z inputs to force all Z inputs to logic 0 under the control of a third control input, when the BILBO is to operate as an LFSR-based TPG.Alternatively, each of the two-input AND gates at the Z inputs, shown in Figure 7, can be expanded to three-input AND gates driving the third input.An alternate approach is to provide independent control of the multiplexer using an additional control input (as shown in parentheses in Figure 7) [78].Therefore, the BILBO as originally proposed was not directly capable of operating as a TPG.
A final modification to the BILBO overcomes the TPG mode of operation problem discussed above with minimum area overhead and without the need for the third control input.This modification is illustrated in Figure 8 for a 4-bit implementation where the architecture makes use of NAND gates instead of NOR gates.The modes of operation for this version of the BILBO are given as a function of the two control inputs, and the BILBO is initialized using the scan mode of operation.This version of the BILBO has been more frequently used in applications since the mid-1980s than the original version of the BILBO.Regarding the BILBO evolution stages, the original implementation required pin B1 to control both TPG and MSIR modes during operation.Moreover, forcing logic 0's on Z inputs caused MISR to function as an LFSR device for test pattern generation, while the LFSR could only operate with external EXOR gates.The later BILBO implementation added a control signal B3 to control the TPG and MISR modes more effectively.
ing BIST operation, the MISR mode is used for output data compaction.To provide a TPG during BIST, the Z inputs to the BILBO must be held at a constant logic 0. This forces the MISR to now operate as an LFSR generating a maximum length sequence of pseudo-random test patterns.This requires additional logic and/or additional control inputs to the BILBO.For example, additional AND gates can be added to the Z inputs to force all Z inputs to logic 0 under the control of a third control input, when the BILBO is to operate as an LFSR-based TPG.Alternatively, each of the two-input AND gates at the Z inputs, shown in Figure 7, can be expanded to three-input AND gates driving the third input.An alternate approach is to provide independent control of the multiplexer using an additional control input (as shown in parentheses in Figure 7) [78].Therefore, the BILBO as originally proposed was not directly capable of operating as a TPG.
A final modification to the BILBO overcomes the TPG mode of operation problem discussed above with minimum area overhead and without the need for the third control input.This modification is illustrated in Figure 8   All the abovementioned features and functional aspects of the main and modified BILBO implementations are summarized in Table 2.All the abovementioned features and functional aspects of the main and modified BILBO implementations are summarized in Table 2.
As can be seen in Table 2, the original BILBO variant allowed sufficient headroom for additional gates and hardware changes to satisfy all modes of operation according to the testing needs, therefore proving extremely adaptable for practical applications.Due to the BILBO's flexibility and being aware of the limitations that are imposed by the two earlier described architectures, we propose a novel and efficient fault diagnosis implementation based on a modified BILBO architecture.The hardware design, with minimal hardware area overhead, will employ a reduced number of combinational and sequential circuits to identify stuck-at faults (SaFs) on the MCU's critical path signals which control the motor driver's behavior.

Reconfigurable BILBO Architecture for Stuck-At Fault Detection
Our previous attempts to devise a configurable BIST framework [64] yielded a hardware configuration that remained separate from the chip's primary design and utilized multiple devices as a CUT [63].This approach resulted in an augmented presence of logic elements (such as multiplexers, flip-flops, and logic gates) and an increase in power consumption during testing procedures.Hence, this study concentrates on formulating a reconfigurable multiple-input signature register (MISR) derived from the previously outlined BILBO structures for on-chip testing purposes.The implementation process is segmented into various phases, beginning with the analysis of output signals from the motor driver and culminating in the final layout of the ASPCB, which will integrate the RBILBO architecture.
A more detailed examination of the signals was undertaken in [61] through the development of an online built-in self-test (OBIST) aimed at detecting single bit-flips and single stuck-at faults.Real-time monitoring of output signals from the motor driver was conducted using a Hantek 6022BE PC Oscilloscope, as illustrated in Figure 9.The captured waveforms apply to most contemporary motor drivers designed for the control of two-phase bipolar stepper motors.The TB6560, introduced in Section 3, is a microcircuit manufactured by Toshiba, featuring a galvanically isolated Step/Dir interface and offering four engine control modes: full-step, half-step, micro-stepping 1/8 step, and micro-stepping 1/16 step.These control modes enhance precision and balance power consumption while moving the mechanical axis of the solar tracking system.The Step signal functions as a trigger signal, where each pulse (HIGH value) indicates a single-step rotation of the motor's rotor.It is important to note that a step here refers to the driver's step and not necessarily the minimum discrete movement of the stepper motor.In micro-stepping mode, one step represents only a fraction of the physical step of the motor.Typically, motor drivers respond to signal edges, and the frequency of the Step signal, as depicted in Figure 9, determines the rotational speed of the motor.Both the maximum Step pulse repetition rate and minimum pulse width are constrained, usually dictated by the capabilities of the motor driver.The actual rotational speed of the motor is constrained by factors such as winding current, mechanical loads, inertia, etc.
The Dir signal indicates the rotational direction of the motor.Generally, a high signal level implies clockwise rotation, while a low signal level indicates rotation in the opposite direction.The Enable signal is used to activate the motor driver, with the disabling signal level merely removing voltage from the output without affecting the driver's logic.Hence, the Enable pin can stop the motor without maintaining the current flow.The motor driver can operate even with a low signal level (no input voltage).Typically, the interface signals for stepper motor drivers are galvanically isolated due to the presence of significant switching currents in power circuits with stepper motors, resulting in high levels of noise and voltage level shifts across all modules in the system's common wires (ground).Galvanic isolation becomes crucial under such conditions.As previously mentioned, the Step/Dir interface serves as the primary control interface for the stepper motor driver, comprising three signals: Step, Dir, and Enable.
The Step signal functions as a trigger signal, where each pulse (HIGH value) indicates a single-step rotation of the motor's rotor.It is important to note that a step here refers to the driver's step and not necessarily the minimum discrete movement of the stepper motor.In micro-stepping mode, one step represents only a fraction of the physical step of the motor.Typically, motor drivers respond to signal edges, and the frequency of the Step signal, as depicted in Figure 9, determines the rotational speed of the motor.Both the maximum Step pulse repetition rate and minimum pulse width are constrained, usually dictated by the capabilities of the motor driver.The actual rotational speed of the motor is constrained by factors such as winding current, mechanical loads, inertia, etc.
The Dir signal indicates the rotational direction of the motor.Generally, a high signal level implies clockwise rotation, while a low signal level indicates rotation in the opposite direction.The Enable signal is used to activate the motor driver, with the disabling signal level merely removing voltage from the output without affecting the driver's logic.Hence, the Enable pin can stop the motor without maintaining the current flow.The motor driver can operate even with a low signal level (no input voltage).
Additionally, a Relay signal was incorporated in the present study to switch between the two stepper motors controlling the solar tracking system.When a HIGH signal is applied to the relay module's input, the system switches to horizontal stepper control.Conversely, when a LOW signal is applied, the vertical motor becomes fully operational for rotating the PV panel according to the firmware.The four control signals-Enable, Relay, Step, and Direction-are activated when the inputs of the Arduino Mega MCU receive analog values from the photoresistors.
The initial phase of designing the BIST architecture for the ASPCB involves test pattern generation.Here, a pseudo-random pattern generator (PRPG) is developed to generate test patterns, which will subsequently be linked as stimulus signals to the DUT's input.Leveraging the Arduino Mega 2560's ADC module for instantaneous translation of analog data into digital format enables us to emulate these sensor values efficiently using an LFSR-based device and a reduced set of test vectors, as depicted in Figure 10.The hardware design of the 5-bit LFSR is implemented according to the non-primitive polynomial        1 and requires only five clock cycles to generate distinct test patterns for its outputs.Moreover, since one memory component can output two Boolean values (one binary digit and its complement), we can generate the required test vector length using only five DFF units.However, since it is necessary to inject test patterns on two 10-bit digital channels (west and east photoresistors for the horizontal rotation and, respectively, north and south photoresistors for the vertical rotation), only one 5-bit LFSR component may not suffice.Therefore, our complete PRPG architecture is composed of a pair of 5-bit LFSRs, whose outputs will be tethered, in turn, to each of the digital channels.
Regarding the seed value of the LFSR device, we included two command lines: reset and set.When the asynchronous reset line is active low, the 5-bit shift register will output the seed value 1010101010' on the first positive edge of the clock signal, representing a random digital value (682).On the other hand, a second 5-bit LFSR with the same characteristics could be employed with a distinct seed value 1001010101' (597) generated by the asynchronous set line on the same clock edge.Thus, we can simulate the horizontal and vertical movement of the solar tracking system by generating higher values on the first TPG unit and lower values on the second TPG unit, in a parallel manner.Based on the digital values' concurrent generation, the horizontal and vertical modules of the solar tracking device will output a binary sequence equal to the axis rotation step.
The second phase of constructing the BIST design is a multifaceted process comprising three sub-steps: signature generation, compression, and analysis.The binary se- The hardware design of the 5-bit LFSR is implemented according to the non-primitive polynomial P(x) = x 5 + x 4 + x 3 + x 2 + x + 1 and requires only five clock cycles to generate distinct test patterns for its outputs.Moreover, since one memory component can output two Boolean values (one binary digit and its complement), we can generate the required test vector length using only five DFF units.However, since it is necessary to inject test patterns on two 10-bit digital channels (west and east photoresistors for the horizontal rotation and, respectively, north and south photoresistors for the vertical rotation), only one 5-bit LFSR component may not suffice.Therefore, our complete PRPG architecture is composed of a pair of 5-bit LFSRs, whose outputs will be tethered, in turn, to each of the digital channels.
Regarding the seed value of the LFSR device, we included two command lines: reset and set.When the asynchronous reset line is active low, the 5-bit shift register will output the seed value '1010101010' on the first positive edge of the clock signal, representing a random digital value (682).On the other hand, a second 5-bit LFSR with the same characteristics could be employed with a distinct seed value '1001010101' (597) generated by the asynchronous set line on the same clock edge.Thus, we can simulate the horizontal and vertical movement of the solar tracking system by generating higher values on the first TPG unit and lower values on the second TPG unit, in a parallel manner.Based on the digital values' concurrent generation, the horizontal and vertical modules of the solar tracking device will output a binary sequence equal to the axis rotation step.
The second phase of constructing the BIST design is a multifaceted process comprising three sub-steps: signature generation, compression, and analysis.The binary sequences provided by the DUT undergo further processing through a signature analyzer, referred to as an ORA unit.The RBILBO architecture can serve as both a TPG and an ORA unit, contingent upon the configuration of control signals, as depicted in Figure 11.The primary signals, B and P, govern the dataflow within the modified BIBLO design through five AND gates and a multiplexer.While the first input, B, manages the LFSR/MISR functionality of the architecture, the second input, P, comprising 2 bits, configures the expression of the generator polynomial on the negative feedback paths of the RBILBO.( ) where Y is the multiplexer's output; Z0, Z1, Z2, Z3, and Z4 are the data inputs; Q0, Q1, Q3, and Q4 designate the DFF's non-complemented outputs; and Y represents the multiplexer's output.The final output Q of the sequential circuit is obtained by performing a linear concatenation on all DFF outputs mentioned above.The remaining output Y of the combinational selection device, illustrated in the lower layer of Figure 10, can be written as in the Boolean expression (7): where Y is the multiplexer's output; P0, P1, P2, and P3 are the selection lines of the multiplexer and, respectively, Q0, Q1, Q3, and Q4 designate the DFF's outputs on the negative feedback paths of the RBILBO architecture.The reconfigurability equation is derived directly from the hardware design, and can be written as in Equation ( 8): The RBILBO architecture, similar to the PRPG design illustrated in Figure 10, introduces a set and reset signal to each of the five DFF units to establish the initial seed value of the shift register.When the set signal is activated and reset is inactive, the entire content of the register is set to a non-zero value, indicating that the architecture can function as an LFSR.Conversely, when the set signal is deactivated and reset is activated, the register's content is cleared, preparing the architecture to operate as a MISR.As depicted in Figure 11, the RBILBO architecture utilizes a minimal number of digital components (5 × AND gates, 9 × XOR gates, and an additional multiplexer) to construct the reconfigurable mechanism.Regarding the RBILBO's shifting procedure, represented in the upper layer of Figure 11, we can write the equation system: where Y is the multiplexer's output; Z 0 , Z 1 , Z 2 , Z 3 , and Z 4 are the data inputs; Q 0 , Q 1 , Q 3 , and Q 4 designate the DFF's non-complemented outputs; and Y represents the multiplexer's output.The final output Q of the sequential circuit is obtained by performing a linear concatenation on all DFF outputs mentioned above.The remaining output Y of the device, illustrated in the lower layer of Figure 10, can be written as in the Boolean expression (7): where Y is the multiplexer's output; P 0 , P 1 , P 2 , and P 3 are the selection lines of the multiplexer and, respectively, Q 0 , Q 1 , Q 3 , and Q 4 designate the DFF's outputs on the negative feedback paths of the RBILBO architecture.The reconfigurability equation is derived directly from the hardware design, and can be written as in Equation ( 8): where P 1 (x), P 2 (x), P 3 (x), and P (x) are the polynomial functions associated with the XOR gates inserted into the negative feedback channels and, respectively, C 1 , C 2 , C 3 , and C 4 represent the taps between the ranks of the RBILBO architecture.Finally, P(x) is the mathematical variable that generates each of the polynomial functions.

Proposed ASPCB Design with Self-Testing Facilities
In addition to the original operational circuit, the modified Arduino Mega development board includes a cost-effective and energy-efficient self-test architecture.Thus, the schematic representation created in Altium Designer v22, illustrated in Figure 12, can be separated into multiple portions based on the function of the ICs used.represent the taps between the ranks of the RBILBO architecture.Finally, P(x) is the mathematical variable that generates each of the polynomial functions.

Proposed ASPCB Design with Self-Testing Facilities
In addition to the original operational circuit, the modified Arduino Mega development board includes a cost-effective and energy-efficient self-test architecture.Thus, the schematic representation created in Altium Designer v22, illustrated in Figure 12, can be separated into multiple portions based on the function of the ICs used.The power and control area, as seen in Figure 12a, contains the Atmega2560 microcontroller (U1), which controls the entire system, as well as voltage stabilizers that power all of the ICs on the board.According to the scheme, the board receives voltage from an external source via a RASM722PTR13X power connector J1, which is protected by a Schottky diode marked D1 (MBRA140T3G).Biased capacitors PC1 and PC2 (47 uF), as well as C1 (100 nF), C2 (10 uF), and C3 (22 uF), are used to filter the input voltages in the circuit.Circuit U2 (NCP1117ST50T3G) stabilizes the 12 V voltage from the input to 5 V (output), whereas unit U3 (LM1117T-3.The power and control area, as seen in Figure 12a, contains the Atmega2560 microcontroller (U1), which controls the entire system, as well as voltage stabilizers that power all of the ICs on the board.According to the scheme, the board receives voltage from an external source via a RASM722PTR13X power connector J1, which is protected by a Schottky diode marked D1 (MBRA140T3G).Biased capacitors PC1 and PC2 (47 uF), as well as C1 (100 nF), C2 (10 uF), and C3 (22 uF), are used to filter the input voltages in the circuit.Circuit U2 (NCP1117ST50T3G) stabilizes the 12 V voltage from the input to 5 V (output), whereas unit U3 (LM1117T-3.3)generates a stable voltage of 3.3 V from a nominal 12 V.The quartz oscillator X1 (ATS16ASM-1) generates a clock signal at 16 MHz for the Atmega2560 microprocessor.Non-polarized capacitors C4 and C5 (100 nF) play the role of carrying out phase inversion.The resistors R1 (1 MOhm) and R2 (27 Ohm) improve the and facilitate its oscillations.The normally open contact SW1 enables the activation of the Reset input, which is active on the logical 0 level and restores the system to its initial state.The P1 unit is an array of integrated circuit serial programming (ICSP) pins that connect an external AVR microcontroller to modify or update the firmware on the Atmega2560 microprocessor.
The input vector generating component, as shown in Figure 12b, is composed of two LFSRs that comprise D-type FF ICs (SN74LVC2G74DCTR) with a D data channel, Q, and Q negated outputs, as well as the clock, reset, and preset signals, respectively.The first group of FFs, labeled U4A-U8A, consists of a series of XOR ICs (SN54HC86J) labeled U14A, U15B, U16C, and U17D, which process the data transferred from one data cell to another, resulting in the desired binary sequence.Similarly, the second group of FFs labeled U9A-U13A has an identical hardware configuration, with XOR gates (U18A-U21A) positioned between segments of 1-bit registers.The 10-bit binary strings from both LFSR structures will be routed to the Atmega2560 microchip's analog inputs via an intermediate segment filter.
The selection and conversion segment, as depicted in Figure 12c, comprises the switching ICs (SN74CBTD16210DGGR) marked SEL1A to SEL4A.These demultiplexers have the role of transmitting the 10-bit data packets in a predetermined order.The selection of the pairs of vectors is performed with the help of an inverter circuit (SN74LVC1GU04DBVT), which turns on the switches SEL1A and SEL2A or, respectively SEL3A and SEL4A, depending on the value of the control signal.Since the Atmega2560 microchip only recognizes purely analog values on inputs A0-A3, it was necessary to insert TLC5615CP ICs, marked U23 to U26, which enable the digital-to-analog conversion of the 10-bit data packets.
The command-and-control section of the BIST testing, presented in Figure 12d, uses four L7805CV ICs to enable the test paths obtained by combining switches with digitalto-analog converters.Thus, the voltage stabilizer U27 turns on or off the power to the light sensors LDR0-LDR3, allowing for the next three stabilizers, U28-U30, to associate the appropriate switch-converter pairs.The four voltage stabilizers are controlled numerically by means of FOD817A3SD optocoupler circuits marked from U31 to U34.Thus, when the optocoupler transistor is activated, it allows for the stabilizer to be connected to the ground, which in turn provide a voltage of 5 V at its output.
The compression and signature analysis section represents the final layer of the selftest design and consists of several D-type flip-flops (labeled U39A to U43A) interconnected via XOR gates (listed U44A to U47A).Although the RBILBO adopts a similar structure to the PRPG circuits, the modified variant of MISR provides a series of additional circuits for adjusting the characteristic generator polynomial.Therefore, we notice the presence of four AND gates (SN74LVC1G08DBVR) marked from U35A to U38A, used to capture the data received from the outputs of the Atmega2560 microcontroller by means of a validation line.We can also distinguish four additional XOR gates labeled U48A through U51A inserted on the feedback paths of the MISR circuit.The feedback path is selected using a multiplexer circuit U52 (SN74LS253DR) with four input channels and one output channel.The 2-bit select line and multiplexer enable signal are directly controlled by the Atmega2560 microcontroller.The 5-bit signatures generated during each clock cycle are routed to the final signal analysis block, which consists of a 4-bit dual-channel comparator (U53) (CD74HC85MT) and a 128-bit EPROM unit (U54) (24AA00T-I/OT).The EPROM stores the fully working device's golden signatures, and the comparator circuit compares the standard signatures to the bit vectors received from the MISR.To convert the 4-bit comparator to an extended 5-bit form, the input and output corresponding to the operation (A = B) were canceled, and the remaining pins were grouped to obtain the appropriate number of bits for the two 5-bit inputs.An XOR gate (U55) and an inverting gate (U56) were added to the comparator circuit's output to ensure that the signatures were identical.Potential errors in the system are notified by diodes DS1 and DS2 (TLMS1100-GS08), mounted on outputs (A > B) and (A < B).Thus, Sa0 and Sa1 faults are indicated by the red color of the relevant LEDs.When no faults are discovered in the system operation mode, diode D3 (LTST-C190GKT) The resistors R4-R6 (CRCW0603200RFKEA) were used to limit current at the anode of the reference diodes.

The Mathematical Approach for Computing the Dependability of the Solar Tracking System
This section describes the numerical method for determining the reliability and maintainability of the solar tracking prototype which makes use of software and hardware testing methods to enhance its durability during everyday operation.Whereas the reliabilityoriented metrics are supported by fault coverage derived from various test strategies, the maintenance-oriented metric system targets the modularity and accessibility of the solar tracking prototype hardware structure.

Fault Coverage-Aware Metrics for Reliability Evaluation
As solar tracking systems comprise electrical components prone to hardware faults like stuck-at or delay faults, particular emphasis is placed on evaluating the reliability of pivotal components such as the MCU, responsible for controlling axis rotations through a dedicated motor driver.This research delves into the possibility of precisely computing the SRF parameter using the proposed RBILBO solution, drawing upon three novel fault coverage-aware metrics introduced in earlier studies [66, 67,69].
Evaluating availability and reliability in PV systems entails scrutinizing failure data amassed during field testing.These data are then utilized to forecast maintenance costs for forthcoming equipment repairs.Similarly, experimental data derived from the RBILBO solution are leveraged to delineate hardware fault coverage.Fault coverage denotes the percentage of tested vectors compared to the total number of test patterns.The formula for calculating fault coverage (FC) is outlined in Equation ( 9) [79]: where T V represents the number of test vectors, whereas T P signifies the count of tested patterns.Furthermore, a hardware detection ratio is introduced, designated as DR, and is expressed as depicted in Equation ( 10) [79]: where FC represents the hardware fault coverage, and N P stands for the total number of test patterns.The detection ratio holds significance as it facilitates the computation of the solar test factor (STF) within the fault coverage-aware metrics equation set.The STF parameter for hardware test scenarios can be mathematically expressed as shown in Equation ( 11) [79]: In Equation (11), D represents the number of D FFs utilized in the MISR's hardware design.However, Equation ( 11) serves as a universal formula and necessitates suitable adjustments to account for single SaFs, double SaFs, and triple SaFs accordingly.Thus, the original metrics system [64] undergoes modification to align with the requirements of the three-test scenario, as outlined in Equation ( 12) [79]: the conducted experimental cases, the FC parameter increases according to the use of reconfigurability, thus eliminating the number of undetected errors, and can be written as in Equation ( 13) [79]: where ALS denotes the aliasing factor employed to mask bit configurations that correspond to the golden signatures.Subsequently, the detection ratio is computed for each of the three test batches, according to Equation ( 14) [79]: where SaF 1 , SaF 2 , and SaF 3 are parameters that denote single, double, and, respectively, triple SaF models.SaF models are particularly useful in the design and testing of digital circuits because they provide a systematic way to evaluate the circuit's behavior under various fault conditions, helping to identify potential weaknesses or defects in the design.These models are also used in fault diagnosis to determine the location and nature of faults in a circuit based on its observed behavior.

Maintenance-Oriented Metric System for Reducing the Mean Time to Repair
Maintainability metrics are less prevalent in hardware than in software development, but they are still useful to examine and improve the maintainability of hardware systems.Hardware maintainability metrics assess the efficiency with which hardware components, systems, or equipment may be maintained, repaired, upgraded, or expanded.This section extends the previously mentioned fault coverage-aware metrics with a novel maintenanceoriented metric system that uses several hardware assets such as modularity, accessibility, and predictive maintenance devices.
The modularity factor (MF), derived from the aforementioned features, serves as a metric employed to measure the modularity of a solar tracking system.Modularity refers to the extent to which a system is composed of separate, interchangeable, and independently replaceable components.A higher modularity suggests a system design that allows for easy replacement or upgrading of individual components without affecting the entire system.Mathematically, the MF value can be expressed as in Equation ( 15): In the context of Equation ( 15), N MC refers to the count of components within the solar tracking system that are designed to be modular, meaning they can be easily detached, replaced, or upgraded, and T NC is the overall count of components in the solar tracking system, regardless of their modularity.
The accessibility score (AS) serves as a metric employed to measure the ease with which maintenance personnel can access components within a solar tracking system.This metric is geared towards assessing the accessibility of components, a factor that significantly influences the efficiency of maintenance and repair tasks.A higher AS signifies a system design that enables straightforward access to components, thereby reducing downtime during maintenance activities.The AS can be written as in Equation ( 16): In the context of Equation ( 16), N AC refers to the count of components within the solar tracking system that are easily reachable or removable during maintenance activities, and T NC overall count of components in the solar tracking system, regardless of their accessibility.
Predictive maintenance efficiency (PME) is a metric used to measure the effectiveness of predictive maintenance capabilities within a solar tracking system.Predictive maintenance involves the use of sensors, test devices, and data analytics to monitor the condition of components and predict when maintenance should be performed, allowing for proactive maintenance activities.A higher PME indicates a system that efficiently utilizes sensors for predictive maintenance, contributing to reduced downtime and improved reliability.The PME metric can be mathematically expressed as in the following formula: In the context of Equation ( 17), N TD refers to the count of sensors and test devices within the solar tracking system that are specifically utilized for predictive maintenance purposes.Finally, the T NC is the overall count of sensors in the solar tracking system, including those used for various purposes, not just predictive maintenance.
By combining the aforementioned metrics regarding modularity, accessibility, and predictive maintenance, we can define the MI variable which describes the maintainability of solar tracking systems: where w 1 , w 2 , and w 3 are the weighting factors assigned to each metric based on their relative importance, and the values of MF, AS, and PME range from 0 to 100.Additionally, the sum of all weights must be equal to 1, as presented in Equation ( 19): Therefore, the final formula for the maintainability metric can be rewritten as shown in Equation (20): In essence, the MI is a useful tool for assessing, optimizing, and sustaining complex systems such as solar tracking systems.It provides stakeholders with actionable insights for improving system performance, dependability, and durability through proper maintenance methods.Moreover, higher modularity, accessibility, and predictive maintenance facilities may significantly improve system uptime by reducing mean time to repair (MTTR).
MTTR is a key maintenance metric that indicates the average time taken to diagnose and rectify faulty equipment.It essentially measures an organization's efficiency in handling and resolving unplanned equipment breakdowns.The MTTR encompasses the following steps: (a) alerting the technicians about the issue; (b) diagnosing the root cause of the problem; (c) undertaking necessary repairs; (d) giving the equipment time to cool down, if necessary; (e) reassembling, aligning, and calibrating the equipment; (f) finally, setting up, testing, and restarting the equipment for regular production.Notably, MTTR does not factor in the waiting period for replacement parts.The MTTR formula can be expressed as in Equation ( 21): where T MT represents the total unplanned maintenance time spent on an asset, and T NF designates the total number of failures that the asset experienced over a specific period.
MTTR is most commonly represented in hours and assumes that tasks are performed sequentially by appropriately trained personnel.By combining the MTTR standard metrics maintenance-oriented metric system, we can estimate an improved MTTR index, which is mathematically expressed as in Equation ( 22): where MTTR I designates the enhanced MTTR variable, MTTR B is the baseline MTTR, n is the number of maintenance-oriented metrics considered, and TR represents the hour reduction associated with each metric i.To develop a mathematical model that shows the exact time reduction resulting from each metric based on the percentage of MF, AS, and PME, we need to establish relationships between these metrics and the corresponding hour reductions.Thus, we correlate a mathematical function with the MF, AS, and PME metrics to measure the hour decrease based on their respective percentage values.
Regarding the modularity metric, let us consider a function that represents the hour reduction resulting from the MI percentage.To compute this function, we need to establish a relationship between the percentage of MI and the corresponding hour reduction.Given that the MF represents the ease of replacing faulty components, we can assume a linear relationship where a higher MF percentage leads to a greater hour reduction.For example, if MF = 100% corresponds to a 2 h reduction, then 50% MF might correspond to a 1 h reduction.Therefore, we can define the modularity function according to Equation ( 23): where f MF denotes the hour reduction function, MF is the value of modularity expressed in percentage, and k 1 s is a constant representing the hour reduction per percentage of MF.
Regarding the accessibility metric, similar to the approach for the MF, we can assume a linear relationship between the AS percentage and the hour reduction.A higher AS percentage indicates better accessibility, leading to a greater reduction in repair time.For example, if AS = 100% corresponds to a 3 h reduction, then 50% AS might correspond to a 1.5 h reduction.Thus, the AS function will become the following: where f AS denotes the hour reduction function, AS is the value of modularity expressed in percentage, and k 2 s is a constant representing the hour reduction per percentage of AS.
Regarding the predictive maintenance metric, to compute the function representing the hour reduction resulting from the PME percentage, we need to establish a relationship between the PME percentage and the corresponding hour reduction.PME involves the ability of the system to predict and prevent failures, which can lead to a reduction in repair time.Similar to the previous cases, we write the following: where f PME designates the hour reduction function, PME is the value of predictive maintenance in percentage, and k 3 is a constant representing the hour reduction per percentage of PME.The overall hour reduction can be expressed as a combination of the hour reductions from each metric, weighted by their respective percentages: In the context of Equation ( 26), T HR represents the total hour reduction, while MF, AS, and PME are the coefficients associated with each hour reduction function.

The Experimental Discussion
This section presents the dependability assessment of the solar tracking prototype and is therefore divided into two major parts.The first portion deals with the reconfigurabilityreliability dependency using the RBILBO design, and the second part depicts the computations regarding the maintainability metrics.
7.1.The Reconfigurability-Reliability Dependency Based on the Improved Fault Coverage While initial dependability evaluation studies have demonstrated the efficiency of fault coverage-aware metrics [66] in computing two quality parameters, STF and SRF, based on software [62], hardware [63,64], and in-circuit (IC) [65] testing strategies, further investigations have revealed the possibility of combining these verification methods into one unified metrics system [68].The improved reliability-oriented metrics were then applied to a solar-powered home automation setup [69] to show the impact of software, hardware, and IC errors on the global energy production of modern solar tracking systems.Moreover, using specific error correction codes (ECCs), such as Hamming codes, may effectively increase the SRF of an automated PV panel by removing single bit-flip and stuck-at faults from the system [79].Thus, the research activity was primarily focused on analyzing and increasing the dependability of dual-axis solar trackers, without consideration for their maintainability characteristics.To bridge this gap, our work exploits the reconfigurabilityreliability dependency resulting from enhanced fault coverage to develop a predictive failure curve for evaluating the maintainability of modern solar tracking systems.For our case study, we will focus on the P-F curve analysis of the solar tracker's electrical equipment, specifically the MCU's functionality under various fault scenarios comprising stuck-at-0 (Sa0) and stuck-at-1 (Sa1) defects.
The test cases were divided into multiple batches according to the severity of the Enable (e), Relay (r), Step (s), and Direction (d) pin damage, namely, single, double, and triple SaFs.The fault scenarios, on the other hand, were evaluated using the LFSR unit presented in Figure 10 and the RBILBO design illustrated in Figure 11.The experimental results were obtained from a testbench module that was simulated in the Altera Modelsim environment.Regarding single SaFs, the diagnostic system identified 12 Sa0 and Sa1 faults out of 32 test scenarios using only one polynomial function (G1), outlining an initial FC of 37.5%.After the second test batch, when the polynomial function of the proposed RBILBO architecture was switched to G2, 27 samples were recognized as Sa0 and Sa1 faults, increasing FC by 46.87%.By simulating a third batch of test scenarios, the fault diagnostic system was able to identify all Sa0 and Sa1 faults via the G3 polynomial function, further increasing the FC to 100%.The final FC can be written as in Equation ( 27): where FC SSaF represents the cumulative FC for single SaFs, FC SaF1 denotes the individual fault coverage for single SaFs, and, respectively, G 1 , G 2 , and G 3 designate the generator polynomial functions used in the RBILBO.
In the second batch of SaFs, the fault diagnostic approach identified 12 Sa0 and Sa1 out of 24 test instances, using the G1 polynomial function, yielding an initial fault coverage of 50%.After utilizing the second set of test vectors and adjusting the polynomial to G2, the initial fault coverage increased to 79.16%, reducing aliasing by 29%.Furthermore, by performing an additional set of 24 test vectors with the G3 polynomial function, we were able to increase fault coverage by 20.8% while lowering aliasing to 0%.The mathematical relation for the final FC is presented in Equation ( 28): DSaF represents the cumulative FC for double SaFs, FC SaF2 denotes the individual fault coverage for double SaFs, and, respectively, G 1 , G 2 , and G 3 designate the generator polynomial functions used in the RBILBO.
In the third batch of SaFs, the RBIBLO approach detected 15 Sa0 and Sa1 faults out of 32 test scenarios, for an initial FC of 46.87% using only the G1 polynomial function.Using an additional set of 32 test vectors and switching to the G2 polynomial resulted in an improvement in FC of 81.24%, with 26 detections.However, during the third simulation run, employing the G3 polynomial function, the FC only increases by 12.51%, leaving 6.25% ALS as a residual, as seen in Equation ( 29): ) + ALS = 46.87%+ 34.37% + 12.51% + 6.25% = 93.75%+ 6.25%, (29) where FC TSaF represents the cumulative FC for triple SaFs, FC SaF3 denotes the individual fault coverage for triple SaFs, and, respectively, G 1 , G 2 , and G 3 designate the generator polynomial functions used in the RBILBO.As a result, the overall FC for all 96 test instances was 93.75%, indicating 30 successful identifications of 32 probable Sa0 and Sa1 fault scenarios.
In conclusion, the global fault coverage for all 264 experimental trials was assessed at an average of 98%, with only 2% of ALS occurring during the simulation.In the context of computer systems and digital communication, aliasing refers to the phenomenon where two different signals produce the same output when sampled or quantized by a digital system.This can occur due to limitations in the sampling or quantization process [80].The experimental results indicate that the proposed RBILBO architecture enhances initial fault coverage by an average of 53%, demonstrating its feasibility as a low-cost and adaptable design for efficient fault detection implementation.Following, by addressing the polynomial function G 1 , the corresponding DR values can be computed as in Equation ( 30): where N P = 32 and each FC variable is substituted by the values computed in Equations ( 27)- (29).
Regarding the polynomial functions, G1 and G2, the corresponding DR values can be computed as in Equation ( 31): where N P = 32 and each FC variable is represented by the values computed in Equations ( 27)- (29).
Regarding the polynomial functions G1, G2, and G3, the corresponding DR values can be computed as in Equation ( 32): where N P = 32 and each FC variable is replaced by the values computed in Equations ( 27)- (29).
The DR values, computed from Equations ( 30)- (32), serve as an indicator of the identification of S-a-0 and S-a-1 faults through the fault diagnostic process, concerning the overall number of test patterns (NP = 32).Utilizing Equation ( 12), the calculation of the STF parameter facilitated based on these derived values, employing the G 1 polynomial function: where D = 5 is the number of DFFs used in the RBILBO design.By adding the G2 polynomial, we obtain the following: where D = 5 is the number of DFFs used in the RBILBO design.By using the G 3 polynomial, we compute the following: where D = 5 is the number of DFFs used in the RBILBO design.At this point, all computed STF parameters will be used to determine the SRF of the automated PV panel, according to Equation ( 36): Similar to the STF calculations, the SRF parameter can be determined by inserting the computed values into the global reliability equation system presented in Equation (37): where SRF G is the global reliability factor relative to polynomial functions G 1 , G 2 , and G 3 ; STF G is the algebraic sum obtained from Equations ( 33)- (35); and e is Euler's constant with a standard value of 2.71.In reliability theory, the P-F curve is a graphical model for visualizing an asset's status over time, thereby introducing the notion of condition-based maintenance and other related topics.The P-F curve illustrates the link between asset condition and time.The model shows that from the outset of a failure, the asset condition decreases until it achieves functional failure.The overall purpose of asset inspections in a predictive maintenance plan is to detect condition degradation before the equipment achieves functional breakdown [81].
Figure 13 illustrates the P-F curve generated by an Altera Modelsim simulation spanning 25,000 picoseconds (2.5 × 10 −8 s).It is separated into three main regions.The first region, called the predictive domain, is the area where the solar tracking system's normal behavior is continuously monitored for potential hardware faults that may affect the stability of the device.However, over time, we could estimate the first potential failure point, denoted with P, which is provided by the FC determined via the G1 polynomial function.Potential failure indicates the point at which we notice the solar tracker's reliability is starting to decrease, highlighting the second region of the graphical chart designated as the preventive domain.
ure.Despite the efforts to maintain the solar tracker's performance, unidentified hardware faults may continue to damage the system until a median failure point is detected via the G2 polynomial function triggering the third region called the reactive domain.During this stage, emergency repairs and replacements are conducted to offset the device's degradation levels, which, if unsuccessful, may result in the functional failure point (F), as determined by the G3 polynomial function, highlighting the system's breakdown.At this point, the solar tracker's reliability reaches a critical value (37.67%), showing that the system may be unable to continue its normal routine functions.Reactive maintenance is often considered the least desirable maintenance strategy because it can be costly, inefficient, and disruptive to the solar tracker's energy harvesting operations.Therefore, this work advances a new approach to improving the predictive maintenance domain by integrating fault diagnosis systems, as well as software solutions for active health monitoring of solar tracking equipment.By combining the previously formulated fault coverage-aware metrics with the proposed maintenance-oriented metric system, we aim to In preventive maintenance, routine inspections, servicing, repairs, and replacements are carried out on equipment regardless of whether there are any signs of impending failure.Despite the efforts to maintain the solar tracker's performance, unidentified hardware faults may continue to damage the system until a median failure point is detected via the G2 polynomial function triggering the third region called the reactive domain.During this stage, emergency repairs and replacements are conducted to offset the device's degradation levels, which, if unsuccessful, may result in the functional failure point (F), as determined by the G3 polynomial function, highlighting the system's breakdown.
At this point, the solar tracker's reliability reaches a critical value (37.67%), showing that the system may be unable to continue its normal routine functions.Reactive maintenance is often considered the least desirable maintenance strategy because it can be costly, inefficient, and disruptive to the solar tracker's energy harvesting operations.Therefore, this work advances a new approach to improving the predictive maintenance domain by integrating fault diagnosis systems, as well as software solutions for active health monitoring of solar tracking equipment.By combining the previously formulated fault coverage-aware metrics with the proposed maintenance-oriented metric system, we aim to develop an efficient dependability assessment tool for evaluating the reliability, availability, and maintainability of modern solar trackers.

The Maintainability Index Computation for State-of-the-Art Solar Tracking Systems
The experimental results regarding maintainability can be obtained by applying the maintenance-oriented metric system to the proposed solar tracking prototype.The determined maintainability value is then compared to the score distribution of other dualaxis solar trackers from related research.To estimate the MI, several other parameters must be computed first according to the steps presented in Section 6.2.The modularity of the solar tracking device is given by the number of components which, in case of malfunction, can be easily swapped during maintenance operations.According to the solar tracking prototype's hardware configuration, the MF can be computed by applying the Equation (15) as follows: where N MC = 32 represents the number of easily replaceable electronic components, and T MC = 38 represents the total number of electronic components available in the system.
Therefore, the entire solar tracking device has a modularity score of 84.21%.Next, the AS can be calculated by using Equation ( 16), as follows: where N AC = 35 designates the number of easily reachable electronic components, and T MC = 38 represents the total number of electronic components available in the system.Therefore, the entire solar tracking device has an accessibility value of 92.10%.Following, the PME is determined via Equation ( 17) as follows: where N TD = 8 refers to the total number of system health monitoring devices (1 × temperature sensor, 2 × rotary encoders, 2 × LFSR units, 1 × reconfigurable MISR, and 1 × comparator), while T MC = 38 denotes the total number of electronic components available in the system, regardless of their testing features.Thus, the entire solar tracking system has a predictive maintenance score of 21.05% considering all testing devices.The MI computation, on the other hand, depends on the initial value selection of the weights associated with the previously determined metrics.Since the priority of this work is set toward integrating effective testing facilities for solar tracking systems, let us assume the following weight factor distribution: w 1 = 0.3 (30% importance for modularity); w 2 = 0.3 (30% importance for accessibility); w 3 = 0.4 (40% importance for predictive maintenance).Based on these values, the MI can be computed as in Equation ( 41): For the proposed solar tracking prototype, the overall MI is 61.28.This combined metric provides a single numerical value that reflects the maintainability of the solar tracking system, considering modularity, accessibility, and predictive maintenance facilities with the associated weights.Table 3 shows a comparison between the proposed solar tracking prototype and several other dual-axis designs from related research, in terms of the total number of components, modularity, accessibility, and predictive maintenance efficiency.Related study indicates that solar tracking devices have been developed for a variety of goals, including power gain demonstration [27,28], and the implementation of predictive monitoring algorithms and test solutions for increased energy output [74,75].Regardless of their development target, solar tracking systems must feature a durable and dependable design that can withstand the severe weather conditions in desert climate zones [74], far from rural and urban areas.
One way to assess dependability is by computing the MI score for several solar tracking architectures, as shown in Table 3.While general considerations declare that a lower number of available components (T NC ) usually results in higher maintainability, comparing the works in [27,28], we can observe that modularity improves the MI result of the solar tracker design in [28] by 10% compared to the work in [27].Similarly, modularity significantly benefits the solar tracking architecture described in [63], resulting in a higher MI score than the system depicted in [74].Finally, considering the scenario where two solar tracking systems make use of predictive control strategies for ensuring increased energy production [75,82], the number of employed test devices slightly improves the maintainability of the installation.Conclusively, solar tracking systems with a lower T NC value are easier to maintain, whereas devices equipped with a greater number of electronic devices can compensate by integrating sensor modules and test devices to improve their dependability.
Besides its benchmarking capabilities, the maintenance-oriented metric system can be used to reduce the MTTR parameter of solar tracking systems.To determine the T HR parameter, it is mandatory to formulate a maintenance scenario for a one year schedule.For example, let us assume that a repair team has spent 50 h on unplanned maintenance for a solar tracking system that has broken down eight times over a year.According to Equation ( 21), the MTTR is computed as in Equation ( 42): What constitutes a superior MTTR depends on several parameters, including asset type, criticality, and age.However, an appropriate guideline is an MTTR of less than 5 h.Therefore, by following the mathematical rules presented in Equations ( 22) to ( 26 where k 1 = 1.68 represents the hour reduction per modularity percentage, and MF = 84.21% is the computed modularity value from Equation (38).Thus, the time hour reduction using the modularity metric is 1.41 h.Regarding accessibility, by considering that for AS = 100% we have a 1.5 h reduction in repair time: where k 2 = 1.38 represents the hour reduction per accessibility percentage, and AS = 92.10% is the computed accessibility value from Equation (39).Thus, the time hour reduction using the accessibility metric is 1.27 h.Concerning predictive maintenance, assuming that for PME = 100% we obtain a 1 h reduction in repair time; it can be written as follows: where k 3 = 0.21 represents the hour reduction per predictive maintenance percentage, and PME = 21.05% is the computed predictive maintenance value from Equation (40).Thus, the time hour reduction using the predictive maintenance metric is 0.42 h.Finally, the total hour reduction can be calculated as in Equation ( 46 Consequently, the proposed maintenance-oriented system achieves a 3 h reduction in the baseline MTTR by taking advantage of the modularity, accessibility, and predictive monitoring tools of modern solar tracking devices.

Conclusions and Future Work
Evaluating reliability is vital when evaluating the effectiveness of modern solar tracking systems, and numerous methods are available for this analysis, contingent upon the specific component under scrutiny [83].This paper introduces a mathematical approach for assessing the dependability of state-of-the-art solar tracking devices.The novel maintenance-oriented metric system comprises three sub-metrics addressing the modularity, accessibility, and preventive maintenance of the solar tracker's electronic equipment.For demonstration purposes, a dual-axis solar tracking prototype is designed from several components including 1 × Arduino Mega2560 microcontroller unit (MCU), 1 × TB6560 stepper driver module (Toshiba Corporation, Tokyo, Japan), 2 × stepper motors, 2 × relay modules, 1 × solar charge controller, 1 × accumulator, and 1 × voltage convertor.Additional hardware elements such as photoresistors, mechanical limit switches, rotary encoders, voltage, and current sensors are also included to complete the automation cycle of the solar tracking system.The reliability of the solar tracking prototype is evaluated via the reconfigurability property of a modified built-in logic block observer architecture, which is integrated into a low-cost and energy-efficient ASPCB layout created in Altium Designer v22.Furthermore, the solar tracker's maintainability is assessed by analyzing the modularity, accessibility, and preventive maintenance facilities of its hardware components.
Regarding fault coverage, several test cases were conducted by simulating the reconfigurable built-in logic block observer architecture in the Altera Modelsim environment.The experimental results show that the modified BILBO design can achieve an average fault coverage of 44.79% using only one generator polynomial function (G1), an average cumulative fault coverage of 81.53% using two polynomial functions (G1, G2), and an average cumulative fault coverage of 97.9% by employing three characteristic polynomials (G1, G2, and G3) for all Sa0 and Sa1 fault scenarios.Therefore, the reconfigurable built-in self-test schematic improves the initial fault coverage by an average of 53% over a low simulation period (2.5 × 10 −8 s), demonstrating its feasibility as a low-cost and adaptable design for efficient fault detection implementation.
Regarding reliability, a probability-failure curve analysis of the solar tracking system was performed using the fault coverage values obtained in the previous experiments.The probability-to-failure graphical representation is an essential assessment tool for estimating the system's availability, and thus, the potential failure points of the system were determined via the computed solar reliability factor parameters based on the fault coverage-aware metrics.The probability-failure curve shows that the solar tracking system's availability starts to degrade at point p = 64.07%and reaches its critical threshold at F = 37.7%.The point-to-failure interval comprises the proactive and reactive domains, which rely mainly on repairing and replacing malfunctions components to avoid total system breakdown.However, extended maintenance operations are generally expensive and most of the time ineffective when dealing with multiple hardware problems.Therefore, shifting the focus to the predictive maintenance domain is a more accurate and cost-effective solution for decreasing system downtime.
Regarding maintainability, the proposed metrics were applied to the solar tracking prototype to establish the modularity, accessibility, and predictive maintenance features of the hardware components.Thus, the dual-axis solar tracker exhibits MF = 84.21%design modularity, AS = 92.10%design accessibility, and PME = 21.05%preventive maintenance facilities.Additionally, the proposed system design achieves a higher maintainability score MI = 61.28%compared to other dual-axis solar tracking prototypes due to the PME features of the ASPCB layout.Finally, by considering the time reduction property of each formulated metric, we could demonstrate that solar tracking systems with improved design modularity, accessibility, and predictive maintenance features can decrease the baseline MTTR from 6.25 h to 3.15 h, resulting in a 50,4% repair time reduction.
Generally, solar tracking systems are overshadowed by fixed PV panel setups on the market due to the increased investment in additional components, and higher maintenance costs during the product's lifespan.By effectively implementing a maintenance-oriented metric system, solar tracking devices can become more competitive with fixed solar panel installations [84].In future work, we propose to perform a more in-depth analysis of PV systems based on tracking devices and maximum power point tracking (MPPT) [85], evaluating their dependability from the cost, energy production, and maintainability points of view.A suitable metric system for standalone solar panels and CSP systems could be formulated to adopt a more balanced comparison strategy.
Conclusively, by employing a maintenance-oriented metric system, future modern solar tracking systems can achieve higher reliability, cost savings, improved planning, extended lifespan, safety, and reduced environmental impact.The provided mathematical model demonstrates how these metrics can quantitatively reduce MTTR and overall maintenance efforts.Furthermore, the RBILBO-based fault diagnosis system proves beneficial for improving the PME, which enables predictive maintenance strategies, allowing for potential issues to be identified and addressed before they lead to system failures.

Figure 1 .
Figure 1.Hard costs, soft costs, and maintenance costs of PV systems with tracking features.

Figure 1 .
Figure 1.Hard costs, soft costs, and maintenance costs of PV systems with tracking features.

Figure 2 .
Figure 2. Frontal and side view of the dual-axis solar tracker mechanical design.

Figure 2 .
Figure 2. Frontal and side view of the dual-axis solar tracker mechanical design.

Figure 3 .
Figure 3. Connection diagram and smart power management solution of the solar tracker.

Figure 3 .
Figure 3. Connection diagram and smart power management solution of the solar tracker.

Figure 4 .
Figure 4. Workflow diagram custom functions used for automating the solar tracking system, comprising the (a) Homing Position Function, (b) Stepper Testing Function, (c) Wind Protection Function, (d) Solar Tracking Function, (e) Flat Position Function, and (f) Data Transfer Function.
Appl.Syst.Innov.2024, 7, x FOR PEER REVIEW 14 of 39 called four times with 10 min intervals to send sensor data to the ThingSpeak server (steps 28-34).The routine runs multiple times daily, and security blocks for wind gusts (c) and nightfall anticipation (e) follow.If neither block is triggered (steps 35-36), the algorithm repeats.If nightfall is detected, the system moves to a flat position and the solar charge controller powers off the system until the next sunrise (steps 37-38).

Figure 5 .
Figure 5. Main flowchart describing the entire solar tracking automation process.

Figure 5 .
Figure 5. Main flowchart describing the entire solar tracking automation process.

Figure 6 .
Figure 6.BILBO architecture comprising a combinational circuit and latch structure.

Figure 7 .
Figure 7.The conventional BILBO architecture is implemented with NOR blocks and a multiplexer.

Figure 6 .
Figure 6.BILBO architecture comprising a combinational circuit and latch structure.

Figure 6 .
Figure 6.BILBO architecture comprising a combinational circuit and latch structure.

Figure 7 .
Figure 7.The conventional BILBO architecture is implemented with NOR blocks and a multiplexer.

Figure 7 .
Figure 7.The conventional BILBO architecture is implemented with NOR blocks and a multiplexer.
for a 4-bit implementation where the architecture makes use of NAND gates instead of NOR gates.The modes of operation for this version of the BILBO are given as a function of the two control inputs, and the BILBO is initialized using the scan mode of operation.This version of the BILBO has been more frequently used in applications since the mid-1980s than the original version of the BILBO.Regarding the BILBO evolution stages, the original implementation required pin B1 to control both TPG and MSIR modes during operation.Moreover, forcing logic 0's on Z inputs caused MISR to function as an LFSR device for test pattern generation, while the LFSR could only operate with external EXOR gates.The later BILBO implementation added a control signal B3 to control the TPG and MISR modes more effectively.

Figure 8 .
Figure 8.The conventional BILBO architecture is implemented with NAND blocks and a multiplexer.

Figure 8 .
Figure 8.The conventional BILBO architecture is implemented with NAND blocks and a multiplexer.

Figure 9 .
Figure 9. Stepper motor driver output signals before (Right) and after calibration (Left).Distorted waveforms on the right become flat signals on the left after probe compensation.

Figure 9 .
Figure 9. Stepper motor driver output signals before (Right) and after calibration (Left).Distorted waveforms on the right become flat signals on the left after probe compensation.

39 Figure 10 .
Figure 10.Proposed PRPG Architecture for test vector generation comprising four D-type Flip Flops denoted with D0-D4, one clock signal, one reset signal, and one set signal.

Figure 10 .
Figure 10.Proposed PRPG Architecture for test vector generation comprising four D-type Flip Flops denoted with D0-D4, one clock signal, one reset signal, and one set signal.

Figure 12 .
Figure 12.Proposed ASPCB layout with self-testing features for the solar tracking system.
3) generates a stable voltage of 3.3 V from a nominal 12 V.The quartz oscillator X1 (ATS16ASM-1) generates a clock signal at 16 MHz for the Atmega2560 microprocessor.Non-polarized capacitors C4 and C5 (100 nF) play the role of carrying out phase inversion.The resistors R1 (1 MOhm) and R2 (27 Ohm) improve the crystal's stability and facilitate its oscillations.The normally open contact SW1 enables the activation of the Reset input, which is active on the logical 0 level and restores the system to its initial state.The P1 unit is an array of integrated circuit serial programming (ICSP) pins that connect an external AVR microcontroller to modify or update the firmware on the Atmega2560 microprocessor.

Figure 12 .
Figure 12.Proposed ASPCB layout with self-testing features for the solar tracking system.

Table 1 .
Various solar tracking systems implementations based on the Arduino UNO microcontroller.

Table 2 .
Truth table of operational modes for the original and modified BILBO architectures.

Table 3 .
Maintainability index computation across several dual-axis solar tracking system designs.