Reliability Study of Electronic Components on Board-Level Packages Encapsulated by Thermoset Injection Molding

A drastically growing requirement of electronic packages with an increasing level of complexity poses newer challenges for the competitive manufacturing industry. Coupled with harsher operating conditions, these challenges affirm the need for encapsulated board-level (2nd level) packages. To reduce thermo-mechanical loads induced on the electronic components during operating cycles, a conformal type of encapsulation is gaining preference over conventional glob-tops or resin casting types. The availability of technology, the ease of automation, and the uncomplicated storage of raw material intensifies the implementation of thermoset injection molding for the encapsulation process of board-level packages. Reliability case studies of such encapsulated electronic components as a part of board-level packages become, thereupon, necessary. This paper presents the reliability study of exemplary electronic components, surface-mounted on printed circuit boards (PCBs), encapsulated by the means of thermoset injection molding, and subjected to cyclic thermal loading. The characteristic lifetime of the electronic components is statistically calculated after assessing the probability plots and presented consequently. A few points of conclusion are summarized, and the future scope is discussed at the end.


Introduction
The recently changing trends in the automotive sector towards greener and autonomous mobility and the ever increasing growth in the market of handheld devices (especially towards 5G implementation) coupled with other consumer dominant markets enforce the electronics industry to constantly improve itself in terms of functional integration and miniaturization with minimum compromise on the reliability. To attain a certain level of functional integration and miniaturization, the need of board-level (2nd level) packages crops up. The robustness, namely the ability of the package to protect itself from external harmful media and withstand or overcome adverse environmental conditions, is brought in by means of a board-level encapsulation.
An assessment of thermoset injection molding for the encapsulation of PCBs with surface-mounted electronic components was presented in a previous work [1]. During that assessment, mold trials were package to protect itself from external harmful media and withstand or overcome adverse environmental conditions, is brought in by means of a board-level encapsulation.
An assessment of thermoset injection molding for the encapsulation of PCBs with surface-mounted electronic components was presented in a previous work [1]. During that assessment, mold trials were carried out as a part of a chalked out design of experiments (DoE) with PCBs of different transition temperatures (125 °C and 170 °C) and different encapsulation thicknesses (0.25 to 1 mm) to evaluate the implementation of thermoset injection molding as an alternative to other dominant methods for the purpose of the encapsulation of board-level packages. An example of such an encapsulated package is shown in Figure 1. The definition of levels of packaging (here, 2nd level package) is taken from [2] and was also summarized in [1]. As mentioned already in [1], extensive literature is not available on this particular topic (encapsulation of 2nd level packages with the help if thermoset injection molding). Extensive research is, however, available in the field of 1st level packaging with encapsulations manufactured by transfer molding [3,4] and as a part of the Cornell injection molding program (CIMP), especially report 16 [5]. Further literature is also available relating to wafer-level encapsulations [6][7][8][9]. An approach for the reliability analysis can be derived according to a standard operating procedure used for microsystem technology in the automotive sector, as also used in [10]. This procedure is explained in the Sections 2.4 and 2.5. Useful tips and relevant information about board-level reliability of different components (without 2nd level encapsulation) are available in different sources [11][12][13][14][15][16][17][18][19]. These sources lay out the best practices used for defining and testing board-level reliability, involving the reliability analysis of commonly used components like ball grid arrays (BGAs) [13,16], quad-flat no-leads packages (QFN) [11,15], and thin small outline packages [17]. The effect of 2nd level encapsulation, e.g., by means of conformal potting on QFN reliability is presented in [20]. The fundamentals (distribution and probability) and definitions regarding lifetime and reliability are taken from [21], leading to the choice of valid analysis methods dependent on case information. This systematic approach for the reliability analysis is followed in line with a previous work [22], which presents the reliability analysis of different commonly used electronic components (ceramic resistors, BGAs, QFN, and small outline packages) mounted on different substrates relevant for molded interconnect devices (MID). In the sections to follow, the conception of such a package to be encapsulated is introduced (Section 2.1), a filling process simulation is presented (Section 2.2), the executed mold trials are detailed out (Section 2.3) before the test-setup is exhibited (Section 2.4) and the implementation of the tests is explained (Section 2.5). Furthermore, the mechanisms of the failure of the components are evaluated (Section 3.1) and the statistical analysis of the recorded data is put forth (Section 3.2). In the end, the results are discussed along with the drawn conclusions (Section 4). In the sections to follow, the conception of such a package to be encapsulated is introduced (Section 2.1), a filling process simulation is presented (Section 2.2), the executed mold trials are detailed out (Section 2.3) before the test-setup is exhibited (Section 2.4) and the implementation of the tests is explained (Section 2.5). Furthermore, the mechanisms of the failure of the components are evaluated (Section 3.1) and the statistical analysis of the recorded data is put forth (Section 3.2). In the end, the results are discussed along with the drawn conclusions (Section 4).

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2.
The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 • C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.  Table 1.

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.  Table 1.

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.  Table 1.

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.  Table 1.

Conception of the Package
A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components.  Table 1. A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components. Figure 2. Conception of the electronic assembly to be encapsulated. It involves a wide range of applied surface-mounted components. See legend in Table 1. A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components. Figure 2. Conception of the electronic assembly to be encapsulated. It involves a wide range of applied surface-mounted components. See legend in Table 1. A board-level package with commonly used electronic components was designed. Some of these components and the package with the mounted components are shown in Figure 2. The chosen and mounted components are enlisted in Table 1. A printed circuit board (PCB) of size 55 mm × 55 mm × 1.55 mm was used. To avoid the bending of the PCB during the overmolding process, as noticed in [1], boards made of a material with a high glass transition temperature (170 °C) were procured. A thermo-mechanical analysis (TMA) was carried out on a sample to confirm the transition temperature. The PCBs were subsequently subjected to a 100% inspection process for electrical connectivity of all the mounted components. Figure 2. Conception of the electronic assembly to be encapsulated. It involves a wide range of applied surface-mounted components. See legend in Table 1. The encapsulation was carried out using the thermoset injection molding process. For this purpose, an Arburg Allrounder 375 V with necessary attachments, tooling, and encapsulation material (NU6110V by Duresco) analog to [1]  The encapsulation was carried out using the thermoset injection molding process. For this purpose, an Arburg Allrounder 375 V with necessary attachments, tooling, and encapsulation material (NU6110V by Duresco) analog to [1]  The encapsulation was carried out using the thermoset injection molding process. For this purpose, an Arburg Allrounder 375 V with necessary attachments, tooling, and encapsulation material (NU6110V by Duresco) analog to [1]  The encapsulation was carried out using the thermoset injection molding process. For this purpose, an Arburg Allrounder 375 V with necessary attachments, tooling, and encapsulation material (NU6110V by Duresco) analog to [1] was used. The chosen material is easily available in the European market and, according to the manufacturer, is suitable for this purpose. The fed granulate PT100 Thermal resistor 1 The encapsulation was carried out using the thermoset injection molding process. For this purpose, an Arburg Allrounder 375 V with necessary attachments, tooling, and encapsulation material (NU6110V by Duresco) analog to [1] was used. The chosen material is easily available in the European market and, according to the manufacturer, is suitable for this purpose. The fed granulate of the material was heated at a temperature of 70 • C and then injected into a molding tool held at elevated temperatures of 160 to 175 • C, which contained the mounted PCB as a mold insert.

Process Simulation
To reduce the risks of defects during the injection molding process and to optimize the tempering concept, a simulation study using SIGMASOFT®was carried out beforehand. The geometry model used for these simulations can be seen in Figure A1 (Appendix A). Process parameters such as melt temperature, tool temperature, flow control, etc., are fed to the simulation with reference to material data [23] and based on previous experience. These parameters are listed in Table 2.
The output of the simulation can be seen in Figure 3. The material manufacturer recommends (which is also confirmed by earlier experience gained during [1]) that a sprue (runner) length of approximately 100 mm is required for the processed material to attain a temperature of around 130 • C. The simulation showed that such a temperature level could be realized in this case successfully. Six filling stages are shown with an indicated percentage of cavity filled. The total cavity volume is defined as the encapsulation and the runner system together. As seen in the stage 50% filled, it can be noted that the runner system contributes to a little more than half of the cavity to be filled to ensure that a higher melt temperature is attained-a temperature level required to achieve the low viscosity of flowing melt and subsequently accelerate the curing after the filling stage is complete. A video of the filling simulation is made available as Supplementary Materials to this article.

Mold Trials
The mold trials were carried out in a sequential manner according to the experience gained during the earlier feasibility tests. Regular purging and cleaning of the molding tool, as per the recommendations of the material and machine suppliers, were carried out before, during, and after the mold trials. The process parameters had to be fine-tuned as per the interim molding results. The final parameters are listed out in Appendix A (Tables A1 and A2).
As a standard practice, a mold filling study was conducted to measure and adjust the injection screw speeds and time intervals. This filling study also serves to observe the filling behavior of the melt in the mold cavity and to compare the same with the process simulation results. After conducting several mold (pilot) trials, an optimized filling pattern was achieved and is presented in Figure 4.
The upper row of pictures shows the flow pattern on the (surface)-mounted side of the PCB and the lower row shows the same on the unmounted side. The real flow pattern is similar to the pattern foreseen by means of the process simulation ( Figure 3). screw speeds and time intervals. This filling study also serves to observe the filling behavior of the melt in the mold cavity and to compare the same with the process simulation results. After conducting several mold (pilot) trials, an optimized filling pattern was achieved and is presented in Figure 4. The upper row of pictures shows the flow pattern on the (surface)-mounted side of the PCB and the lower row shows the same on the unmounted side. The real flow pattern is similar to the pattern foreseen by means of the process simulation ( Figure 3).

Test Setup
Eight packages of each of the two types, namely open and encapsulated, were electrically tested, soldered with connecting cables, and then fixed on two mounting plates (one mounting plate shown in Figure 5). All the mounted components on the PCBs with connecting pads on the left side were connected for inline testing by means of resistance measurement. The components that led to the right side of the PCB were the thermistor and the capacitors which were not tested inline. The capacitors were tested for functionality after definite relevant intervals. As a standard practice, a mold filling study was conducted to measure and adjust the injection screw speeds and time intervals. This filling study also serves to observe the filling behavior of the melt in the mold cavity and to compare the same with the process simulation results. After conducting several mold (pilot) trials, an optimized filling pattern was achieved and is presented in Figure 4. The upper row of pictures shows the flow pattern on the (surface)-mounted side of the PCB and the lower row shows the same on the unmounted side. The real flow pattern is similar to the pattern foreseen by means of the process simulation ( Figure 3).

Test Setup
Eight packages of each of the two types, namely open and encapsulated, were electrically tested, soldered with connecting cables, and then fixed on two mounting plates (one mounting plate shown in Figure 5). All the mounted components on the PCBs with connecting pads on the left side were connected for inline testing by means of resistance measurement. The components that led to the right side of the PCB were the thermistor and the capacitors which were not tested inline. The capacitors were tested for functionality after definite relevant intervals.

Test Setup
Eight packages of each of the two types, namely open and encapsulated, were electrically tested, soldered with connecting cables, and then fixed on two mounting plates (one mounting plate shown in Figure 5). All the mounted components on the PCBs with connecting pads on the left side were connected for inline testing by means of resistance measurement. The components that led to the right side of the PCB were the thermistor and the capacitors which were not tested inline. The capacitors were tested for functionality after definite relevant intervals.

Running of Tests
The two mounting plates were placed in the climatic chamber (CTS TSS-70/130) for the thermal shock tests. The test conditions were defined according to current advancements and other standard practices in the automotive industry. The packages were subjected to thermal cyclic loading (shock), involving temperature levels of +150 • C and −40 • C with a holding time of 15 min on each side. Apart from the chamber changing time of 10 s, a waiting time of 60 s was induced before measuring the resistance at each temperature level to allow for the thermal equilibrium of the system. The adequacy of this waiting time was checked by means of thermistor measurements on sample packages. Figure 6 shows the process flow for a systematic approach towards reliability analysis, which was followed and can also be applied to analyze similar parts or components.

Running of Tests
The two mounting plates were placed in the climatic chamber (CTS TSS-70/130) for the thermal shock tests. The test conditions were defined according to current advancements and other standard practices in the automotive industry. The packages were subjected to thermal cyclic loading (shock), involving temperature levels of +150 °C and −40 °C with a holding time of 15 minutes on each side. Apart from the chamber changing time of 10 s, a waiting time of 60 s was induced before measuring the resistance at each temperature level to allow for the thermal equilibrium of the system. The adequacy of this waiting time was checked by means of thermistor measurements on sample packages. Figure 6 shows the process flow for a systematic approach towards reliability analysis, which was followed and can also be applied to analyze similar parts or components

Mechanisms of Failure
To investigate the different mechanisms of failure for the packages and the individual mounted components, these were subjected to multiple tests. Firstly, visual inspection was carried out to

Running of Tests
The two mounting plates were placed in the climatic chamber (CTS TSS-70/130) for the thermal shock tests. The test conditions were defined according to current advancements and other standard practices in the automotive industry. The packages were subjected to thermal cyclic loading (shock), involving temperature levels of +150 °C and −40 °C with a holding time of 15 minutes on each side. Apart from the chamber changing time of 10 s, a waiting time of 60 s was induced before measuring the resistance at each temperature level to allow for the thermal equilibrium of the system. The adequacy of this waiting time was checked by means of thermistor measurements on sample packages. Figure 6 shows the process flow for a systematic approach towards reliability analysis, which was followed and can also be applied to analyze similar parts or components

Mechanisms of Failure
To investigate the different mechanisms of failure for the packages and the individual mounted components, these were subjected to multiple tests. Firstly, visual inspection was carried out to

Mechanisms of Failure
To investigate the different mechanisms of failure for the packages and the individual mounted components, these were subjected to multiple tests. Firstly, visual inspection was carried out to notice abnormalities on the packages, e.g., missing components from open packages and surface of the encapsulation. Open PCBs witnessed the falling off of failed components due to the failure of the solder joint. In some cases, the encapsulation suffered from cracks due to the thermal shock loading.
The next stage of tests involved the use of a scanning acoustic microscope to investigate the interface between the encapsulation and the PCB. Figure 7 shows a widespread delamination of the encapsulation from the PCB, owing to the thermal cyclic loading and different coefficients of thermal expansion (CTE mismatch). Cracks in the encapsulation can also be noted in this image. In the current example, this crack is positioned in the flow shadow region of the ElKo. This region poses itself as a strong candidate for the building of a weld line during injection molding (Figures 3 and 4).
The packages were then subjected to X-Ray solder joint inspection. The solder joints had failed, not sustaining the extensive thermal shock environment. Figure 8 shows examples of the components under the encapsulation with initiated or complete cracks through the solder joints. notice abnormalities on the packages, e.g., missing components from open packages and surface of the encapsulation. Open PCBs witnessed the falling off of failed components due to the failure of the solder joint. In some cases, the encapsulation suffered from cracks due to the thermal shock loading. The next stage of tests involved the use of a scanning acoustic microscope to investigate the interface between the encapsulation and the PCB. Figure 7 shows a widespread delamination of the encapsulation from the PCB, owing to the thermal cyclic loading and different coefficients of thermal expansion (CTE mismatch). Cracks in the encapsulation can also be noted in this image. In the current example, this crack is positioned in the flow shadow region of the ElKo. This region poses itself as a strong candidate for the building of a weld line during injection molding (Figures 3 and 4).
The packages were then subjected to X-Ray solder joint inspection. The solder joints had failed, not sustaining the extensive thermal shock environment. Figure 8 shows examples of the components under the encapsulation with initiated or complete cracks through the solder joints.  notice abnormalities on the packages, e.g., missing components from open packages and surface of the encapsulation. Open PCBs witnessed the falling off of failed components due to the failure of the solder joint. In some cases, the encapsulation suffered from cracks due to the thermal shock loading. The next stage of tests involved the use of a scanning acoustic microscope to investigate the interface between the encapsulation and the PCB. Figure 7 shows a widespread delamination of the encapsulation from the PCB, owing to the thermal cyclic loading and different coefficients of thermal expansion (CTE mismatch). Cracks in the encapsulation can also be noted in this image. In the current example, this crack is positioned in the flow shadow region of the ElKo. This region poses itself as a strong candidate for the building of a weld line during injection molding (Figures 3 and 4).
The packages were then subjected to X-Ray solder joint inspection. The solder joints had failed, not sustaining the extensive thermal shock environment. Figure 8 shows examples of the components under the encapsulation with initiated or complete cracks through the solder joints.  A selection of these components was randomly chosen to be further subjected to a more extensive optical microscopy after the preparation of relevant cross-sections. Figure 9 shows examples of the output of the microscopic analysis.

Statistical Analysis of Reliability
A boxplot study (Figure 10) was first carried out to identify and rule out statistical outliers based on the number of sustained cycles. A reference censoring (time) was made at 9147 cycles since the tests were ceased at this point (<5% of the components were still running).
The further analysis was based on two main categories of the tested parts, namely open and encapsulated packages. For ease of representation, shorter forms of the component names were used (as mentioned in Table 1). The suffix "E" was used for components on encapsulated probes and the suffix "O" was used for components, which were not encapsulated. Since two sets of chip resistors were mounted on the PCBs, they were identified by means of "N" for near sprue and "F" for far away from sprue. A selection of these components was randomly chosen to be further subjected to a more extensive optical microscopy after the preparation of relevant cross-sections. Figure 9 shows examples of the output of the microscopic analysis.

Statistical Analysis of Reliability
A boxplot study (Figure 10) was first carried out to identify and rule out statistical outliers based on the number of sustained cycles. A reference censoring (time) was made at 9147 cycles since the tests were ceased at this point (< 5% of the components were still running).
The further analysis was based on two main categories of the tested parts, namely open and encapsulated packages. For ease of representation, shorter forms of the component names were used (as mentioned in Table 1). The suffix "E" was used for components on encapsulated probes and the suffix "O" was used for components, which were not encapsulated. Since two sets of chip resistors were mounted on the PCBs, they were identified by means of "N" for near sprue and "F" for far away from sprue.  A selection of these components was randomly chosen to be further subjected to a more extensive optical microscopy after the preparation of relevant cross-sections. Figure 9 shows examples of the output of the microscopic analysis.

Statistical Analysis of Reliability
A boxplot study (Figure 10) was first carried out to identify and rule out statistical outliers based on the number of sustained cycles. A reference censoring (time) was made at 9147 cycles since the tests were ceased at this point (< 5% of the components were still running).
The further analysis was based on two main categories of the tested parts, namely open and encapsulated packages. For ease of representation, shorter forms of the component names were used (as mentioned in Table 1). The suffix "E" was used for components on encapsulated probes and the suffix "O" was used for components, which were not encapsulated. Since two sets of chip resistors were mounted on the PCBs, they were identified by means of "N" for near sprue and "F" for far away from sprue.     This combination experiences a rise in the characteristic lifetime after encapsulation by approximately 22% in comparison to their open counterparts. On the right side (b), the example of MLF28 is shown, which shows, as the worst case, a drop in the characteristic lifetime by approximately 80%. The components MLF are already known to have the least lifetime compared to other components according to [22]. Moreover, they have a very thin gap of less than 100 µm under them till the PCB, which allows only the polymer matrix of the epoxy molding compound (EMC) to enter. This matrix usually has a higher CTE compared to the glass-filled EMC.
The capacitors were not tested online due to the limitation of the measurement equipment to only monitor electric resistance values. These components were present on the PCB as part of a feasibility study only. They were, however, checked for electric contact and capacitance values after 50, 100, 250, 500, and thereafter at regular intervals of 500 cycles though they were not the focus during this reliability study. All the electrolytic capacitors (open and encapsulated) were reported to have failed by 6000 cycles. By 7500 cycles, all the encapsulated capacitors (ceramic and electrolytic) were announced as failed owing to either missing contact or minimal residual capacitance.  [22]. Moreover, they have a very thin gap of less than 100 µm under them till the PCB, which allows only the polymer matrix of the epoxy molding compound (EMC) to enter. This matrix usually has a higher CTE compared to the glass-filled EMC. The capacitors were not tested online due to the limitation of the measurement equipment to only monitor electric resistance values. These components were present on the PCB as part of a feasibility study only. They were, however, checked for electric contact and capacitance values after 50, 100, 250, 500, and thereafter at regular intervals of 500 cycles though they were not the focus during this reliability study. All the electrolytic capacitors (open and encapsulated) were reported to have failed by 6000 cycles. By 7500 cycles, all the encapsulated capacitors (ceramic and electrolytic) were announced as failed owing to either missing contact or minimal residual capacitance.

Discussion and Conclusions
Conclusions were drawn through the various stages in this study. The implementation of the thermoset injection molding on an industry-relevant package was successfully carried out based on earlier feasibility analysis. The filling velocity had to be adjusted in a way that the lower viscosity of the melt was reached in a suitable time that enabled the filling of not only the cavities around the ElKo (e-caps) but also produced a well filled tail end of the encapsulation on the PCB.
After the environmental tests, it was derived through X-Ray analysis that solder joint cracking is the most often occurring mechanism of failure for components encapsulated using thermoset injection molding. This was further confirmed by virtue of cross-sectional analysis. This failure of the components is attributed to various stages of CTE mismatch through the encapsulation material, FR4, metallization, the solder joint, and the component. Delamination also occurs at the interface of the encapsulation and the PCB by virtue of CTE mismatch during the thermal cyclic loading. The encapsulation also experiences cracking subsequently.
The characteristic lifetime of the resistors CR1206 increases in the zone away from sprue with the presence of the 0.5-mm-thick encapsulation. The BGAs witness insignificant change in the characteristic lifetime with thermoset injection molded encapsulation. The characteristic lifetime of the rest of the components reduces with different proportions due to the 0.5-mm-thick

Discussion and Conclusions
Conclusions were drawn through the various stages in this study. The implementation of the thermoset injection molding on an industry-relevant package was successfully carried out based on earlier feasibility analysis. The filling velocity had to be adjusted in a way that the lower viscosity of the melt was reached in a suitable time that enabled the filling of not only the cavities around the ElKo (e-caps) but also produced a well filled tail end of the encapsulation on the PCB.
After the environmental tests, it was derived through X-Ray analysis that solder joint cracking is the most often occurring mechanism of failure for components encapsulated using thermoset injection molding. This was further confirmed by virtue of cross-sectional analysis. This failure of the components is attributed to various stages of CTE mismatch through the encapsulation material, FR4, metallization, the solder joint, and the component. Delamination also occurs at the interface of the encapsulation and the PCB by virtue of CTE mismatch during the thermal cyclic loading. The encapsulation also experiences cracking subsequently.
The characteristic lifetime of the resistors CR1206 increases in the zone away from sprue with the presence of the 0.5-mm-thick encapsulation. The BGAs witness insignificant change in the characteristic lifetime with thermoset injection molded encapsulation. The characteristic lifetime of the rest of the components reduces with different proportions due to the 0.5-mm-thick encapsulation. The location of a component over the PCB (near or far from the sprue location) is seen to play a vital role in the change of the characteristic lifetime. A strong dependency of the characteristic lifetime on the thickness of the encapsulation and the fiber orientation is also likely and is currently under scrutiny. The factors contributing to the rise and fall of the characteristic lifetime need to be provoked intentionally and investigated further. These dependencies can also be evaluated with the help of coupled simulations based on fiber orientation dependent material properties similar to previous works [22,26]. An article covering the systematic approach of such coupled simulations with detailed modelling of the solder joints is planned in the near future. encapsulation. The location of a component over the PCB (near or far from the sprue location) is seen to play a vital role in the change of the characteristic lifetime. A strong dependency of the characteristic lifetime on the thickness of the encapsulation and the fiber orientation is also likely and is currently under scrutiny. The factors contributing to the rise and fall of the characteristic lifetime need to be provoked intentionally and investigated further. These dependencies can also be evaluated with the help of coupled simulations based on fiber orientation dependent material properties similar to previous works [22,26]. An article covering the systematic approach of such coupled simulations with detailed modelling of the solder joints is planned in the near future.
Supplementary Materials: The following are available online at www.mdpi.com/xxx/s1, Video S1.