Design of Cascaded and Shifted Fractional-Order Lead Compensators for Plants with Monotonically Increasing Lags

: This paper concerns cascaded, shifted, fractional-order, lead compensators made by the serial connection of two stages introducing their respective phase leads in shifted adjacent frequency ranges. Adding up leads in these intervals gives a ﬂat phase in a wide frequency range. Moreover, the simple elements of the cascade can be easily realized by rational transfer functions. On this basis, a method is proposed in order to design a robust controller for a class of benchmark plants that are difﬁcult to compensate due to monotonically increasing lags. The simulation experiments show the efﬁciency, performance and robustness of the approach.


Introduction
Fractional calculus is an old field of science that, based on the initial idea of generalizing derivatives with integer order to derivatives with non-integer order, has given rise to many results in the pure field of mathematics [1][2][3][4]. However, today the field has tremendously grown and has many and various applications in science and engineering [5][6][7][8], such that even modeling, analysis, and control of complex systems requiring a multi-disciplinary approach [9,10] can be approached by fractional calculus tools [11][12][13].
In the specific field of automatic control, it is now more than two decades since the influential book [14] reported that the 95% of the control loops worldwide were of Proportional-Integral-Derivative (PID) type. Today, the technological trends and the increasing demand of better tuning make it clear that the PID controllers are still a subject of intensive research. Hence, following the boost to innovation in the late twentieth century, the fractional-order controllers (FOCs) are also proposed for industrial applications [15][16][17][18][19][20][21][22].
The first attempt to classify the FOCs used in process applications mentioned four types [23]: the TID controller [24], the CRONE controller [25,26], the PI λ D µ controller [27], and the fractional lead-lag compensator [28]. All share the same idea of using irrational compensators ensuring flat phase in Bode plots. Namely, if the phase derivative with respect to the frequency is zero (or nearly zero), then robustness to gain variations and iso-damping behavior of the step response is achieved. Hence, ensuring flat phase property is a main reason justifying the interest for FOCs.
In the years following the publication of [23], a great effort has been made to develop efficient FOC tuning procedures in both the frequency and time domain. A noticeable, present-day research direction in tuning approaches opts for optimization techniques with constraints that are expressed by time-domain specifications (rise time, settling time, percentage overshoot, error indices, etc.) or by frequency-domain specifications (phase/gain margin, crossover frequency, bandwidth, sensitivity (A) The CS-FLECs are multistage compensators, in which each stage is in its turn a fractional-order lead compensator (FLEC). Each FLEC stage is frequency-scaled with respect to the previous one, so that it provides phase lead values with a nearly flat phase on an adjacent interval. When compared with a cascade of identical FLECs that are superposed on the same frequency interval, a CS-FLEC exhibits a nearly flat phase in a much larger frequency interval. This is a direct result of the serial structure of the shifted stages.
To implement a CS-FLEC, each stage needs a rational TF approximation. As the paper shows, a second-order TF provides a satisfactory approximation in the frequency interval of each stage of the cascade. The values of the coefficients in each second-order TF ensure low sensitivity in both analogue and digital realizations.
The paper shows how to apply CS-FLEC structures to compensate a class of plants that are notoriously difficult to control [49,50]. The approach is especially suited for plants that are characterized by monotonically increasing lags. The fundamental ideas underlying the design pattern are simple and refer to formulas based on the properties of the CS-FLEC. The paper also brings out the limits of the CS-FLEC in controlling the chosen benchmarks.
The organization of the paper is the following. Section 2 introduces the CS-FLEC controller and illustrates its properties. Section 3 provides a new and easy method for implementing rational, low-order TF of these controllers. Section 4 describes the procedure to design a CS-FLEC. Section 5 presents and discusses two case-studies that show how CS-FLECs control classes of processes, reported as benchmarks by the technical literature. Section 6 provides the conclusions.

Cascaded, Shifted, Fractional-Order Lead Compensator
This section describes the CS-FLEC that is composed by two elements, indicated by H 1 (s) and H 2 (s), which are defined in shifted, partially overlapping, intervals of the frequency axis.

The First Compensator Stage
The basic element of the proposed CS-FLEC is the first compensator, that is described as with 0 < ν 1 < 1 and 0 < ∆ < 1 when considering a fractional-order lead compensator (FLEC) [40]. The symbols τ and ν 1 represent the time constant and the fractional order, respectively. Now, put s = jω to recall the frequency key features of a FLEC. It is well known that the maximum phase lead ϕ m1 of H 1 (s) is obtained at the geometric mean of 1/τ and 1/(τ∆) [27,51]: In this frequency, the magnitude, say M m1 = |H 1 (jω m1 )|, and the phase, ϕ m1 = ∠H 1 (jω m1 ), are: Figures 1 and 2 show, in solid lines, the magnitude and phase plots of the normalized frequency response of the compensator H 1 (j u), where u = τ ω is a normalized frequency, for ν 1 = 0.3, 0.5, 0.7, and ∆ = 0.1. The circles represent the pairs (ω m1 , M m1 ) and (ω m1 , ϕ m1 ) corresponding to the assigned values of ν 1 .
Higher values of ν 1 provide higher phase leads while the lower ones lead to a flatter behavior of the phase plots.
By Equation (4), the maximum phase lead ϕ m1 depends on ν 1 and ∆, whose values dictate the amount of the introduced phase lead. For integer-order compensators (ν 1 = 1), many authors usually consider values of ∆ in the range between 0.05 and 0.2 [52], in particular ∆ ≥ 0.1. Subsequently, with ∆ = 0.1, the Equation (4) gives ϕ m1 ≈ ν 1 55 • . Accordingly, integer-order compensators consisting of a series of two stages with the same zero-pole pair provide greater phase leads. In this conventional structures, the serial stages have equal characteristics and, at each frequency, provide equal contributions to the resulting phase lead.

The Second Compensator Stage
The proposed structure differs from the conventional one. A CS-FLEC, indeed, is a cascade of two FLECs with the same Bode plots, but the position on the ω-axis of the second stage is shifted with respect to the first one. The shifting amount is established to make the phase of each FLEC element dominate on its nearly flat phase frequency interval. The resulting lead network, i.e., the CS-FLEC, has a relatively low order and enjoys the flat phase property in a large frequency band. In details, once the parameters of H 1 (s) have been chosen, the second FLEC, say H 2 (s), is obtained by using ν 2 in place of ν 1 and by scaling H 1 (s) with the substitution s → ∆ s, where ∆ is used as scaling factor: In this way, the frequencies delimiting the flatness interval of the CS-FLEC can be fixed in terms of the features of the two stages in the series. Namely, it is easy to show that H 2 (s) gives its maximum phase lead ϕ m2 at the frequency ω m2 = 1 τ∆ 1.5 (6) and Moreover, comparing Equations (3), (4), (7), and (8), and using ν 2 = ν 1 yields: M m2 = M m1 , ϕ m2 = ϕ m1 and, for any frequency ω, H 1 (jω∆) = H 2 (jω). Figures 3 and 4 show the magnitude and phase plots for the analogue compensators H 1 and H 2 (see dashed and dash-dotted lines, respectively). For clarity reasons, these figures only use the values ν 2 = ν 1 = 0.3, 0.5, 0.7. The curves assume ∆ = 0.1 and they are drawn in terms of the nondimensional frequency u = τ ω, so that u m1 = 1 ∆ 0.5 and u m2 = 1 ∆ 1.5 correspond to the maximum leads the two stages respectively provide.

The Serial Compensator
With the chosen parameters and ν = ν 1 = ν 2 , the series connection of the two compensators is equivalent to a single unit: By using u = τ ω, it follows and, by Equations (2) and (9), the maximum phase lead ϕ m12 is obtained at the geometric mean of the new break-away frequencies: At u m12 = 1 ∆ , the magnitude is and the maximum phase lead is The frequencies u m1 = 1 ∆ 0.5 and u m2 = 1 ∆ 1.5 define the interval (u m1 , u m2 ), where the phase is nearly flat (see Figure 4) and where the magnitude characteristic of H 12 (jω) follows a nearly straight pattern (solid lines in Figure 3). Beyond this range, the magnitude plot tends to a horizontal line and the CS-FLEC provides the maximum magnitude for each value of ν.  (4) and (13), the maximum phase lead given by H 2 1 is 2 ϕ m1 ≈ ν 110 • that is greater than ϕ m12 = ν 79 • , which is provided by H 12 . However, the phase characteristics of H 12 are flatter than those of H 2 1 . Moreover, the slopes of the plots of ∠H 12 (ju) and ∠H 2 1 (ju), evaluated on the right (or left) of u m12 and u m1 , respectively, are measures of the flatness of the phase. Because the decreasing of ∠H 2 1 (ju) around u m1 is more rapid than the falling of ∠H 12 (ju) around u m12 , the latter plot is flatter than the former one.

Realization
Because the CS-FLEC is an irrational function, its implementation needs a rational integer-order TF approximation. Literature shows many frequency domain approaches to approximate irrational operators and functions, starting with early contributions like [53][54][55]. The most referred methods are the Oustaloup recursive approximation (ORA) [56] and the modified Oustaloup technique [57]. They employ popular formulas to alternate zeros and poles of the rational transfer function in the frequency interval of practical interest, but they often determine approximations of very high order. Methods that are based on continued fraction expansions (CFE), interpolation, and curve-fitting methods are also important [58,59], and even the Matsuda approach, which is one of the best known, combines CFE and a fitting technique [55]. Moreover, CFE-based methods are preferred to those using power series expansions, because better convergence properties imply less coefficients to obtain a good approximation [58]. A good review of the basic approaches and techniques was given by [60].
In recent years, researchers proposed several other techniques, among which one may consider [61][62][63][64][65][66][67]. Namely, it was pointed out that fractional-order lead compensators found difficult application in industry, because it is difficult to obtain the desired functions with the commercially available electronic components, such that special methods that are based on operational amplifiers and field programmable analog arrays should be used [61]. In [63], the authors design two fractional-order lead-lag compensators to control a benchmark refrigeration system (the PID2018 benchmark challenge) such that a more aggressive response is obtained. In this case, approximation is simply performed via the Matlab command fitmagfrd from the Robust Control Toolbox. Other peculiar techniques could take advantage from orthonormal rational basis functions, which can be used to improve fitting and approximation of frequency response, as shown in [64]. Some other authors proposed curve fitting techniques (with built-in Matlab functions) that use frequency response data of fractional-order operators to improve the ORA, the modified ORA, or the Matsuda approximation [65]. A Scilab Based Toolbox is also available for fractional-order operators, transfer functions, filters, and controllers [66]. Finally, the recent work presented in [67] implements fractional-order lead/lag compensators using Operational Transconductance Amplifiers as active blocks. To this aim, the authors consider a Padé approximation proposed in [68] and obtain the same form of realization for the two types of fractional transfer functions, which allows them to use the same active core and to electronically tune the characteristics of the compensators. Contributions for the discretization and digital implementation of fractional functions are many and beyond the scope of this paper.
Here, each stage of the CS-FLEC is approximated by a second-order rational TF, which gives sufficient accuracy in the frequency range of interest. Note that a low-order implementation is advantageous, because the changes of the coefficients due to passive component tolerances (analogue implementation) or to the limitations of microprocessor words and the quantization effects (digital implementation) are quite contained [69,70], such that a low sensitivity to parameter variations is obtained.
The realization method leads to the following expression of the approximated FLEC (see Appendix A) with [71] and where µ 1 = max{0, k + i − 2}, µ 2 = min{i, k}. Figures 1 and 2 show in dashed lines magnitude and phase plots of a second-order realization G C (s) of the FLEC. The approximation accuracy is satisfactory in the frequency range of interest for the single (irrational) stage FLEC. The plots in Figures 1 and 2 show that both the magnitude and the phase practically coincide with the plots representing the irrational FLEC in the frequency interval u ∈ (10 −1 , u m1 ), which is important for compensation. Instead, for u > u m1 , the approximation gets worse. On the other hand, for practical purpose, it can be easily verified that higher-order, rational TFs do not significantly improve the approximation in the frequency range where a nearly flat phase is achieved. Now, consider the rational TFs indicated by G CH1 (s) and G CH2 (s), respectively representing the second-order realizations of H 1 (s) and H 2 (s). Subsequently, the cascade G CH12 (s) = G CH1 (s) · G CH2 (s) provides a fourth-order realization of H 12 (s).

The Design Method
To achieve robustness to gain variations, the phase margin PM must be nearly constant in a frequency interval around the gain crossover frequency of the compensated system, ω gc . That is, the tangent line to the curve of the phase angle of the open-loop TF should have a small slope in a given range around ω gc . Even if this curve is not completely flat, the robustness can be ensured if PM is greater than an established minimum value for a wide frequency spread around ω gc . The width of the range is also important to guarantee robustness.
Hence, let H OL (s) = H(s) G p (s) be the open-loop TF, including the controller H(s) = K c H 12 (s) = K c H 1 (s) H 2 (s) and the plant G p (s). To introduce the design method, the following essential facts clarify the objectives, specify the assumptions, and provide some advice. a.
The features of the CS-FLEC are suitable for controlling plants with phase lags which are monotonic increasing with the frequency ω. Afterwards, putting ϕ p (ω) = ∠G p (jω), the phase margin PM p of the plant at its gain crossover frequency ω pgc , PM p = π + ϕ p (ω pgc ), is often negative. b.
The compensator will introduce a phase lead compensating the lag of the plant so as to obtain the flattest possible phase trend in the range surrounding ω gc , i.e., the gain crossover frequency of H OL (jω). However, the CS-FLEC shifts ω gc to the right of ω pgc . Accordingly, if ∠G p (jω) and |G p (jω)| decrease sharply beyond ω pgc , H(jω) cannot introduce leads balancing the greater lags (see the plant phase diagrams in Figures 7 and 8). For this reason, the value of gain K c must be properly adjusted to make ω gc ≈ ω pgc or even ω gc < ω pgc if these frequencies are not too far from each other. c.
To satisfy the previous requirements, H 12 (s) = K c H 1 (s) H 2 (s) is chosen by composing H 1 (s) and H 2 (s), having phase plots in shifted frequency ranges. More precisely where ν 1 > ν 2 and ∆ is the scaling factor. The strategy is that H 1 (s) introduces the larger lead amount, while H 2 (s) improves the flatness. It holds ∆ = 0.1. d.
The compensated system must show an adequate phase margin (e.g., PM ≥ 55 • ) with a phase decay rate beyond ω gc that is less than that of the corresponding plant. Finally, ω gc from H OL (jω) must be ω gc ≈ ω pgc , without excessively reducing the system bandwidth.
e. Let ϕ OL (ω) = ∠H OL (jω) and define the slope sl(ω) = dϕ OL (ω) d log(ω) . Afterwards, to improve the robustness to gain variations in a frequency range around ω gc , the slope sl(ω gc ) must decrease as much as possible. Since the value of sl(ω gc ) estimates the robustness to gain variations, some approaches are proposed for evaluating this parameter [43]. In the present case, simple calculations give (see Appendix B) It can be verified that ν 1 , ν 2 , and τ make sl(ω gc ) < sl p (ω pgc ), where sl p (ω pgc ) = dϕ p (ω) dω ω pgc provides the plant slope.
To sum up, the parameters of the compensator to be determined are τ, ν 1 , ν 2 , and K c , while ω pgc and ∆ are known from the start. The procedure to set the parameters is specified, as follows.

I.
By Equation (2), the time constant τ can be easily determined in terms of ω m1 , the frequency where ϕ m1 occurs. However, due to the lead contribution of H 2 (s), the controller H(s) reaches the maximum phase lead at frequency ω m12 > ω m1 . Hence, to put ω m12 ≈ ω pgc , ω m1 is chosen, so that ω m1 ≈ h ω pgc with 0.5 ≤ h ≤ 0.9. The parameter h can be determined by few successive attempts. A first one can be h = 1. II.
To set ν 1 and ν 2 , the phase margin specification PM on H OL (s) is considered. Hence, since ω gc ≈ ω pgc and ω pgc ≈ ω m1 , the following approximate relation can be used: where ∠H 1 (jω m1 ) ≈ ν 1 55 • by Equation (4) and ∠H 2 (jω m1 ) ≈ ν 2 16 • is computed by Equation (5). Note that, if the plant shows a phase lag rapidly increasing with the frequency, PM p can be negative. Moreover, it is suitable to choose ν 1 > ν 2 , otherwise large values for ν 2 would increase the magnitude of H 2 (jω), that shifts the crossover of H OL (jω) too far beyond ω pgc . A rule of thumb, which is tested by numerical experiments, indicates ν 1 ≈ 3 ν 2 . Moreover, Equation (19) shows that values of ν 2 ∈ (0.3, 0.5) allow to compensate PM p < 0 in order to obtain PM ≥ 55 • and achieve a right compromise between robustness and dynamic response. III.
K c is set, so that K c ≤ 1 |H 12 (jω pgc )| . The gain crossover frequency ω gc , indeed, can also assume values that are less than ω pgc . This choice is convenient if a greater phase margin is required and if sl(ω gc ) decreases. However, ω gc must be quite close (to the left) to ω pgc . IV.
The performance is verified. If specifications are not met, then the procedure must be repeated by going back to step I. (or III.), decreasing ω m1 (or K c ), then changing τ and so on. Note that the design pattern refers to the irrational TF H(s) = K c H 12 (s). Usually, the step response characterizes the system performance in terms of rise time (t r ), maximum overshoot (o m ), and settling time t s (if necessary). To establish a total reliance on computer simulation, H 12 (s) is replaced by its rational approximation G CH12 (s) according to the approach presented in Section 3, thus providing a rational approximation G CH (s) for H(s).
Finally, for comparison purpose, one can design a cascade of two identical FLECs, namely [H 1 (jω)] 2 , where H 1 is specified by Equation (1). In this case, the maximum phase lead is 2 ϕ m1 at ω m1 . By using the same values of ω pgc , PM p , and ∆, a procedure that is similar to that for the CS-FLEC can be followed. At step I, by putting ω m1 ≈ h ω pgc with 0.5 ≤ h ≤ 0.9 (e.g., h = 1) and using Equation (2), the time constant τ is determined in terms of ω m1 and ∆. At step II, the relation PM = PM p + ν 1 110 • provides ν 1 . At step III, K c is set so that K c ≤ 1 |H 2 1 (jω pgc )| . At step IV, performance is verified.

Two Illustrative Benchmark Examples
The design approach is illustrated by two meaningful and demonstrative benchmarks taken from the literature.

Consider the plant model
that is a benchmark proposed by [50]. In Figure 7, the Bode diagrams give ω pgc = 0.62 rad/s with ∠G p1 (jω pgc ) = −185 • then PM p = −5 • and sl p (ω pgc ) = 3.09. The design method is applied with ∆ = 0.1. The specifications are a phase margin PM ≥ 55 • to ensure stability, despite plant gain and parameter variations. The overshoot in the unit step response of the closed-loop system should not be much higher than 20%.
These results could be satisfactory, however a second iteration gives: - Step I: ω m1 = ω pgc ⇒ τ = 5.13 s - Step II: PM = 55 • ⇒ ν 2 = 0.33 and ν 1 = 0.99 - Step III: K c = 0.95/|H 12 (jω pgc )| = 0.30 - Step IV: the obtained phase margin is 58.9 • in ω gc = 0.58 rad/s. Moreover, sl(ω gc ) = 2.75, which is a good improvement. The step response shows a 6.55% overshoot and settling time of 18.50 s.  Table 1 reports the performance indexes when K c or the plant time constant τ p or the fractional order ν = ν 2 change by a ±10% amount with respect to their nominal values K c = 0.30, τ p = 1 s, and ν = 0.33. ∆ and τ take the values assigned by the design. See Figures 9-11 for the responses. Note that, here, the rise time t r is required for the response to rise from 0.1 to 0.9 of the steady-state value. The settling time t s is defined for a ±5% requirement. In all cases, t r is contained and o m stays below 12% and it does not change in a significant way. The settling time has satisfactory values. All of the responses show undershoots that increase with ν.
To validate an auto-tuning technique, the authors of [43] proposed simulation results referred to the process (20) controlled by a FPID tuned by an iso-damping approach. The specifications were the desired "tangent frequency" ω c = 0.4 rad/s and the "tangent phase margin" at ω c , i.e., Φ m = 45 • . Subsequently, the Bode plots in [43] showed a flat phase curve near ω c (at the peak of the phase plot). Hence, the step responses remained nearly constant with respect to the gain variation, thus showing robustness. The overshoot was roughly 35%. The design approach proposed here gives ω gc = 0.58 rad/s with a phase margin of 58.9 • . Moreover, limited changes of the step responses occur due to the gain (or other parametric) variations and the overshoots are below 12% (see Figures 9-11 and Table 1). Table 1. Characteristics of the step response with parameter variations: t r , t s (expressed in seconds), o m (in % values). Changing parameters: K c , τ p , ν. Design values: τ p = 1, ν = 0.33, K c = 0.30 (first example); D = 1, ν = 0.12, K c = 0.51 (second example).  Finally, the control variable and the unit step disturbance rejection are illustrated in Figures 12 and 13 for variations of K c . The results obtained in case τ p or ν change do not affect the performance in a substantially different way. Figure 12 shows that high initial values of the control variable are obtained. However, the amplitude of the manipulated variable is usually subject to limitations deliberately placed on actuators for accounting the limited power available to the control system and avoiding damages to the process [72]. The design of two identical FLECs gives the following results: - Step I: ω m1 = ω pgc ⇒ τ = 5.13 s - Step II: PM = 55 • ⇒ ν 1 = 0.55 - Step III: K c = 0.95/|H 2 1 (jω pgc )| = 0.51 - Step IV: the obtained phase margin is 56.9 • in ω gc = 0.60 rad/s. The controller K c H 2 1 (s) is realized, as follows: G CH (s) = 10.585 (s + 0.461) 2 (s + 0.2113) 2 (s + 1.1) 2 (s + 0.288) 2 . Figure 14 shows the frequency response. Although the specification on phase margin is met and the crossover is kept the same, the phase diagram is not as flat as with a CS-FLEC. Namely, the slope in the crossover is sl(ω gc ) = 3.05, which is only a bit lower than before compensation. Moreover, as shown by the same Figure 14, the step response shows a 53.05% overshoot, sustained oscillations, a long settling time. Finally, variations with the gain are much more significant than with a CS-FLEC: with a 10% gain reduction, the overshoot is 44.7%, while with a 10% gain increase, the overshoot is 60.9%. All of these considerations explain why the CS-FLEC is preferable to a conventional cascade of identical FLECs.

Second Example
Whenever it does not compromise the clarity, the same symbols are used as the notations of the first case-study. Consider a plant that consists of an integrator with a time delay D: that is another common reference model. This case-study has also been considered by [49]. Moreover, time-delays are important in modeling many physical devices, such as large-scale flexible structures or electric networks [73]. For this reason, the results shown here were obtained by simulating (21) without approximating the dead-time element. For instance, if D = 1 s, Figure 8 shows the Bode diagrams of G p2 with ω pgc = 1 rad/s, ∠G p2 (jω pgc ) = −147 • then PM p = 33 • and sl p (ω pgc ) = 2.30. After few iterations of the step-wise algorithm, the proposed design pattern, with ∆ = 0.1 and with the specification PM ≥ 55 • , gives: ω m1 = 0.8 ω pgc ⇒ τ = 3.95 s; ν 1 = 0.37 and ν 2 = 0.12; K c = 0.85/|H 12 (jω pgc )| = 0.51; a phase margin of 66.8 • in ω gc = 0.79 rad/s. Moreover, sl(ω gc ) = 1.75. The controller is realized by  Figure 8 shows the frequency response of the compensated system and Figure 15 illustrates the step response, whose characteristics are presented in Table 1. The step response shows a 10.89% overshoot and settling time of 9.40 s with the designed parameters. However, 10% variations of the gain K c induce o m ≤ 20% and t s ≤ 11 s. If ν changes, o m ≤ 14% and t s ≤ 12 s. Similar considerations to the first case hold for the control variable and the disturbance rejection.
Note that some rules can be established to guide the controller design.
Subsequently, these rules may help the control engineer and set the limits of application of the proposed controllers.

Conclusions
The introduced CS-FLEC are new types of two-stages fractional-order controllers, whose phase diagrams are nearly flat in large frequency intervals of the Bode plots. Each stage of the cascade can be implemented as a second-order TF, which approximates irrational FLEC elements with sufficient accuracy. Because it is composed by a series of independent stages, a CS-FLEC is approximated by cascade of rational low-order TFs with limited coefficients sensitivity to parameter variations. Different alternatives in choosing the number of stages and their free parameters make these new controllers flexible and suitable for also solving difficult control problems. The potentiality of the CS-FLEC has been tested for controlling two plants that often are assumed as benchmark to verify the design proposals. The introduced design method follows an intuitive, practical pattern based on the developed formulas. Namely, the main strategy consists in compensating the rapidly and monotonically increasing phase lag by the lead introduced by the CS-FLEC in the same frequency range.
The two examples show that the CS-FLEC allows for a desired set-point response and the stability robustness to gain and parameter variations. Finally, the study of the second benchmark identifies the interval values of the dead-time D, where the CS-FLEC can be used to satisfy strict specifications.
Funding: This research received no external funding.

Conflicts of Interest:
The author declares no conflict of interest.

Abbreviations
The following abbreviations are used in this manuscript:

Appendix A. The Approximation Method
The realization of the FLEC is based on a rational second-order TF approximation of the basic function x ν : The coefficients a 2−i , b 2−i depend on ν and can be obtained by the general approach proposed in [71]. Then the variable transformation converts Equation (A1) in the rational TF G C (s) approximating the FLEC. Namely, substituting Equation (A2) in (A1) gives: Now let ( i j ) and ( 2−i m ) indicate the Binomial Coefficients (BCs for brevity). By the Binomial Theorem and by the distributive law of the product of sums , it is easy to verify that