Optimal Cascade Non-Integer Controller for Shunt Active Power Filter: Real-Time Implementation

: Active power ﬁlters (APFs) are used to mitigate the harmonics generated by nonlinear loads in distribution networks. Therefore, due to the increase of nonlinear loads in power systems, it is necessary to reduce current harmonics. One typical method is utilizing Shunt Active Power Filters (SAPFs). This paper proposes an outstanding controller to improve the performance of the three-phase 25-kVA SAPF. This controller can reduce the current total harmonic distortion (THD), and is called fractional order PI-fractional order PD (FOPI-FOPD) cascade controller. In this study, another qualiﬁed controller was applied, called multistage fractional order PID controller, to show the superiority of the FOPI-FOPD cascade controller to the multistage FOPID controller. Both controllers were designed based on a non-dominated sorting genetic algorithm (NSGA-II). The obtained results demonstrate that the steady-state response and transient characteristics achieved by the FO (PI + PD) cascade controller are superior to the ones obtained by the multistage FOPID controller. The proposed controller was able to signiﬁcantly reduce the source current THD to less than 2%, which is about a 52% reduction compared to the previous work in the introduction. Finally, the studied SAPF system with the proposed cascade controller was developed in the hardware-In-the Loop (HiL) simulation for real-time examinations.


Introduction
At present, developments in power electronic technology have led to a major increase in the usage of power electronic converters in the power grid while also increasing the use of electrical energy. However, power electronic converters generate reactive power and harmonics, which pollute the power system [1]. Therefore, the optimal compensation of nonlinear loads' harmonics is an important issue in power networks. Current harmonics boost losses, destroy the quality of the voltage sine waveform, cause metering devices to malfunction, and may lead to resonances and interferences [2]. As a result, distortions in current and voltage sine waveforms are not only a source of technical problems, but also have economic effects [3]. There are several popular devices such as active power filters (APFs), which may be of a series, shunt or hybrid type [4][5][6], static compensator, and unified power quality controller. These utilities are widely used to decrease power quality problems [7] that affect the distribution side [8].
From the viewpoint of circuit topology, Reference [9] has a more comprehensive taxonomy of available APFs, which are divided into parallel/series/hybrid type and other types. The active power filter is an effective inhibition device of active compensation 1.
Fractional controller is applied due to its having more tunable parameters, which allow for more flexibility to achieve a high accuracy.

2.
The cascade controller is able to rapidly reject disturbance before it leaks to the other parts of the system. 3.
Multi-objective NSGA-II algorithm offers optimal solutions to multidimensional objective functions, which minimize the THD.
The rest of this paper is structured as follows: Section 2 outlines the system under study, which is a three-phase shunt active power filter with a high-performance repetitive controller. In Section 3, the proposed controllers are implemented. Section 4 describes the NSGA-II optimization method, objective functions, case studies, and design parameters. The real-time results are discussed in Section 5, and, finally, Section 6 summarizes the conclusions.

Shunt Active Power Filter and Repetitive Controller
Some devices, such as passive, active, or hybrid power filters and operation strategies, have been developed for the local correction of power-quality problems [40][41][42][43]. Since the performance of SAPFs is more dependent on the current control method, many currentcontrol schemes have been proposed in the research [44][45][46]. However, in this research, a 25-kVA parallel active power Filter ( Figure 1) with a high-performance repetitive controller ( Figure 2) is optimized [22].
Designs 2022, 6, x FOR PEER REVIEW 3 of 22 Secondly, a multistage FOPID controller is used; different results are obtained for this, which include transient/settling time and THDs similar to the proposed controller. Eventually, the obtained results from both controllers are compared to show the better performance of the proposed method for a three-phase shunt active power filter. The key contributions of the present study are summarized as follows: 1. Fractional controller is applied due to its having more tunable parameters, which allow for more flexibility to achieve a high accuracy. 2. The cascade controller is able to rapidly reject disturbance before it leaks to the other parts of the system. 3. Multi-objective NSGA-II algorithm offers optimal solutions to multidimensional objective functions, which minimize the THD.
The rest of this paper is structured as follows: Section 2 outlines the system under study, which is a three-phase shunt active power filter with a high-performance repetitive controller. In Section 3, the proposed controllers are implemented. Section 4 describes the NSGA-II optimization method, objective functions, case studies, and design parameters. The real-time results are discussed in Section 5, and, finally, Section 6 summarizes the conclusions.

Shunt Active Power Filter and Repetitive Controller
Some devices, such as passive, active, or hybrid power filters and operation strategies, have been developed for the local correction of power-quality problems [40][41][42][43]. Since the performance of SAPFs is more dependent on the current control method, many current-control schemes have been proposed in the research [44][45][46]. However, in this research, a 25-kVA parallel active power Filter ( Figure 1) with a high-performance repetitive controller ( Figure 2) is optimized [22].  [22,46]. Figure 1. Structure of the 25-kVA SAPF [22,46]. Secondly, a multistage FOPID controller is used; different results are obtained for this, which include transient/settling time and THDs similar to the proposed controller. Eventually, the obtained results from both controllers are compared to show the better performance of the proposed method for a three-phase shunt active power filter. The key contributions of the present study are summarized as follows: 1. Fractional controller is applied due to its having more tunable parameters, which allow for more flexibility to achieve a high accuracy. 2. The cascade controller is able to rapidly reject disturbance before it leaks to the other parts of the system. 3. Multi-objective NSGA-II algorithm offers optimal solutions to multidimensional objective functions, which minimize the THD.
The rest of this paper is structured as follows: Section 2 outlines the system under study, which is a three-phase shunt active power filter with a high-performance repetitive controller. In Section 3, the proposed controllers are implemented. Section 4 describes the NSGA-II optimization method, objective functions, case studies, and design parameters. The real-time results are discussed in Section 5, and, finally, Section 6 summarizes the conclusions.

Shunt Active Power Filter and Repetitive Controller
Some devices, such as passive, active, or hybrid power filters and operation strategies, have been developed for the local correction of power-quality problems [40][41][42][43]. Since the performance of SAPFs is more dependent on the current control method, many current-control schemes have been proposed in the research [44][45][46]. However, in this research, a 25-kVA parallel active power Filter ( Figure 1) with a high-performance repetitive controller ( Figure 2) is optimized [22].   [22,46]. As seen in Figure 1, with these specifications Vs = 380 v, fs = 50 Hz and Is = 80 A [22], the functioning idea is based upon the injection of a compensating current into the network, which provides the basic reactive component and the harmonic currents due to the distorting load operation. Hence, a reference waveform for the current to be injected in the alternative current (AC) network should be provided by the control unit, so that the inverter is required to produce a current that is as close as possible to the reference. In Figure 1, L S is the equivalent supply inductance, as seen by the bus where the active filter and the distorting load are connected; L L is the equivalent inductance of the line supplying the load, while L F is the inductance of the series inductor filter [47]. In 1981, the repetitive control notion was initially developed [48][49][50]. The primary motivations and representative examples include the rejection of periodic disturbances in a power supply control application [48,50] and the tracking of periodic reference inputs in a motion control application [49,50]. The repetitive controller is mainly used in continuous processes to track or reject periodic exogenous signals [50]. Although this controller has a high tracking operation, its operation is inherently slow. This controller is inserted in series with a used controller, which is a PI controller in this figure, as shown in Figure 2, and a discrete Fourier transform (DFT) is used. This DFT has a frequency response that almost equals the frequency response used to track the harmonic reference ( Figure 2) [51]. Equation (1) gives us the discrete transfer function of the mentioned DFT.
Here, N is the number of the coefficients; N h is the set of selected harmonic frequencies, and N a is the number of leading steps that are essential to guarantee the stability of the system. In fact, (1) can be considered a finite-impulse response (FIR) band pass filter of N taps with a unity gain at all selected harmonics h, and is also called a discrete cosine transform (DCT) filter [51].

Fractional-Order PID Controller (FOPID Controller)
The traditional PID controllers are basic, robust, impressive, and easily implementable control techniques [25]. The transfer function of the PID controller is as follows: In recent years, one of the best possibilities for improving the quality and robustness of PID controllers is to apply fractional-order controllers with non-integer derivation and integration parts [52,53]. The PI α D β controller generalizes the PID controller including an integrator of order α and a differentiator of order β.
The transfer function of the FOPID controller is acquired using the Laplace transformation, as given below: To design a FOPID controller, three parameters (K p , K i , K d ) and two non-integer orders (α, β) should be optimally determined.

Fractional-Order (PI + PD) Cascade Controller
As far as we know, it is difficult to achieve an excellent performance in terms of transient/steady-state response using a conventional PID controller. In this study, we applied a FOPI-FOPD cascade controller and a multistage FOPID controller instead of the traditional PI controller, as seen in Figure 2. Therefore, the FO (PI + PD) cascade controller is our proposed controller. It includes two controllers, which were connected in cascade, as shown in Figure 3. One of them is the FOPI controller and the other one is the FOPD controller. When the FOPI receives the ACE signal, the fractional-order PI controller Designs 2022, 6, 32 5 of 22 produces a signal, which also operates as the input of another controller. The output of the FO (PI + PD) cascade controller is the reference power setting or control input. ler is our proposed controller. It includes two controllers, which were connected in cade, as shown in Figure 3. One of them is the FOPI controller and the other one is FOPD controller. When the FOPI receives the ACE signal, the fractional-order PI troller produces a signal, which also operates as the input of another controller. output of the FO (PI + PD) cascade controller is the reference power setting or con input.

∆
for the electric power systems to be controlled, as mathematically given Equation (4): For ∝ = 1 and = 1 the FOPI-FOPD cascade controller is transformed to a sim form of conventional PI − PD cascade controller, i.e., Kp1, Ki, Kp2, Kd, α, and β are six iable parameters that must be optimized.
Three objectives contribute to the design of the FO (PI + PD) cascade controller. of all, it should be economical, straightforward, and easy to apply and develop. As sult, its operation is comparable to that of a PID controller. Second, PI and PD contro are cascaded, i.e., PI − PD, to combine the benefits of their distinct specifications and pabilities. On the other hand, a cascade controller has more adjustable parameters th non-cascade controller, and it is obvious that if there are more adjustable parameters controller will provide a better system performance. Furthermore, the cascade contr is attractive because it can rapidly reject disturbances, before they reach the rest of system. To comply with the third goal, a non-integer integrator/derivative order is sidered, i.e., FOPI-FOPD, to enhance its freedom to design and promote PI -PD cas controller performance [26].

Multistage Fractional-Order PID Controller
As stated before, it is difficult to obtain an excellent performance when applyi classic PID controller. According to Equation (2), increasing the integral gain to elimi the steady-state error worsens the system's transient response. The existence of inte gain affects the speed and stability of the system during transient conditions, which l to decreases in these parameters. To improve the transient response, the integrator m be disabled during the transient part [25]. A two-stage FOPD-FOPI controller wi first-stage fractional-order PD controller and a second-stage fractional-order PI contr can accomplish this. Sensors generate noise in an automated control system. This n usually has a high frequency. Sometimes, the tie-line telemetry system generates n Due to this noise, if the derivative term is used, the plant input becomes excessively As a result, it can be removed by applying a first-order derivative filter that reduces high-frequency noise. Figure 4 depicts the structure of the presented multistage FO controller. The transfer function of the multistage FOPID controller is represented by ∆P re f for the electric power systems to be controlled, as mathematically given by Equation (4): For ∝= 1 and β = 1 the FOPI-FOPD cascade controller is transformed to a simpler form of conventional PI − PD cascade controller, i.e., K p1 , K i , K p2 , K d , α, and β are six variable parameters that must be optimized.
Three objectives contribute to the design of the FO (PI + PD) cascade controller. First of all, it should be economical, straightforward, and easy to apply and develop. As a result, its operation is comparable to that of a PID controller. Second, PI and PD controllers are cascaded, i.e., PI − PD, to combine the benefits of their distinct specifications and capabilities. On the other hand, a cascade controller has more adjustable parameters than a non-cascade controller, and it is obvious that if there are more adjustable parameters, the controller will provide a better system performance. Furthermore, the cascade controller is attractive because it can rapidly reject disturbances, before they reach the rest of the system. To comply with the third goal, a non-integer integrator/derivative order is considered, i.e., FOPI-FOPD, to enhance its freedom to design and promote PI -PD cascade controller performance [26].

Multistage Fractional-Order PID Controller
As stated before, it is difficult to obtain an excellent performance when applying a classic PID controller. According to Equation (2), increasing the integral gain to eliminate the steady-state error worsens the system's transient response. The existence of integral gain affects the speed and stability of the system during transient conditions, which leads to decreases in these parameters. To improve the transient response, the integrator must be disabled during the transient part [25]. A two-stage FOPD-FOPI controller with a firststage fractional-order PD controller and a second-stage fractional-order PI controller can accomplish this. Sensors generate noise in an automated control system. This noise usually has a high frequency. Sometimes, the tie-line telemetry system generates noise. Due to this noise, if the derivative term is used, the plant input becomes excessively big. As a result, it can be removed by applying a first-order derivative filter that reduces the high-frequency noise. Figure 4 depicts the structure of the presented multistage FOPID controller. The transfer function of the multistage FOPID controller is represented by: In the controller scheme shown in Figure 4, K p , K d , β, K i , α, K pp and N are proportional, derivative, non-integer derivative, integral, non-integer integral, proportional gain, and filter coefficient, respectively. The input of the controller is Area Control Error (ACE), as well as output of the controller is (∆F), which produces a control signal through these Designs 2022, 6, 32 6 of 22 two stages. Afterward, this enters the power system. It is worth noting that the frequency deviation (∆F) is the ACE in the case of a single-area system.
In the controller scheme shown in Figure 4, Kp, Kd, β, Ki, α, Kpp and N are pro tional, derivative, non-integer derivative, integral, non-integer integral, proporti gain, and filter coefficient, respectively. The input of the controller is Area Control E (ACE), as well as output of the controller is (∆ ), which produces a control si through these two stages. Afterward, this enters the power system. It is worth noting the frequency deviation (∆F) is the ACE in the case of a single-area system.

NSGA-II: An Overview
NSGA-II is a popular multi-objective-optimization algorithm, which has three ticular specifications: a speedy non-dominated sorting approach, prompt crowded tance estimate method and simple crowded comparison operator [54]. Typic NSGA-II is described in detail as follows:

Population initialization:
The population must be initialized based upon the range of the problem an limitations.
2. Non-dominated sorting process based upon non-domination criteria of the pop tion that was initialized.

Crowding distance:
When the sorting is complete, the value of the crowding distance is determine advance. The individuals in the population are chosen based on crowding distance rating.

Selection:
Individuals are selected by applying a binary contest election with a cro ed-comparison operator.

Genetic Operators:
Actual coded GA is achieved by applying simulated polynomial mutation and nary crossover.

Recombination and selection:
Population of children and population of the current generation are combined. next generation is set by election. The new generation is filled by each front until the of the population exceeds the current population size [55]. Figure 5 shows the NSG procedure.

NSGA-II: An Overview
NSGA-II is a popular multi-objective-optimization algorithm, which has three particular specifications: a speedy non-dominated sorting approach, prompt crowded distance estimate method and simple crowded comparison operator [54]. Typically, NSGA-II is described in detail as follows: 1.
Population initialization: The population must be initialized based upon the range of the problem and its limitations.

2.
Non-dominated sorting process based upon non-domination criteria of the population that was initialized.

3.
Crowding distance: When the sorting is complete, the value of the crowding distance is determined in advance. The individuals in the population are chosen based on crowding distance and rating.

4.
Selection: Individuals are selected by applying a binary contest election with a crowdedcomparison operator.

5.
Genetic Operators: Actual coded GA is achieved by applying simulated polynomial mutation and binary crossover.

6.
Recombination and selection: Population of children and population of the current generation are combined. The next generation is set by election. The new generation is filled by each front until the size of the population exceeds the current population size [55]. Figure 5 shows the NSGA-II procedure.

Objective Functions
The purpose of this work is to minimize the transient/steady-state response as two objective functions by the proposed controller based on the NSGA-II optimization technique. It offers optimal solutions to multidimensional objective functions [23]. Three objective functions have been chosen, which must be minimized in two case studies, as follows: determination is an important issue because many design features of electronic systems are given in terms of their steady-state characteristics. The periodic steady-state solution is also a prerequisite for small-signal dynamic modeling. The steady-state analysis is, therefore, an essential component of the design process.
Total harmonic distortion (THD) is a widely occupied concept when defining the level of harmonic content in alternating signals, which is measured in percentages.

2.
Transient Response (Transient/Settling Time): In electrical engineering, transient response is the response of a system to changes from the equilibrium. The impulse response and step response are transient responses to a specific input (an impulse and a step, respectively).
Rise time or transient time (t r ) refers to the time required for a signal to alter from a specified low value to a specified high value. Usually, these values are 10% and 90% of the step height. Settling time (t s ) is the time needed for a response to become steady. This is defined as the time needed by the response to reach and remain within the determined range of from 2% to 5% of its final value. Therefore, the following two case studies were considered to be synchronously minimized: Case study 1: THD (up to the 50th harmonic) and Transient (Rise) Time must be synchronously minimized.
Case study 2: THD (up to the 50th harmonic) and Settling Time must be synchronously minimized.
The set of designing parameters used to minimize the objective functions is presented in the next section.

Objective Functions
The purpose of this work is to minimize the transient/steady-state response as objective functions by the proposed controller based on the NSGA-II optimization t

Design Parameters
DC bus voltage (V dc ) and the FO (PI + PD) cascade controller parameters, which are K p1 , K i , K p2 , K d , α and β, in Figure 3, as well as V dc and multistage FOPID controller parameters, which are K p , K d , β, K i , α, K pp and N in Figure 4, are determined based on the NSGA-II optimization technique. V dc affects the transient response and the steady-state response in the shunt active power filter. In fact, it acts an important role to decrease current harmonics, i.e., THD. Hence, it was chosen as a design variable. In this optimization approach, the mentioned parameters are experimentally limited. These limitations dramatically reduce the computational time [41]. Therefore, it is said that K p1 , K i , K p2 , K d , α, β, V dc are POS members for the FO (PI + PD) controller, and the POS for multistage FOPID controller has the following parameters: As mentioned before, the different obtained values from POS members are called POF, and concern the values of the objective functions.
The general multi-objective optimization problem is considered as the following, with x as the design: Minimize Subject To : where k is the number of objective functions, n is the number of inequality constraints, x is a vector of design variables, and f (x) is a vector of the objective functions to be minimized. Figure 6 depicts a Pareto front block diagram.
The set of designing parameters used to minimize the objective functions is sented in the next section.

Design Parameters
DC bus voltage (Vdc) and the FO (PI + PD) cascade controller parameters, which Kp1, Ki, Kp2, Kd, α and β, in Figure 3, as well as Vdc and multistage FOPID controlle rameters, which are Kp, Kd, β, Ki, α, Kpp and N in Figure 4, are determined based on NSGA-II optimization technique. Vdc affects the transient response and the steadyresponse in the shunt active power filter. In fact, it acts an important role to decr current harmonics, i.e., THD. Hence, it was chosen as a design variable. In this optim tion approach, the mentioned parameters are experimentally limited. These limitat dramatically reduce the computational time [41]. Therefore, it is that , , , , , , V are POS members for the FO (PI + PD) controller, and POS for multistage FOPID controller has the following parameters: , , , , , , , V . As mentioned before, the different obtained values POS members are called POF, and concern the values of the objective functions. The general multi-objective optimization problem is considered as the follow with x as the design: Minimize Subject To: where k is the number of objective functions, n is the number of inequality constrain is a vector of design variables, and f(x) is a vector of the objective functions to be m mized. Figure 6 depicts a Pareto front block diagram. Therefore, in this research, for the first case study, the goal is as follows: Minimize = ( ) = (THD(up to the 50th harmonic), ) Subject To: Therefore, in this research, for the first case study, the goal is as follows: Minimize g = f (x) = (THD(up to the 50th harmonic), t r ) Subject To : Designs 2022, 6, 32

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For the second case study, the goal is as follows: Minimize g = f (x) = (THD(up to the 50th harmonic), t s ) Subject To :

Real-Time Simulation Results
In this research, the 25-kVA parallel APF in Figure was developed in the hardware-In-the Loop (HiL) to verify the efficiency of the proposed control scheme in the real-time framework. The HiL set-up based on the OPAL-RT simulator was adopted to consider the effects of the control errors and computation delays on the SAPF system (see Figure 7) [57]. The compensator was a three-phase PWM inverter with a switching frequency of 10 kHz. A 3.3 us dead time was also considered for the inverter's switches [22]. The NSGA-II algorithm in the aforementioned case studies was implemented for 20 generations. Each generation includes 30 individuals. For all the sections of the case studies, the remaining parameters for the repetitive controller were: N = 200, N a = 3, and k f = 1 [51]. For the FO (PI + PD) cascade controller and multistage FOPID controller, the Crone approximation with order 5 and frequency range equals [0.01; 1000] rad/s has been considered. According to the above description, all tables and figures related to POF show the optimization results after 20 generations based on the NSGA-II multi-objective optimization method.

Real-Time Simulation Results
In this research, the 25-kVA parallel APF in Figure was developed in the hard ware-In-the Loop (HiL) to verify the efficiency of the proposed control scheme in the re al-time framework. The HiL set-up based on the OPAL-RT simulator was adopted to consider the effects of the control errors and computation delays on the SAPF system (see Figure 7) [57]. The compensator was a three-phase PWM inverter with a switching frequency of 10 kHz. A 3.3 us dead time was also considered for the inverter's switches [22].

Case Study 1: THD (up to the 50th Harmonic) and Transient (Rise) Time Must Synchronously Be Minimized
Transient time and settling time can determine the transient response. In this case optimization, the rise time is the quantity that must be optimized with the THD. This time is defined as the time gap between the beginning of the compensation and the time when the THD starts to be lower than 5% [22]. Here, THD (up to the 50th harmonic) of the source current and rise time were synchronously minimized. The system outcomes achieved using an FO (PI + PD) cascade controller and multistage FOPID controller are as follows. In this work, the POS for FO (PI + PD) cascade controller included (K p1 , K i , K p2 , K d , α, β) and V dc . The obtained results from POS members are known as POF; the POF is related to THD values and rise time. All obtained results are optimal, but the designer can pick one of them based on any other issues posed by the technical, economical, or managerial benefits requirements. The THD range and transient time for the FO (PI + PD) cascade controller are important from the technical viewpoint. According to Table 1, the lowest THD and the highest rise time are related to row no. 6; row no. 9 is concerned with the highest THD and the lowest rise time, as shown in Figure 8: Transient time and settling time can determine the transient response. In this optimization, the rise time is the quantity that must be optimized with the THD. time is defined as the time gap between the beginning of the compensation and the when the THD starts to be lower than 5% [22]. Here, THD (up to the 50th harmoni the source current and rise time were synchronously minimized. The system outco achieved using an FO (PI + PD) cascade controller and multistage FOPID controller as follows.  Table 1, the lo THD and the highest rise time are related to row no. 6; row no. 9 is concerned with highest THD and the lowest rise time, as shown in Figure 8:  The compensated source current ( Figure 9) and THD ( Figure 10) diagrams ar lated to row no. 6, also Is ( Figure 11) and THD ( Figure 12) diagrams are associated row no. 9 as below: The compensated source current ( Figure 9) and THD ( Figure 10) diagrams are related to row no. 6, also Is ( Figure 11) and THD ( Figure 12) diagrams are associated with row no. 9 as below: Designs 2022, 6, x FOR PEER REVIEW Figure 9. Compensated source current for row no. 6 (Lowest THD) using FO (PI + PD) controller. Figure 10 (row no. 6) and Figure 12 (row no. 9) show the variations in THD the FO (PI + PD) cascade controller. By looking at these two figures, we can see value of THD in Figure 10 is lower than the THD value in Figure 12. Additiona claim is valid for subsequent sections with similar conditions. Figure 10. Row no. 6 (with the lowest THD at steady-state) using FO (PI + PD) cascade con Figure 11. Compensated source current for row no. 9 (Highest THD) using FO (PI + PD) controller. Figure 12. Row no. 9 (with the highest THD at steady-state) using FO (PI + PD) cascade con   Figure 10 (row no. 6) and Figure 12 (row no. 9) show the variations in THD the FO (PI + PD) cascade controller. By looking at these two figures, we can see value of THD in Figure 10 is lower than the THD value in Figure 12. Additiona claim is valid for subsequent sections with similar conditions.    Table 2, (Kp, Ki, Vdc, Kpp, N, Kd, α, β) are members of POS. THD are concerned with POF. In the case of variables for the multistage FOPID contro Vdc has already been discussed. This table shows that row no. 2 is related to the   Figure 10 (row no. 6) and Figure 12 (row no. 9) show the variations in THD us the FO (PI + PD) cascade controller. By looking at these two figures, we can see that value of THD in Figure 10 is lower than the THD value in Figure 12. Additionally, claim is valid for subsequent sections with similar conditions.      Figure 10 (row no. 6) and Figure 12 (row no. 9) show the variations in THD the FO (PI + PD) cascade controller. By looking at these two figures, we can see t value of THD in Figure 10 is lower than the THD value in Figure 12. Additiona claim is valid for subsequent sections with similar conditions.      Figure 10 (row no. 6) and Figure 12 (row no. 9) show the variations in THD using the FO (PI + PD) cascade controller. By looking at these two figures, we can see that the value of THD in Figure 10 is lower than the THD value in Figure 12. Additionally, this claim is valid for subsequent sections with similar conditions.

Second Section of the First Case Study: Applying Multistage FOPID Controller
According to Table 2, (K p , K i , V dc , K pp , N, K d , α, β) are members of POS. THD and t r are concerned with POF. In the case of variables for the multistage FOPID controller and V dc has already been discussed. This table shows that row no. 2 is related to the lowest THD and the highest rise time; row no. 7 is associated with the highest THD and the lowest rise time, as shown in Figure 13. THD and the highest rise time; row no. 7 is associated with the highest THD a lowest rise time, as shown in Figure 13.  Is ( Figure 14) and THD ( Figure 15) diagrams are concerned with row no. 2, a compensated source current ( Figure 16) and THD ( Figure 17) diagrams are rel row no. 7 as follows: Figure 14. Compensated source current for row no. 2 (lowest THD) using the multistage controller. Figure 15 (row no. 2) and Figure 17 (row no. 7) illustrate the changes in sour rent THD using a multistage FOPID controller. Therefore, by comparing Figure  Figure 17, it is obvious that the THD value in Figure 17 is higher than the THD v Is ( Figure 14) and THD ( Figure 15) diagrams are concerned with row no. 2, also the compensated source current ( Figure 16) and THD ( Figure 17) diagrams are related to row no. 7 as follows: Designs 2022, 6, x FOR PEER REVIEW THD and the highest rise time; row no. 7 is associated with the highest TH lowest rise time, as shown in Figure 13.  Is ( Figure 14) and THD ( Figure 15) diagrams are concerned with row no compensated source current ( Figure 16) and THD ( Figure 17) diagrams are row no. 7 as follows: Figure 14. Compensated source current for row no. 2 (lowest THD) using the multis controller. Figure 15 (row no. 2) and Figure 17 (row no. 7) illustrate the changes in rent THD using a multistage FOPID controller. Therefore, by comparing Fig  Figure 17, it is obvious that the THD value in Figure 17 is higher than the TH Figure 15.    Figure 19, which has two parts, sh comparison between the values of current THD that were obtained using these tw trollers. The magnified part precisely demonstrates that the FO (PI + PD) cascad troller has better behavior than the multistage FOPID controller. Additionally, this shows that the THD (around 1.8068%) related to our proposed controller r steady-state earlier than the THD (around 1.9219%), which is related to the oth troller.    Figure 19, which has two parts, comparison between the values of current THD that were obtained using these t trollers. The magnified part precisely demonstrates that the FO (PI + PD) casca troller has better behavior than the multistage FOPID controller. Additionally, th shows that the THD (around 1.8068%) related to our proposed controller steady-state earlier than the THD (around 1.9219%), which is related to the ot troller.

Third Section of the First Case Study: Comparison between FO (PI + PD) Controller and Multistage FOPID Controller
In this section, the real-time results of two controllers are compared with Figure 18 depicts a comparison between the obtained POF values of FO (PI + P controller and the acquired POF values of a multistage FOPID controller. T proves that the values obtained by the FO (PI + PD) cascade controller domin values using a multistage FOPID controller. Figure 19, which has two part comparison between the values of current THD that were obtained using thes trollers. The magnified part precisely demonstrates that the FO (PI + PD) ca troller has better behavior than the multistage FOPID controller. Additionally, shows that the THD (around 1.8068%) related to our proposed controll steady-state earlier than the THD (around 1.9219%), which is related to the troller.   Figure 17 (row no. 7) illustrate the changes in source current THD using a multistage FOPID controller. Therefore, by comparing Figures 15 and 17, it is obvious that the THD value in Figure 17 is higher than the THD value in Figure 15.

Third Section of the First Case Study: Comparison between FO (PI + PD) Cascade Controller and Multistage FOPID Controller
In this section, the real-time results of two controllers are compared with each other. Figure 18 depicts a comparison between the obtained POF values of FO (PI + PD) cascade controller and the acquired POF values of a multistage FOPID controller. This figure proves that the values obtained by the FO (PI + PD) cascade controller dominate all the values using a multistage FOPID controller. Figure 19, which has two parts, shows a comparison between the values of current THD that were obtained using these two controllers. The magnified part precisely demonstrates that the FO (PI + PD) cascade controller has better behavior than the multistage FOPID controller. Additionally, this figure shows that the THD (around 1.8068%) related to our proposed controller reached steady-state earlier than the THD (around 1.9219%), which is related to the other controller.   Table 1" and "row no. 2 in Table 2"-a comparison.
In the following, it is worth noting that Figure 20 shows that the THD (aro 2.1513%), which is related to row no. 9 in Table 1, is much lower than the THD (aro 2.8242%), which is seen in row no. 7 in Table 2. As a result, this figure also confirms superiority of the FO (PI +PD) cascade controller compared to the multistage FO controller in this research.  Table 1" and "row no. 7 in Table 2"-a comparison.

Case Study 2: THD (up to the 50th Harmonic) and Settling Time Must Synchronously B Minimized
In the second case study, the THD (up to the 50 th harmonic) of the source cur and settling time were chosen to be minimized at the same time. Therefore, a low TH necessary, and the transient response of the compensator is momentous, especially w quick and frequentative variations occur in the load [22]. In this part, the settling t was computed based on the time needed for the source current THD to reach and inside a ±2% error band near its steady-state value. The system results that were tained by means of FO (PI + PD) cascade controller and multistage FOPID controller as follows.  Table 1" and "row no. 2 in Table 2"-a compari In the following, it is worth noting that Figure 20 shows that th 2.1513%), which is related to row no. 9 in Table 1, is much lower than t 2.8242%), which is seen in row no. 7 in Table 2. As a result, this figure a superiority of the FO (PI +PD) cascade controller compared to the m controller in this research.  Table 1" and "row no. 7 in Table 2"-a compari

Case Study 2: THD (up to the 50th Harmonic) and Settling Time Must Sy Minimized
In the second case study, the THD (up to the 50 th harmonic) of th and settling time were chosen to be minimized at the same time. Therefo necessary, and the transient response of the compensator is momentous,  Table 1" and "row no. 2 in Table 2"-a comparison.
In the following, it is worth noting that Figure 20 shows that the THD (around 2.1513%), which is related to row no. 9 in Table 1, is much lower than the THD (around 2.8242%), which is seen in row no. 7 in Table 2. As a result, this figure also confirms the superiority of the FO (PI +PD) cascade controller compared to the multistage FOPID controller in this research.  Table 1" and "row no. 2 in Table 2"-a comparison In the following, it is worth noting that Figure 20 shows that the 2.1513%), which is related to row no. 9 in Table 1, is much lower than the 2.8242%), which is seen in row no. 7 in Table 2. As a result, this figure also superiority of the FO (PI +PD) cascade controller compared to the mul controller in this research.  Table 1" and "row no. 7 in Table 2"-a comparison

Case Study 2: THD (up to the 50th Harmonic) and Settling Time Must Synch Minimized
In the second case study, the THD (up to the 50 th harmonic) of the s and settling time were chosen to be minimized at the same time. Therefore necessary, and the transient response of the compensator is momentous, es quick and frequentative variations occur in the load [22]. In this part, the was computed based on the time needed for the source current THD to r inside a ±2% error band near its steady-state value. The system results  Table 1" and "row no. 7 in Table 2"-a comparison.

Case Study 2: THD (up to the 50th Harmonic) and Settling Time Must Synchronously Be Minimized
In the second case study, the THD (up to the 50 th harmonic) of the source current and settling time were chosen to be minimized at the same time. Therefore, a low THD is necessary, and the transient response of the compensator is momentous, especially when quick and frequentative variations occur in the load [22]. In this part, the settling time was computed based on the time needed for the source current THD to reach and stay inside a ±2% error band near its steady-state value. The system results that were obtained by means of FO (PI + PD) cascade controller and multistage FOPID controller are as follows.

First Section of the Second Case Study: Applying FO (PI + PD) Cascade Controller
According to Table 3, as stated, (K p1 , K i , K p2 , K d , α, β) and V dc are related to POS. THD and t s are associated with POF. This table indicates that the lowest THD and the highest settling time are related to row no. 3. Row no. 7 is concerned with the highest THD and the lowest settling time, as shown in Figure 21.  According to Table 3, as stated, (Kp1, Ki, Kp2, Kd, α, β) and Vdc are related to PO and are associated with POF. This table indicates that the lowest THD and the settling time are related to row no. 3. Row no. 7 is concerned with the highest TH the lowest settling time, as shown in Figure 21.    Table 3, as stated, (Kp1, Ki, Kp2, Kd, α, β) and Vdc are related to and are associated with POF. This table indicates that the lowest THD and settling time are related to row no. 3. Row no. 7 is concerned with the highes the lowest settling time, as shown in Figure 21.              Based on the above-mentioned results, we can recognize that Figure 25, which has a higher THD value, reached steady-state earlier than Figure 23. In other words, Figure 25 has a lower settling time than Figure 23.

Second Section of the Second Case Study: Applying Multistage FOPID Controller
According to Table 4, as previously mentioned, (K p , K i , V dc , K pp , N, K d , α, β) are members of POS. THD and t s are related to POF. This table shows that the lowest THD and the highest settling time are shown in row no. 1. The highest THD and the lowest settling time are shown in row no. 3, as seen in Figure 26:  Is ( Figure 27) and THD ( Figure 28) diagrams are related to row no. 1, also Is ( Fig  29) and THD ( Figure 30) diagrams are associated with row no. 3, as follows:       In this section, Figure 31 shows a comparison between Figures 21 and 26. As cussed earlier, Figure 21 is related to POF values, which were obtained using FO ( PD) cascade controller, and Figure 26 is concerned with POF that was achieved using multistage FOPID controller. This figure confirms that the values acquired using the (PI + PD) cascade controller dominate the values by means of the multistage FOPID c troller. Figure 32 shows a comparison between the THD values obtained by the m tioned controllers. The magnified part of this figure affirms that the multistage FO controller was dominated by the proposed controller. Moreover, this figure demonstr that the THD (around 1.8429%), which is associated with the FO (PI + PD) contro reached steady-state sooner than the THD (around 1.8948%) related to the multis FOPID controller.   In this section, Figure 31 shows a comparison between Figures 21 and 26. As discussed earlier, Figure 21 is related to POF values, which were obtained using FO (PI + PD) cascade controller, and Figure 26 is concerned with POF that was achieved using the multistage FOPID controller. This figure confirms that the values acquired using the FO (PI + PD) cascade controller dominate the values by means of the multistage FOPID controller. Figure 32 shows a comparison between the THD values obtained by the mentioned controllers. The magnified part of this figure affirms that the multistage FOPID controller was dominated by the proposed controller. Moreover, this figure demonstrates that the THD (around 1.8429%), which is associated with the FO (PI + PD) controller, reached steady-state sooner than the THD (around 1.8948%) related to the multistage FOPID controller.
Finally, Figure 33 demonstrates that the THD (around 2.7926%), which is related to row no. 7 in Table 3, is lower than the THD (around 2.9171%), which is seen in row no. 3 in Table 4. Hence, this figure also affirms that the performance of the proposed controller is better than the multistage FOPID controller in this research. tioned controllers. The magnified part of this figure affirms that the multist controller was dominated by the proposed controller. Moreover, this figure de that the THD (around 1.8429%), which is associated with the FO (PI + PD) reached steady-state sooner than the THD (around 1.8948%) related to the FOPID controller.   Table 3" and "row no. 1 in Table 4"-a comparison.
Finally, Figure 33 demonstrates that the THD (around 2.7926%), which i row no. 7 in Table 3, is lower than the THD (around 2.9171%), which is seen i in Table 4. Hence, this figure also affirms that the performance of the propose is better than the multistage FOPID controller in this research. reached steady-state sooner than the THD (around 1.8948%) relat FOPID controller.  Table 3" and "row no. 1 in Table 4"-a com Finally, Figure 33 demonstrates that the THD (around 2.7926% row no. 7 in Table 3, is lower than the THD (around 2.9171%), whic in Table 4. Hence, this figure also affirms that the performance of th is better than the multistage FOPID controller in this research.  Table 3" and "row no. 1 in Table 4"-a comparison.

Summary
In this section, this work and the obtained results are stated. The steps w lows:

•
We designed two different controllers to improve the performance of a sh power filter based on the NSGA-II optimization approach.

•
The mentioned controllers were the FO (PI + PD) cascade controller and FOPID controller.

•
For the first time, we devised a multistage FOPID controller using th multistage PID. • FO (PI + PD) cascade controller was our proposed controller, which was  Table 3" and "row no. 3 in Table 4"-A comparison.

Summary
In this section, this work and the obtained results are stated. The steps were as follows: • We designed two different controllers to improve the performance of a shunt active power filter based on the NSGA-II optimization approach.

•
The mentioned controllers were the FO (PI + PD) cascade controller and multistage FOPID controller. • For the first time, we devised a multistage FOPID controller using the inspired multistage PID. • FO (PI + PD) cascade controller was our proposed controller, which was compared with the other controller. • The obtained results demonstrate that the first controller is superior to the other one. Table 5 shows the compared THDs with their corresponding t r and t s .

Conclusions
In this paper, two new controllers, called the FO (PI + PD) cascade and multistage FOPID controller, were employed to promote the performance of a 25-kVA parallel active power filter with a repetitive controller. They were devised based on the NSGA-II optimization method, and each controller was applied instead of the classic PI controller in the repetitive controller. Although both are powerful and practical, the FO (PI + PD) cascade controller was the proposed compensator in this study. It should be mentioned that the cascade controller can rapidly reject disturbance before it leaks to the other parts of the system. Eventually, real-time results based on the HiL setup proved that the intended controller has better behavior than the multistage FOPID controller in terms of its steady-state/transient response. Despite the successful performance of the proposed scheme, it suffers from a lack of adaptivity, because the control gains are adjusted in an offline manner. Therefore, the future work can be directed towards the development of robust control design using the training ability of neural networks.