Fabrication Tolerances’ Impact on an ODAC-Based PAM-4 Transmitter

: Photonic integrated circuits (PIC) devices are impacted by fabrication tolerances and therefore, prior knowledge of such variations could improve the PIC fabrication process and overall yield. This paper presents a method for predicting the fabrication impacts on a telecommunication optical digital to analog converter (oDAC)-based pulse amplitude modulator level four (PAM-4) transmitter as a case study where the certainty of this passive device is subjected to random variation


Introduction
The intense demand for high-capacity networks, driven by novel applications such as 4K/8K video streaming, 5G mobile networks, the Internet of Things (IoTs), and cloud networking has put pressure on the need for an upgrade of bandwidth-limited optoelectronic components [1].Hence, PIC pledge to unlock higher-capacity transceivers while minimizing their losses, footprint and power consumption.As PIC maturity continues to increase, leading to wide acceptability in industries and commercial applications, the complexity of PIC has also increased due to the large number of components on a single chip [2,3].Examples with more than 1500 components on a single chip have been achieved and more are expected [2].The success of PIC can be attributed to the possibility of the large-scale production of Silicon Photonics (SiP) at a reduced footprint, low component-to-component losses, low power consumption and low overall packaging cost [4].This has allowed PIC to be used in application specific photonic integrated circuits (ASPIC), which play a role in data/telecommunications, medical applications and bio sensing and, even more recently, in transportation applications such as LIDAR [5,6].Such application-specific designs require painstaking efforts, a long time and high cost to achieve results and their design cannot be transformed or used for other applications except the specific purposes they are designed for [7].In some cases, the design may fail to meet the initial objective, which implies that the process has to be repeated and the cost of production will be increased [7].
Several factors are responsible for chip failure in SiP devices, often due to their small features of sub-micron size, which can lead to a significant performance mismatch between the supposed designed model and the actual device obtained after fabrication [8].These factors can be categorized as fabrication variation, operational variation, system variation, random variation and high material index contrast [9,10].Errors arising from these variations can constitute challenges in the overall chip performance, resulting in a reduced yield in mass productions of such PIC devices after fabrication.In addition, since light is highly sensitive to slight deviation, the inaccurate estimation of passive device properties such as the waveguide height, sidewall angle and width of directional coupler can adversely alter the path of the signal, leading to coupling mismatch [11,12].Also, the device's position in the die in mass production and the number of repeated runs of PIC devices in a given die can also slightly vary the behaviour of each of the devices in the entire die [9,13].Such variations may result from ageing due to the wear and tear of lithography equipment, lithography exposure dose and chemical/mechanical polishing [9].
Several studies have been carried out in the past on the fabrication tolerances of PIC devices.L. Chrostowski et al. in [13] studied the linear correlation between similar components fabricated on the same chip and the variability in their wavelength mismatch.This study tried to establish how this variability can impact devices that are highly wavelengthdependent such as ring resonator modulators and optical filters in a wavelength division multiplexing (WDM) system.Therefore, several identical resonators on a 16 × 9 mm chip were fabricated.The results established a linear relationship between the resonator wavelength deviation and distance between two identical resonators on the chip with a maximum of a 4 nm wavelength mismatch between two resonators that are 1 nm apart.Similar work in [14] presented an analytical model to study the impact of wavelength mismatches among different devices on chips due to fabrication process variation on passive Silicon Photonic devices both at the component and device levels.The process variation that was modelled here depends on lithography imperfections resulting from resist age, sensitivity and thickness as well as other factors such as etching and exposure change.The model was evaluated by designing and fabricating a chip with several identical microresonators which are subjected to passive process variations and subsequently tested for system-level variation with a WDM-based SiP interconnect.The findings established a relationship between the optical signal-to-noise ratio of several WDM-based SiP interconnects modelled and the thickness and width variations of Silicon Photonics waveguides.Such models can also be used for other passive-based SiP devices.Other works in [15,16] also presented similar models to investigate and predict the performance of Silicon Photonic devices using the variability of passive device parameters.In both studies, several similar resonators were fabricated on a single chip and their manufacturing variabilities were studied.In [15], a Monte Carlo simulation approach was used to predict the device performance in relation to fabrication variabilities by measuring the spectral response of each device among several fabricated PICs on a 200 mm × 200 mm SiP wafer.Also, in [16], a device enhancement model was developed to improve the overall system performance of microresonators in optical interconnect networks by exploring different design waveguide parameters that can impact the performance and reliability at the device level.The model estimated the degree of the impact of the waveguide width and thickness variation on the resonant wavelength shift slop of the microresonators.The results, which presented a linear behaviour between the waveguide width/thickness and the wavelength shift slop, can be optimized to improve the optical signal to noise ratio (OSNR) of a WDM-based optical interconnect networks.
The task of characterizing the fabrication variation of PIC devices is highly challenging due to the cost and time required to carry out the process [15].The advent of programmable photonics introduces a more robust generic template that can be exploited to implement a variety of functionality through software which can be used to optimize or predict chip performance before fabrication [17].Just like we have field programmable gateway arrays (FPGA) in electronics, which can be reconfigured to meet specific use cases of customers, programmable photonics introduce such generic functionality known as field programmable photonic gateway arrays (FPPGA) for widespread PIC design in optical communications [18].These FPPGAs are electronically reconfigurable basic elements that allow for the flexible configuration of a set of passive devices in order to mime several circuits without undergoing the long-term conventional fabrication circle [7,19,20].Most FPPGA architectures are based on cascaded Mach Zehnder modulator (MZM) structures in various shapes and dimensions [21,22].
In this paper, a four-level pulse amplitude modulation (PAM-4) transmitter based on oDAC will be analysed using the hexagonal FPPGA mesh developed by iPronics [19,22].This type of transmitter is an alternative design to replace a power-hungry and bandwidthlimited eDAC that is required in the conventional PAM-4 signal generation [23,24].The oDAC devices are based on digital modulators and passive devices such as couplers and splitters [23].Therefore, as a result of the light-interfering nature of such devices, precision is not guaranteed due to slight deviation during fabrication, which may result in performance degradation and a low yield [9,25].The programmability and reconfigurability of iPronics' FPPGA, as reported in [19,20], are applied to an oDAC PAM-4 transmitter in order to investigate its potential fabrication tolerances and predict its production yield, as a continuation of our work in [26].
Similar to the research work presented in [13,15], an FPPGA-based prediction model to study the impact of passive variation on PIC devices is developed and experimentally validated in an iPronics programmable grid with the following objectives.

•
The design of a simple and efficient model for the emulation of fabrication imperfections and the non-conformity of any kind of passive devices and their implications in large-scale production.This enables us to estimate the possible yield from several runs after fabrication by mimicking different instances of the fabricated devices.

•
The model is optimized to emulate an oDAC PAM-4 transmitter, which contributes to the study of the viability of an oDAC PAM-4 transmitter to replace conventional ones.
Furthermore, a Monte Carlo simulation of 1000 chips to mime an oDAC PAM-4 transmitter was carried out considering different splitter values due to fabrication errors.We then offline statistically estimated the SER performance of the devices, which we used to predict the failed and passed chips.Our aim is to demonstrate the potential of the methodology to evaluate the viability of a certain fabrication technique to meet the required yield.

Proposed Model
An oDAC PAM-4 transmitter is presented in Figure 1, where the signal from a continuous wave (CW) laser is split into the two arms of the device through an input coupler with input coupling factor (K in ) and then recombined through an output coupler with output coupling factor (K out ).The non-return-to-zero (NRZ) electrical signals (NRZ 1 and NRZ 2 ), which act as the most significant bit (MSB) and least significant bit (LSB), are applied to drive the modulators, as shown in Figure 1.Due to the sensitive nature of interferometers, imprecision in the implementation of this type of device can reduce their performance during signal detection.For instance, eye diagrams at different values of K in are presented in Figure 2a-c.This is a challenge that requires further investigation.To model these effects, the FPPGA device developed by iPronics is used.The FPPGA comprises a set of MZMs or programmable unit core (PUC)s, which are hexagonally connected via a replicated geometric.Each PUC from the arrays is itself an MZM, as shown in Figure 3, which can be configured as a bar state with κ = 0, cross state with κ = 1, and as tunable with κ = any value between 0 and 1.The mathematical expression of the output signal of a typical PUC/MZM, as shown in Figure 3, can be expressed as where V 1 and V 2 are the applied voltages to tune the phase shifter (PS) in order to create ϕ 1 and ϕ 2 phase changes, κ 1 and κ 2 , PUC input and output coupling coefficients, V π , the half-wave voltage and ϕ 1|2 = . A hexagonal array of the PUCs is shown in Figure 4a and it can be electrically tuned to provide functionalities such as filtering, optical interconnects and several other optical functionalities.Furthermore, our proposed model, in Figure 4b,c, developed from the PUC arrays in Figure 4a, comprises two MZMs acting as amplitude modulator (AM) (MZM MSB and MZM LSB ), which are arranged in parallel to form the two arms just as another major MZM circuit.Light from a CW laser can then be split into the two arms of the outer MZMs via an input optical splitter (which itself is an MZM) by setting its K in to 0.36, as recommended in [24].
In addition, phase modulator (PM)s mimed as PM 1 and PM 2 are placed immediately after each AM before the two signals are combined through an optical combiner with K out = 0.5.By coarse adjustment of the phase of either PM 1 or PM 2 , resulting in a 120 • phase adjustment, we can improve the PAM-4 to be equidistant.
To generate a PAM-4 signal using the proposed device, two NRZ digital signals are applied to drive the two AMs, where each driving implies a 1-bit modulation gate, as shown in Figure 4b,c.The constellation levels of the PAM-4 signal are set to 0, 0.33, 0.66, 1 following the oDAC design specification in [24].
Moreover, by making the input PUC (MZM 1 in Figure 4b) that mimes K in a random variable with Gaussian distribution, which implies that K in = K in + σ n , where σ n is the fabrication variance, we can mime the fabrication tolerance of the device.So, a Monte Carlo simulation of the device is then carried out.For the sake of time, only 1000 device iterations are considered.At first, the simulation is conducted for a perfect passive coupling condition with the σ n set to 0%.Then, σ n is further varied from 2% to 12%.As expected, the coupling ratio of a passive device cannot surpass 1, so we opted to mime the effect of coupling resulting from the sinusoidal behaviour of the MZM leading to folded "1's" and "0's".
A histogram of the Gaussian profile of the 1000 chips for a perfect passive coupler is presented in Figure 5a while the histograms of increased σ n from 2 to 12% are presented in Figures 5a, 5b and 5c, respectively.No sign of imbalance is observed in Figure 5a, as expected, since no error is added in this case.This implies an emulation of a perfect fabrication scenario where the performance of passive device after fabrication is directly equivalent to the proposed design before fabrication.From the results in Figure 5b-d, L 00 remains unchanged despite increased σ n since this level implies an absence of light.In addition, since rail to rail modulation is used, both L 00 and L 11 exhibit compression, as can be observed from the histograms.However, increased σ n significantly impaired L 01 and L 10 due to overlapping, which may result in decision error.L 11 maintains improvement when compared with L 01 and L 10 .This is because L 11 has the highest signal-to-noise ratio since the highest signal power occurred at this level.Nevertheless, the impact of increased σ n can be seen to cause L 11 to fold back towards L 10 .Next, we have optimized to ensure the equidistance of the amplitude levels of our PAM-4 signal.As the maximum phase shift cannot exceed 2π, the phases of both the PMs (PM 1 and PM 2 ) are swept from 0 to 2π radians.The variations in the amplitude levels of the oDAC-PAM-4 transmitter against the phase are obtained and presented in Figure 6a,b for PM 1 and PM 2 as in Figure 4c, showing the distribution of the signal amplitude against phase.The extinction ratio (ER) of the PAM-4 eyes against varying phases of PM 1 and PM 2 are also presented in Figure 6c,d, showing how phase variation impacts the signal's ER.We have set the phase of PM 2 to 2.4 radians for the further analysis that is conducted on the oDAC-PAM-4 transmitter in this study.

Data Extraction and Analysis
The procedure for data extraction and analysis is presented in Figure 7. Since the machine can be controlled using software, the process in Figure 7 follows repeated iterations to mime 1000 oDAC PAM-4 transmitters.Specifically, while varying the value of σ n in the devices, the signal powers at the four levels of each of the 1000 emulated transmitters are extracted from the iPronics FPPGA machine through the power meter for offline processing.
The obtained signal power levels are then processed as optical transmitted signals and detected through a PIN photodetector.A sketch of the decision circuit showing the waveform of the bit fluctuation across the four levels of the PAM-4 signal is presented in Figure A1 in Appendix A, where P(xy|ab) is the probability of deciding signal xy when signal ab is received and µ i is the Gaussian pulse of the PAM-4 signal levels.
The generalized analytical expression for estimating the SER of a PAM-4 signal based on the schematic in Figure A1 is given by Equation (A2) in Appendix B.
Therefore, solving for all the P(I j |I i ) in Figure A1, as presented in Equation (A2) using Equation (A4), we obtained Equation (A5) in Appendix C. By cancelling out some parameters in Equation (A5), we obtained the final equation to estimate the signal SER as Equation (A6).

Power Meter # of Iterations
Failed Passed SER Decision MATLAB Add receiver's electrical noise The σ i in Equations (A4)-(A6) is the receiver's electrical noise, which is estimated as the sum of the thermal and short noise for a typical 10 GHz PIN receiver following the expression in [27] and it is assumed to be constant across the four PAM-4 levels.We have further assumed a typical detection of a 10 Gb/s signal at 1550 nm with a receiver sensitivity of −28 dBm at SER = 10 −3 to adjust the receiver's noise.In addition to this, the P2P power level of the signal from the machine is normalized to increase the impact of the signal noise before detection.An SER benchmark of 10 −3 is used to determine the failed or passed chips, as is clearly illustrated in Figure 7. Therefore, using Equation (A6) for SER calculation, all the 1000 mimed transmitters are analysed after detection.Signals detected with an SER above the threshold (10 −3 ) are classified as having failed while those below the threshold are classified as having passed, as shown in Figure 7.

Results and Discussion
The graphs of the SER versus chip iteration when σ n = 0 and when σ n = 2% are presented in Figure 8a,b.With the light control as expected, the total 1000 iterated PICs passed the SER threshold, as shown in Figure 8a.When σ n is increased to 2%, only 3 chips out of the 1000 mimed was seen to have failed while the rest passed the SER threshold we set, which implies a high tolerance due to decreased deviation from the coupling condition.
For further analysis of the results when σ n = 2%, the PAM-4 amplitude levels of one PIC from the failed and passed categories are extracted and simulated to obtain the PAM-4 eye diagrams of the failed and passed PICs, as shown in Figure 8c,d.From the eye diagram of the failed PICs in Figure 8c, it can be observed that the amplitude levels of the signal are not equidistant, which results in error detection.Unlike the passed PIC with the eye diagram in Figure 8d, an improved equidistant signal level is observed and as such, detection is accomplished with less error at the receiver.
Moreover, by increasing the impact of σ n from 6% to 12%, it is observed that the overlapping levels 10 and 01 increase.As a result of this, the numbers of failed PICs increase, which implies a low yield.Looking at the result of σ n = 12% in Figure 9b, for instance, close to 50% of the PICs failed due to the high spread of levels 01 and 10, as clearly shown in the histogram in Figure 5d, which translates to a high loss in the production scenario.In addition, the graph in Figure 10 summarizes the percentage of failed and passed chips against all instances of σ n we have tested, which simplified our findings.The number of failed and passed PICs in each σ n we have simulated, as plotted in Figures 8 and 9, are obtained and estimated as a percentage of the total 1000 runs per σ n .The linear behaviour of the number of both passed and failed chips in the figure can explain what would be expected in a fabrication scenario and this serves as a predictive template to analyse any passive device.Furthermore, the graph also reveals that such an oDAC-based PAM-4 transmitter is sensitive to component deviations resulting from passive variations.In comparison to the related works in [13,16], we have used the SER as a performance metric in this work, which translates to the linear behaviour in correlation with the passive variance.The median of the wavelength deviation in correlation with the distance between identical PIC devices within a wafer has been used in [13], which shows a linear relationship.These findings can also be compared with those in the work in [16], where an OSNR is used as a performance metric for wavelength mismatch.In the work, the waveguide width/thickness also exhibits a linear relationship with the wavelength shift slop, leading to variations in the output signal OSNR performance.

Conclusions
In this paper, we have presented a hybrid model to study the effects of fabrication tolerance resulting from passive variation in PIC-based devices.Using the flexibility of FPPGA, an oDAC-based PAM-4 telecommunication transmitter was mimed with passive variances ranging from 0 to 12% while mimicking the production of 1000 oDAC-based PAM-4 transmitters.A Monte Carlo simulation of the device was carried out to predict the production yield at given instances of passive variation.While benchmarking the SER to 10 −3 , the number of failed and passed PICs have been determined at every instance of passive variance we have tested.Using the SER as a performance metric, the effect of passive variation and the SER gives a linear relationship in the number of failed and passed PICs of the oDAC-based PAM-4 transmitter after fabrication.These findings enable robust designs which consider critically the sensitive effect of passive variability on designed components and can be formulated into new design rules.where µ i and σ i are the mean and standard deviation of ith Gaussian level of the PAM-4 signal.p(I i ) = p(00) = p(01) = p(10) = p(11) = 1 4 is the probability of receiving signal level I i , which is equally as possible.In addition, depending on the noise contribution due to signal impairment, there is a probability that signal xy will constitute an error to symbol ab across the four Gaussian pulses in Figure A1.er f c(•) is the complimentary error function and (I D ) ji|ij is the threshold values of the signal level I i and I j .Whenever signal detection occurs above the threshold, a higher logical state is considered, and vice versa.

Figure 3 .
Figure 3. PUC loaded with phase shifter and heater on both of its arms and its mode of implementation as the bar state, cross state and tunable coupler.

Figure 6 .
Figure 6.PAM-4 signal amplitude levels and ER against varying phases of the PMs in Figure 4b when K = 0.36.(a) Amplitude levels against phase of the PM 1 .(b) Amplitude levels against phase of the PM 2 .(c) ER of the PAM-4 eyes against phase of PM 1 .(d) ER of the PAM-4 eyes against phase of PM 2 .

Figure 7 .
Figure 7. Procedure for data extraction from the programmable device and offline processing for error analysis.

Figure 8 .
Figure 8. SER versus the number of PIC mimed at σ n = (a) 0%, (b) 2%, and eye diagram of one selected PIC from failed and passed categories when σ n = 2%.(c) Failed PIC.(d) Passed PIC.