Switch Open-Fault Detection for a Three-Phase Hybrid Active Neutral-Point-Clamped Rectiﬁer

: This paper proposes a fault-detection method for open-switch failures in hybrid active neutral-point-clamped (HANPC) rectiﬁers. The basic HANPC topology comprises two SiC-based metal-oxide-semiconductor ﬁeld-e ﬀ ect transistors (MOSFETs) and four Si insulated-gate bipolar transistors (IGBTs). A three-phase rectiﬁer system using the HANPC topology can produce higher e ﬃ ciency and lower current harmonics. An open-switch fault in a HANPC rectiﬁer can be a MOSFET or IGBT fault. In this work, faulty cases of six di ﬀ erent switches are analyzed based on the current distortion in the stationary reference frame. Open faults in MOSFET switches cause immediate and remarkable current distortions, whereas, open faults in IGBT switches are di ﬃ cult to detect using conventional methods. To detect an IGBT fault, the proposed detection method utilizes some of the reactive power in a certain period to make an important di ﬀ erence, using the direct-quadrant (dq)-axis current information derived from the three-phase current. Thus, the proposed detection method is based on three-phase current measurements and does not use additional hardware. By analyzing the individual characteristics of each switch failure, the failed switch can be located exactly. The e ﬀ ectiveness and feasibility of the proposed fault-detection method are veriﬁed through PSIM simulations and experimental results.


Introduction
The demands for higher efficiency and power have increased the research on topics related to power converters, in various industrial areas and energy-conversion fields [1][2][3][4]. A multilevel power converter has several advantages such as low power loss, high power output, and higher voltage capability [5][6][7][8]. Among the various multilevel converters, the three-level voltage-source converter (3-L VSC) has the advantages of bidirectional power-flow capability and low voltage stress for each switching device. The 3-L VSC uses pulse-width modulation (PWM) techniques for controlling the output power when performing DC-AC or AC-DC conversions [9][10][11][12][13][14]. A typical topology of the 3-L VSC is of a diode-clamped type, which has a clamped-diode at the neutral point of each leg. The diode neutral-point-clamped (DNPC) inverter was proposed in the 1980s; however, it has disadvantages such as the need for capacitor voltage balancing and relatively high switching losses [15]. The 3-L DNPC topology involves asymmetrical loss distribution on each power semiconductor, and thus, the switching frequency of the power converter is limited to a moderate level [12].
The DNPC-type inverter was often used to replace the clamping diodes with active switches, to overcome the uneven power loss between each switching device. Another 3-L VSC, also known as active neutral-point-clamped (ANPC), was proposed, which exhibits better performance in terms of loss distribution and lower junction temperature [16]. However, the loss distribution determination procedure requires several steps to calculate the power loss and estimate the temperature data in each switch, which increases the calculation stages and computation burdens. Instead of a complex loss distribution solution, a wide bandgap (WBG) device was adopted for next-generation power semiconductors in [17][18][19][20]. SiC is a representative candidate for WBG materials, with high voltage operation and fast electron velocity when compared to traditional silicon (Si) power devices. Additionally, the SiC devices show extremely high speeds and low losses when they change their state from on to off or vice versa. By using SiC devices, the ANPC topology is changed to a hybrid ANPC (HANPC) topology [19].
Despite the numerous merits of HANPC topology, a high probability of switch failure exists because of the increased number of switches in HANPC VSC. There is a growing interest in reliability and safety as research topics [20][21][22][23][24]. Based on industrial surveys and research conclusions, the failure of power electronics systems has been an important issue in miscellaneous applications such as vehicle dynamics and renewable energy generation. A fault is defined as a state of deviation from the standard and usual conditions. Among the power electronic components, power semiconductors are regarded as some of the weakest and most fragile parts [25] (Figure 1). For this reason, fruitful research had been conducted on switch fault diagnosis and post-fault control methods during the past few decades. However, the previous studies focused on switch faults of machine drives or threephase (3-P) two-level rectifier systems [26][27][28]. In power semiconductors, the power loss appears as a thermal effect, such as a junction temperature change or thermomechanical stress accumulation [21,29]. As the power switch is subjected to harsh environments, the bond wires lift and cracks may be caused inside the switch, which finally result in switch failures such as an open-circuit faults [30]. The open faults disconnect the solder connections of the transistor chips and degrade the quality of the output voltage. On the other hand, a short-circuit fault causes more uncontrollable and catastrophic results such as overcurrent or overvoltage, which exceed the rated value of the electronic components [31]. Thus, a short switch fault requires instant shutting down of the power converter because a short fault can cause the entire system to collapse. Although open faults aberrate the power electronics system into unusual states, the open fault condition can be handled through special control schemes instead of applying emergency stop protocols. Therefore, many methods for open-fault detection have been studied and reported [32][33][34].
Several collaborative works on switch fault-detection methods, using neural-network techniques, have been conducted such as [35,36]. However, the neural-network approach requires learning and test processes involving large amounts of data including feature information. Therefore, online diagnosis methods are good solutions for achieving fast and intuitive outcomes of fault detection in VSCs [32]. The online diagnosis methods of transistor open-circuit faults are classified In power semiconductors, the power loss appears as a thermal effect, such as a junction temperature change or thermomechanical stress accumulation [21,29]. As the power switch is subjected to harsh environments, the bond wires lift and cracks may be caused inside the switch, which finally result in switch failures such as an open-circuit faults [30]. The open faults disconnect the solder connections of the transistor chips and degrade the quality of the output voltage. On the other hand, a short-circuit fault causes more uncontrollable and catastrophic results such as overcurrent or overvoltage, which exceed the rated value of the electronic components [31]. Thus, a short switch fault requires instant shutting down of the power converter because a short fault can cause the entire system to collapse. Although open faults aberrate the power electronics system into unusual states, the open fault condition can be handled through special control schemes instead of applying emergency stop protocols. Therefore, many methods for open-fault detection have been studied and reported [32][33][34].
Several collaborative works on switch fault-detection methods, using neural-network techniques, have been conducted such as [35,36]. However, the neural-network approach requires learning and test processes involving large amounts of data including feature information. Therefore, online diagnosis methods are good solutions for achieving fast and intuitive outcomes of fault detection in VSCs [32]. The online diagnosis methods of transistor open-circuit faults are classified into three categories: model-based, voltage-based, and current-based methods. The model-based methods use a mathematical current model or observer model to detect an open-switch fault [31]. The voltage-based methods are based on voltage signals such as the pole voltages of the leg, pole-to-pole voltage data, DC-link voltages, or gate-signal monitoring [37]. Generally, voltage-based methods require high sampling frequencies or hardware circuits for implementation, which increase the calculation burden. The current-based methods use the phase current signals of the VSC to detect faults and identify the exact faulty switch locations [38][39][40][41][42]. The employed current information is used in a stationary reference frame or average value. There are previous fault diagnosis researches using current-based method for open fault in the DC-AC inverters such as DNPC or HANPC-type [43,44]. In the open fault of inverters, upper or lower two switches had same characteristics in the faulty condition, so the zero switching state is employed to distinguish ambiguous faulty location. But in the AC-DC rectifier, the faulty waveforms have distinctive features and a slightly different fault detection method is used. In addition to the aforementioned methodologies, other fault detection strategies using additional sensors or circuits have also been proposed; these methods provide simple processes but involve additional cost and maintenance problems [45][46][47].
In this paper, an open-switch fault detection method is introduced for HANPC rectifier systems. The proposed detection method utilizes direct-quadrant (dq) axis currents on a stationary reference frame, and are derived using a coordinate transform. When an open fault occurs in a single switching device, a distortion is produced in the dq current signal. However, the current distortion alone is not sufficient to identify the faulty location in a 3-P HANPC rectifier. Additional switching state injection is necessary to resolve ambiguous diagnosis results. Several simulation and experimental results support the effectiveness of the proposed fault detection algorithm.

Basic Circuit Topology
The voltage and power capacities are increasing in the power electronics field [48,49]. Expanding upon the conventional topologies is not a good solution, and results in designs with excessive filter size or heat dissipation. Several studies have been conducted on the development of a superior material and novel topology such as a modular cascaded structure [50,51]. Wide-bandgap devices with high-voltage capabilities and smaller filter size and low loss characteristics, which indicates higher power density per volume and weight, are being researched in particular. SiC and GaN semiconductors are at least thrice as expensive as the same-capacity Si IGBTs because of technological difficulties. Guan et al. proposed a highly efficient power converter comprising SiC and Si switches in a leg of an ANPC inverter [20]. By combining two different switching devices, the HANPC topology takes advantage of the SiC MOSFET and competitiveness in the power converter cost. Figure 2 presents the one-leg circuitries of DNPC, ANPC, and HANPC-type VSCs. As shown in Figure 2a, the DNPC-type VSC has two neutral-point diodes and four Si IGBTs (S 1 -S 4 ). The ANPC-type VSC consists of six active switches, as shown in Figure 2b. Figure 2c presents the HANPC topology, which uses SiC devices as a part of the VSC (Q 1 and Q 2 ). The remaining switches are the Si IGBTs (S 1 -S 4 ). The HANPC realizes good quality of loss diminution and high power-conversion efficiency despite the high-switching-frequency operation. In addition, the HANPC design is advantageous in terms of the heat dissipation and filter size because of the aforementioned features. The HANPC topology achieves equal power-loss profiles for each power transistors more easily than other types of 3-L VSCs [52]. The power-loss profile is almost the same when the HANPC inverter delivers power from DC to AC and from AC to DC. In other words, the HANPC-type rectifier converts electrical energy with higher efficiency than the DNPC or ANPC-type rectifiers.

Modulation Scheme for Si and SiC Switches
The HANPC topology uses two different modulation signals as a basic switching scheme. The two modulation signals have different frequencies: a low-speed frequency (LF) and a high-speed frequency (HF). The LF modulation signal is applied to the IGBTs to turn them on and off (~Hz), and the HF signal is used in the SiC MOSFETs as a relatively high-speed switching frequency (~kHz). As shown in Figure 3, a sinusoidal reference signal is used to generate two LF/HF modulation signals, which are implemented by a carrier-based PWM technique. In a 3-P HANPC rectifier, first, three sine-wave reference signals (Vxs, x = a, b, c) are generated and used to calculate the offset voltage (Voffset), as presented in Figure 3a. Next, the offset voltage signal is injected into the sinusoidal reference voltage (Vxn = Vxs + Voffset) and normalized as a value of zero to one (Vxn,norm). The frequency of the LF signal is the same as that of the reference voltage, which means that, if the reference voltage is positive, the IGBT gate voltage (VGE) will be equal to the turn-on level, as presented in Figure 3c. On the other hand, the IGBT will be turned off when the reference signal is negative, and thus, the switching frequency of the IGBTs will be equal to that of the reference voltage signals. The modulation scheme for the SiC MOSFET is correlated with a triangular wave, as shown in Figure 3c. The normalized voltage reference signal (Vxn,norm) is compared with the triangular carrier wave, to determine the turning on and off of the MOSFET switches. The carrier wave repeats counting up and down its steps between zero and one band, if the normalized reference signal becomes greater than the carrier wave, in which case, the turn-on gate voltage is applied to the MOSFET. The MOSFET is turned off when the normalized voltage signal becomes smaller than the triangular wave. With carrier-based PWM, the MOSFET turns on and off at a very fast switching

Modulation Scheme for Si and SiC Switches
The HANPC topology uses two different modulation signals as a basic switching scheme. The two modulation signals have different frequencies: a low-speed frequency (LF) and a high-speed frequency (HF). The LF modulation signal is applied to the IGBTs to turn them on and off (~Hz), and the HF signal is used in the SiC MOSFETs as a relatively high-speed switching frequency (~kHz). As shown in Figure 3, a sinusoidal reference signal is used to generate two LF/HF modulation signals, which are implemented by a carrier-based PWM technique.

Modulation Scheme for Si and SiC Switches
The HANPC topology uses two different modulation signals as a basic switching scheme. The two modulation signals have different frequencies: a low-speed frequency (LF) and a high-speed frequency (HF). The LF modulation signal is applied to the IGBTs to turn them on and off (~Hz), and the HF signal is used in the SiC MOSFETs as a relatively high-speed switching frequency (~kHz). As shown in Figure 3, a sinusoidal reference signal is used to generate two LF/HF modulation signals, which are implemented by a carrier-based PWM technique. In a 3-P HANPC rectifier, first, three sine-wave reference signals (Vxs, x = a, b, c) are generated and used to calculate the offset voltage (Voffset), as presented in Figure 3a. Next, the offset voltage signal is injected into the sinusoidal reference voltage (Vxn = Vxs + Voffset) and normalized as a value of zero to one (Vxn,norm). The frequency of the LF signal is the same as that of the reference voltage, which means that, if the reference voltage is positive, the IGBT gate voltage (VGE) will be equal to the turn-on level, as presented in Figure 3c. On the other hand, the IGBT will be turned off when the reference signal is negative, and thus, the switching frequency of the IGBTs will be equal to that of the reference voltage signals. The modulation scheme for the SiC MOSFET is correlated with a triangular wave, as shown in Figure 3c. The normalized voltage reference signal (Vxn,norm) is compared with the triangular carrier wave, to determine the turning on and off of the MOSFET switches. The carrier wave repeats counting up and down its steps between zero and one band, if the normalized reference signal becomes greater than the carrier wave, in which case, the turn-on gate voltage is applied to the MOSFET. The MOSFET is turned off when the normalized voltage signal becomes smaller than the triangular wave. With carrier-based PWM, the MOSFET turns on and off at a very fast switching In a 3-P HANPC rectifier, first, three sine-wave reference signals (V xs , x = a, b, c) are generated and used to calculate the offset voltage (V offset ), as presented in Figure 3a. Next, the offset voltage signal is injected into the sinusoidal reference voltage (V xn = V xs + V offset ) and normalized as a value of zero to one (V xn,norm ). The frequency of the LF signal is the same as that of the reference voltage, which means that, if the reference voltage is positive, the IGBT gate voltage (V GE ) will be equal to the turn-on level, as presented in Figure 3c. On the other hand, the IGBT will be turned off when the reference signal is negative, and thus, the switching frequency of the IGBTs will be equal to that of the reference voltage signals. The modulation scheme for the SiC MOSFET is correlated with a triangular wave, as shown in Figure 3c. The normalized voltage reference signal (V xn,norm ) is compared with the triangular carrier wave, to determine the turning on and off of the MOSFET switches. The carrier wave repeats counting up and down its steps between zero and one band, if the normalized reference signal becomes greater than the carrier wave, in which case, the turn-on gate voltage is applied to the MOSFET. The MOSFET is turned off when the normalized voltage signal becomes smaller than the triangular wave. With carrier-based PWM, the MOSFET turns on and off at a very fast switching frequency. Figure 3d presents a 3-L output pole voltage of the HANPC, produced by applying the LF/HF modulation scheme. The value of the pole voltage oscillates between +V DC /2 (positive state, P) and 0 (zero state, O+) in a half cycle of the fundamental period; in the other half cycle, the pole voltage value oscillates between −V DC /2 (negative state, N) and 0 (zero state, O−). The switching frequency of the output pole voltage is defined as HF, which is the switching frequency of the SiC MOSFET. This implies that the HANPC topology can increase the switching frequency of the output voltage by adopting a high switching frequency in the SiC MOSFETs while the Si IGBTs operate at a lower frequency. In other words, the HANPC topology facilitates high-frequency operation easily and has high power efficiency for bidirectional operation (inverter and rectifier modes). Figure 4 and Table 1 show the switching states of the HANPC topology, according to the on-off state of the transistor and direction of current conduction (i x ). In a positive (P) switching state, switches S 1 , S 3 , and Q 1 are turned on and the other switches are turned off, as presented in Figure 4a,b. In these cases, the output pole voltages are +V DC /2. The current conduction is differentiated by the power flows. When the switching state is P and positive current flows through the S 1 transistor, active power flows from DC to AC. When negative current flows, the anti-parallel diode of switch S 1 will turn on. Figure 4c,d show the zero (O+) switching state with switches S 1 , S 3 , and Q 2 turned on. The HANPC-type VSC triggers the O+ state by changing only the switching state of the MOSFETs complementarily to the P state. When the switching state is the O+ state, the AC output pole (node x) is connected to the DC neutral point (node n), and the pole voltage will be 0. In this case, the MOSFET Q 1 will be turned off and the Q 2 switch turned on so that current flows through switches S 3 and Q 2 . As shown in Figure 4c, positive current flows through the transistors S 3 and Q 2 . In contrast, negative current flows through the diode part of switch S 3 ; Figure 4d shows this current path. frequency. Figure 3d presents a 3-L output pole voltage of the HANPC, produced by applying the LF/HF modulation scheme. The value of the pole voltage oscillates between +VDC/2 (positive state, P) and 0 (zero state, O+) in a half cycle of the fundamental period; in the other half cycle, the pole voltage value oscillates between −VDC/2 (negative state, N) and 0 (zero state, O−). The switching frequency of the output pole voltage is defined as HF, which is the switching frequency of the SiC MOSFET. This implies that the HANPC topology can increase the switching frequency of the output voltage by adopting a high switching frequency in the SiC MOSFETs while the Si IGBTs operate at a lower frequency. In other words, the HANPC topology facilitates high-frequency operation easily and has high power efficiency for bidirectional operation (inverter and rectifier modes). Figure 4 and Table 1 show the switching states of the HANPC topology, according to the on-off state of the transistor and direction of current conduction (ix). In a positive (P) switching state, switches S1, S3, and Q1 are turned on and the other switches are turned off, as presented in Figure  4a,b. In these cases, the output pole voltages are +VDC/2. The current conduction is differentiated by the power flows. When the switching state is P and positive current flows through the S1 transistor, active power flows from DC to AC. When negative current flows, the anti-parallel diode of switch S1 will turn on. Figure 4c,d show the zero (O+) switching state with switches S1, S3, and Q2 turned on. The HANPC-type VSC triggers the O+ state by changing only the switching state of the MOSFETs complementarily to the P state. When the switching state is the O+ state, the AC output pole (node x) is connected to the DC neutral point (node n), and the pole voltage will be 0. In this case, the MOSFET Q1 will be turned off and the Q2 switch turned on so that current flows through switches S3 and Q2. As shown in Figure 4c, positive current flows through the transistors S3 and Q2. In contrast, negative current flows through the diode part of switch S3; Figure 4d shows this current path.
Figure 4e,f indicate the negative (N) switching states of the HANPC rectifier. The N switching state generates −V DC /2 output voltage, and switches S 2 , S 4 , and Q 2 are turned on. In the N switching state, the lower-side IGBT switch operates and current conducts through switches S 4 and Q 2 ; the current directions differ as shown in Figure 4e,f. As shown in Figure 4e, the current flows from the AC to the DC side, and the transistors Q 2 and S 4 are in the conduction mode. In the other N state (Figure 4f), current flows from the DC to the AC side, and the anti-parallel diode of switch S 4 conducts electricity. Figure 4g,h present the other zero (O−) switching states, which are opposite to O+ states. In the O− states, switches S 2 , S 4 , and Q 1 are turned on and the output pole is linked to the neutral point. Figure 4g depicts the switching state and current path of the O− state during negative current flow. In Figure 4h, the direction of current flow is positive and the current conduction occurs through the anti-parallel diode of the S 2 switch.

Feature Analysis of Switch Open Fault
One leg of the HANPC rectifier is composed of six active switches, and the possibilities of a single open-switch failure are 18 cases in a 3-P system [43]. Figure 5 shows the phase current, output pole voltage, and AC grid voltage for each A-phase IGBT open fault (four cases). In the unity power factor condition, the open fault in the IGBT switches does not make any remarkable difference in the phase current when compared to the normal state. Figure 5A shows the case of an open-switch fault in IGBT S 1 . In this case, there is a short section in which the output pole voltage oscillates between +V DC /2 and 0, and the current is very small. The S 1 switch fault disturbs that the faulty leg generates a P switching state in a very short time. This phenomenon is similar to the S 3 open fault and is described in Figure 5B. The inner switch S 3 fault blocks not to make the O+ switching state and current flows through the S 3 switch. In other words, an open fault in S 1 or S 3 creates an open circuit and the phase current will be obstructed for a short time. Thus, the near-zero current becomes a complete zero current, because of an IGBT open-switch fault, and the so-called zero-crossing section appears. Figure 5C shows the output pole voltage and phase current under switch S 4 fault conditions. A fault in the IGBT switch S 4 influences the negative current conduction when the output voltage is −V DC /2. In this section, the switching state changes between the N and O− states, as shown in  Figure 5D. Therefore, the phase current goes to zero in the zero-crossing section; however, this section is very narrow and short when compared to the fundamental current period. This is because almost all the current flows through the diode path even though the switch fails during the AC to DC conversion.
When a fault occurs in the MOSFET switches in the HANPC rectifier, the phase currents are distorted more severely. The shape of the faulty phase current deviates from a sinusoid and the zero-current section exists for a relatively longer time. As described in Figure 6 Figure 8 shows the overall control diagram for the 3-P HANPC rectifier. For grid-connected rectifier control, a phase-locked loop (PLL) algorithm is used, and a synchronous phase angle is estimated by using the 3-P voltage data [52][53][54][55][56]. Based on the estimated phase angle information, a coordination transformation is performed (Equation (1)). Using a coordination transformation (θgrid),     Figure 8 shows the overall control diagram for the 3-P HANPC rectifier. For grid-connected rectifier control, a phase-locked loop (PLL) algorithm is used, and a synchronous phase angle is estimated by using the 3-P voltage data [52][53][54][55][56]. Based on the estimated phase angle information, a coordination transformation is performed (Equation (1)). Using a coordination transformation (θgrid),  Figure 8 shows the overall control diagram for the 3-P HANPC rectifier. For grid-connected rectifier control, a phase-locked loop (PLL) algorithm is used, and a synchronous phase angle is estimated by using the 3-P voltage data [52][53][54][55][56]. Based on the estimated phase angle information, a coordination transformation is performed (Equation (1)). Using a coordination transformation (θ grid ), the 3-P sinusoidal currents are converted into dq-axis currents. The dq-axis output currents Electronics 2020, 9, 1437 9 of 21 are compared with the current reference signal. Next, an error is used to generate a voltage reference using a proportional integral (PI) controller [57]. Finally, PWM is performed with the voltage reference signal, and the on-off gate signals are applied to each switching device. In the synchronized dq-axis current control block, the d-axis current is used for reactive power control and q-axis current is related to active power control:

Proposed Detection Method for Switch Open Fault
Electronics 2020, 9, x FOR PEER REVIEW 9 of 22 the 3-P sinusoidal currents are converted into dq-axis currents. The dq-axis output currents are compared with the current reference signal. Next, an error is used to generate a voltage reference using a proportional integral (PI) controller [57]. Finally, PWM is performed with the voltage reference signal, and the on-off gate signals are applied to each switching device. In the synchronized dq-axis current control block, the d-axis current is used for reactive power control and q-axis current is related to active power control: (1) Figure 8. Control diagram for three-phase HANPC rectifier. Figure 9 shows the current waveforms under the open-fault condition in each switch for the Aphase when the PF is approximately −0.7. By applying an effective value on a d-axis current (not zero), the reactive power increases, which means that the current flows through the transistor part of the IGBTs during rectification. However, the transistor path is opened because of an open fault, and the rectified phase current is clearly observed to be a zero value [58]. As presented in Figure 9, in the condition of PF = −0.7, the zero current section is longer than that during the unity PF condition. The current flows in the unity-PF condition are slightly different from those in the non-unity PF condition, and the difference is observed in the dq-axis current trajectory as well.  Figure 9 shows the current waveforms under the open-fault condition in each switch for the A-phase when the PF is approximately −0.7. By applying an effective value on a d-axis current (not zero), the reactive power increases, which means that the current flows through the transistor part of the IGBTs during rectification. However, the transistor path is opened because of an open fault, and the rectified phase current is clearly observed to be a zero value [58]. As presented in Figure 9, in the condition of PF = −0.7, the zero current section is longer than that during the unity PF condition. The current flows in the unity-PF condition are slightly different from those in the non-unity PF condition, and the difference is observed in the dq-axis current trajectory as well.
Electronics 2020, 9, x FOR PEER REVIEW 9 of 22 the 3-P sinusoidal currents are converted into dq-axis currents. The dq-axis output currents are compared with the current reference signal. Next, an error is used to generate a voltage reference using a proportional integral (PI) controller [57]. Finally, PWM is performed with the voltage reference signal, and the on-off gate signals are applied to each switching device. In the synchronized dq-axis current control block, the d-axis current is used for reactive power control and q-axis current is related to active power control: (1) Figure 8. Control diagram for three-phase HANPC rectifier. Figure 9 shows the current waveforms under the open-fault condition in each switch for the Aphase when the PF is approximately −0.7. By applying an effective value on a d-axis current (not zero), the reactive power increases, which means that the current flows through the transistor part of the IGBTs during rectification. However, the transistor path is opened because of an open fault, and the rectified phase current is clearly observed to be a zero value [58]. As presented in Figure 9, in the condition of PF = −0.7, the zero current section is longer than that during the unity PF condition. The current flows in the unity-PF condition are slightly different from those in the non-unity PF condition, and the difference is observed in the dq-axis current trajectory as well.
As shown in Figure 10a, when it comes to the neutral-point clamped switch S3 fault, the P switching state is possible, the positive current flows through S1, and Q1 does not conduct [43,44]. Even though the P switching state is applied, there is no current flow in the faulty leg because the switch S1 fails. Likewise, in the aforementioned case, under the switch S2 fault (Figure 10b), the   Figure 9a. Under the IGBT S 2 and S 4 fault conditions, the current waveforms are perceived to be quite similar (Figure 9b). In each case, the two open faults are similar, but there are differences in the switching states generated by the faulty leg. The dq-axis current angle (θ dq ) is defined as an inversion of a trigonometric function and is calculated using Equation (2) [32].
As shown in Figure 10a, when it comes to the neutral-point clamped switch S 3 fault, the P switching state is possible, the positive current flows through S 1 , and Q 1 does not conduct [43,44].
Even though the P switching state is applied, there is no current flow in the faulty leg because the switch S 1 fails. Likewise, in the aforementioned case, under the switch S 2 fault (Figure 10b), the negative current flow through S 4 and Q 2 switches by applying the N switching state intentionally. This means that the switch S 4 can operate normally, and the faulty switch is S 2 . When switch S 4 is faulty, it is not possible to generate the N switching state and negative current cannot flow. The aforesaid intentional P or N switching states are applied for a very short time in the zero current section to identify the exact faulty location when zero current is detected. The differences in current flow generated by applying the intentional switching scheme help distinguish which IGBT switch is faulty. The open fault that occurred in the MOSFET switch was detected evidently without any switching scheme or PF variation.
Electronics 2020, 9, x FOR PEER REVIEW 11 of 22 negative current flow through S4 and Q2 switches by applying the N switching state intentionally. This means that the switch S4 can operate normally, and the faulty switch is S2. When switch S4 is faulty, it is not possible to generate the N switching state and negative current cannot flow. The aforesaid intentional P or N switching states are applied for a very short time in the zero current section to identify the exact faulty location when zero current is detected. The differences in current flow generated by applying the intentional switching scheme help distinguish which IGBT switch is faulty. The open fault that occurred in the MOSFET switch was detected evidently without any switching scheme or PF variation.
(a) S1 or S3 fault (b) S2 or S4 fault Figure 10. Process to identify a faulty location in two Si IGBT candidates switches by using P or N switching state. Figure 11 shows dq-axis Lissajous waveforms for all cases of open-switch fault. If one phase is a faulty leg, the zero current section appears in a certain angle range (θdq) of the Lissajous waveform. There are phase-angle differences between A/B, B/C, and C/A phase faulty conditions. The B-phase lags 120° behind the A-phase and the C-phase leads 120° in front of the A-phase. These angular characteristics help identify the faulty leg and type of fault that has occurred (IGBT or MOSFET). The zero-current section is expanded, when compared to that of the unity PF condition, which implies that more current flow has been blocked by the open-circuit, because of the PF control with d-axis current. Even though the multiple fault occurred in one or more phase, the circumstance is not different as far from earlier investigations. Because the multiple Si IGBT faults does not make any remarkable difference with normal condition when it comes to a unity PF, as presented in Figure 7b. But in the non-unity PF condition, if the open-faults of IGBT switches occurred in the one or more phases, the dq-current trajectory follows as a combination of particular zero current sections according to fault occurrence location as described in Figure 11. When the open faults happen in S1 switch of A and B-phase, the current vector trajectory shows two zero current section of Figure 11a,e. Also, the multiple SiC MOSFET faults detected by zero current sections in the related angle boundary for each phase as presented in Figure 11.  There are phase-angle differences between A/B, B/C, and C/A phase faulty conditions. The B-phase lags 120 • behind the A-phase and the C-phase leads 120 • in front of the A-phase. These angular characteristics help identify the faulty leg and type of fault that has occurred (IGBT or MOSFET). The zero-current section is expanded, when compared to that of the unity PF condition, which implies that more current flow has been blocked by the open-circuit, because of the PF control with d-axis current. Even though the multiple fault occurred in one or more phase, the circumstance is not different as far from earlier investigations. Because the multiple Si IGBT faults does not make any remarkable difference with normal condition when it comes to a unity PF, as presented in Figure 7b. But in the non-unity PF condition, if the open-faults of IGBT switches occurred in the one or more phases, the dq-current trajectory follows as a combination of particular zero current sections according to fault occurrence location as described in Figure 11. When the open faults happen in S 1 switch of A and B-phase, the current vector trajectory shows two zero current section of Figure 11a,e. Also, the multiple SiC MOSFET faults detected by zero current sections in the related angle boundary for each phase as presented in Figure 11.
Instead of controlling the HANPC rectifier with a continuously non-unity PF, Figure 12 presents an intermittent d-axis current-injection method in the HANPC rectifier. In this procedure, the grid angle, which is derived by the PLL, is used to count the number of cycles. A count variable (x) increases when every grid period starts with a new period as a fundamental period. When the variable (x) reaches a certain number (k), the dq-axis reference change and phase current angle vary slightly. By counting and checking these variations, it is possible to apply the d-axis current in every kth period of the fundamental period. The variation of the dq-axis current reference also causes a change in the dq-axis current angle (θdq). However, if an open-switch fault occurs and reactive power flow is induced, the zero current comes out on the faulty phase current and dq-axis currents.
(a) S1 or S3 in A-phase (e) S1 or S3 in B-phase (i) S1 or S3 in C-phase  Instead of controlling the HANPC rectifier with a continuously non-unity PF, Figure 12 presents an intermittent d-axis current-injection method in the HANPC rectifier. In this procedure, the grid angle, which is derived by the PLL, is used to count the number of cycles. A count variable (x) increases when every grid period starts with a new period as a fundamental period. When the variable (x) reaches a certain number (k), the dq-axis reference change and phase current angle vary slightly. By counting and checking these variations, it is possible to apply the d-axis current in every kth period of the fundamental period. The variation of the dq-axis current reference also causes a change in the dq-axis current angle (θ dq ). However, if an open-switch fault occurs and reactive power flow is induced, the zero current comes out on the faulty phase current and dq-axis currents.
Electronics 2020, 9, x FOR PEER REVIEW 13 of 22  The zero-current section can be detected easily using a derivative value of the dq-axis current angle (dθdq/dt). The control variable k determines the timing of that current references change and the fault-detection process starts. As mentioned in Figure 9, the reactive current injection is necessary for The zero-current section can be detected easily using a derivative value of the dq-axis current angle (dθ dq /dt). The control variable k determines the timing of that current references change and the fault-detection process starts. As mentioned in Figure 9, the reactive current injection is necessary for a change in output waveforms of dq-axis currents. When we choose small k value like 2 or 3, the current references are harshly fluctuating and the output current characteristics get bad. On the other hand, if the k value is selected as a large value like 10 or bigger, that means the fault-detection procedure is executed very rarely, and this finally slows down detection time. So, the k value should be selected with careful consideration. Figure 13 depicts the proposed fault-detection method, which is based on the phase current distortion in the HANPC rectifier. First, the counting process is executed in accordance with the synchronous grid phase angle (θ grid ). The counting value (x) increases until it reaches a maximum value (k). When the fundamental period becomes equal to the kth period, the reactive current reference is applied during one cycle and the counting is reset to 1. Thereby, the reactive current is applied to each kth period during one cycle. In each kth period, the phase current is induced to be out of phase and the zero current section is detected if the open-switch fault occurs. The next step is to calculate and check the dq-current angle. The dq-current angle and its differential value are calculated from the dq-axis current, and the faulty phase current is detected when the differential value is zero. After the zero current section is detected by the dq-axis current, checking is performed to determine whether the zero current has occurred in the kth period or not. If the zero-current section exists in the non-kth period, the faulty location is diagnosed as a MOSFET switch. The faulty location is determined by the current angle value as categorized. Otherwise, if the zero current occurs in the kth period, because of the reactive power injection, the candidates for the faulty location are IGBTs and the designated numbers are 1-4. Using the current angle value when the zero current is detected, the candidates are distinguished as S 1 /S 3 or S 2 /S 4 switches. Finally, a suitable switching state (P or N) is employed, and an accurate faulty switch is diagnosed, according to the positive or negative current flow.  Figure 14 shows the simulated waveforms for the proposed open-fault detection method for a HANPC rectifier. The open-fault scenario is assumed to be on a single transistor of the A-phase. In the simulation, the IGBT fault has already occurred and, in order to detect the open fault, the nonunity PF control is conducted every 6th fundamental period (k = 5).

Simulation Results
As shown in Figure 14a,b, the S1 and S3 IGBT faults produce a phase current that is zero when the dq-current angle range is from 60° to 90°. The zero current appears on the dq-current angle waveform as well, because the current angle stays at the same value, without increasing. The S1 and  Figure 14 shows the simulated waveforms for the proposed open-fault detection method for a HANPC rectifier. The open-fault scenario is assumed to be on a single transistor of the A-phase. In the simulation, the IGBT fault has already occurred and, in order to detect the open fault, the non-unity PF control is conducted every 6th fundamental period (k = 5). In Figure 14c,d, it is observed that the dq-current angle stops rising during an open fault when the dq-current angle range is from −120° to −90°. To distinguish the S4 switch fault from the S2 fault, the N switching state is applied during the zero-current section. The phase current value is zero despite the instant N switching state because the IGBT S4 is opened (Figure 14c). Under the neutralpoint IGBT S2 fault case, negative current generation is feasible and the fault is diagnosed as 2, as in Figure 14d.

Simulation Results
Two  As shown in Figure 14a,b, the S 1 and S 3 IGBT faults produce a phase current that is zero when the dq-current angle range is from 60 • to 90 • . The zero current appears on the dq-current angle waveform as well, because the current angle stays at the same value, without increasing. The S 1 and S 3 IGBT faults generate similar zero current sections, and it is necessary to distinguish which transistor is faulty, using the P switching state. The zero current is maintained even if the P switching state is applied under the S 1 switch fault, as shown in Figure 14a, and the fault detection signal is set to 1. In addition, the S 3 switch fault can generate a positive current with delicate P switching state injection, as shown in Figure 14b, and the fault is detected as number 3.
In Figure 14c,d, it is observed that the dq-current angle stops rising during an open fault when the dq-current angle range is from −120 • to −90 • . To distinguish the S 4 switch fault from the S 2 fault, the N switching state is applied during the zero-current section. The phase current value is zero despite the instant N switching state because the IGBT S 4 is opened (Figure 14c). Under the neutral-point IGBT S 2 fault case, negative current generation is feasible and the fault is diagnosed as 2, as in Figure 14d.
Two cases of MOSFET faults are possible in the A-phase, and the failure caused by the MOSFET switch leads to continuous current distortion. The upper MOSFET fault occludes the positive current flow; in other words, the sinusoidal current waveform is not generated. In the case of Q 1 transistor fault, the derivative of the angle value is zero in the angle range from −90 • to 90 • (−90 • ≤ θ dq ≤ 90 • ); thus, the fault is detected as 5 in Figure 14e. The lower MOSFET fault stops the A-phase, to facilitate the O+ state, and distorts the phase current in the negative half period. The fault is detected as 6, because the dq-current angle does not increase when the dq-current angle is smaller than −90 • or greater than 90 • (θ dq ≤ −90 • or 90 • ≤ θ dq ).

Experimental Results
The proposed open-fault detection algorithm was implemented in an experimental setup, which is described in Figure 15. The constituents of the 3-P HANPC rectifier system were the power stage, control stage, and other equipment such as oscilloscope, control PC, and low-voltage power supply. The power stage was built with Si IGBTs (SK75GBB066T, Semikron, Nuremberg, Germany), SiC MOSFETs (C2M0040120D, Cree, Raleigh, NC, USA), and gate drivers to operate each switching device. All the switches were mounted on a heat sink to dissipate the thermal radiation effectively and cool down the junction temperature during the AC to DC conversion. The control stage was composed of a digital signal processor (TMS320F28377S, TI, Dallas, TX, USA) and the PWM; an analog-to-digital conversion function was also employed. The digital processor computed the reference signal and produced the LF/HF PWM signal while sensing the analog signal using sensors [48]. The control variables used to control the HANPC rectifier were also displayed on oscilloscopes (HDO6104, Teledyne, Thousand Oaks, CA, USA) using a digital-to-analog conversion function. The low-voltage power supply functioned as a moderate power source for the gate drivers, sensors, and main control board. The control PC communicated with the control stage as well.
Electronics 2020, 9, x FOR PEER REVIEW 17 of 22 the O+ state, and distorts the phase current in the negative half period. The fault is detected as 6, because the dq-current angle does not increase when the dq-current angle is smaller than −90° or greater than 90° (θdq ≤ −90° or 90° ≤ θdq).

Experimental Results
The proposed open-fault detection algorithm was implemented in an experimental setup, which is described in Figure 15. The constituents of the 3-P HANPC rectifier system were the power stage, control stage, and other equipment such as oscilloscope, control PC, and low-voltage power supply. The power stage was built with Si IGBTs (SK75GBB066T, Semikron, Nuremberg, Germany), SiC MOSFETs (C2M0040120D, Cree, Raleigh, NC, USA), and gate drivers to operate each switching device. All the switches were mounted on a heat sink to dissipate the thermal radiation effectively and cool down the junction temperature during the AC to DC conversion. The control stage was composed of a digital signal processor (TMS320F28377S, TI, Dallas, TX, USA) and the PWM; an analog-to-digital conversion function was also employed. The digital processor computed the reference signal and produced the LF/HF PWM signal while sensing the analog signal using sensors [48]. The control variables used to control the HANPC rectifier were also displayed on oscilloscopes (HDO6104, Teledyne, Thousand Oaks, CA, USA) using a digital-to-analog conversion function. The low-voltage power supply functioned as a moderate power source for the gate drivers, sensors, and main control board. The control PC communicated with the control stage as well.  Figure 16 presents the experimental results for the proposed open-fault detection method. In the measured waveforms, the red, light blue, and yellow curves indicate the 3-P currents (A, B, and C phases, respectively), and the pink sawtooth lines and the blue horizontal lines indicate the dqcurrent angle and faulty switch location, respectively. The experimental specifications are the same as those presented in Table 2, and the control variable k is set as 6. For normal operation of the HANPC rectifier, the peak value of the 3-P phase current is controlled as 5 A, and there is a 120° phase-angle difference between each phase. In the normal unity-PF control situation, phase current  Figure 16 presents the experimental results for the proposed open-fault detection method. In the measured waveforms, the red, light blue, and yellow curves indicate the 3-P currents (A, B, and C phases, respectively), and the pink sawtooth lines and the blue horizontal lines indicate the dq-current angle and faulty switch location, respectively. The experimental specifications are the same as those presented in Table 2, and the control variable k is set as 6. For normal operation of the HANPC rectifier, the peak value of the 3-P phase current is controlled as 5 A, and there is a 120 • phase-angle difference between each phase. In the normal unity-PF control situation, phase current distortion is not induced by IGBT failure unless a reactive current is applied. This phenomenon is presented in Figure 16a-d, which show the faulty cases of IGBT S 1 , S 3 , S 4 , and S 2 , respectively.  As shown in Figure 16a, the IGBT fault of the A-phase produces phase-current distortion, which means that the zero-current section is displayed by the reactive power injection. By checking the dqcurrent angle value, it is possible to detect the S1 open fault, but the switch S3 fault also generates confusable waveforms. The P switching state is applied manually, and the neutral-point switch S3 fault is distinguished from the S1 fault. When a positive current is induced, as in Figure 16b, the current flow implies that the S1 switch can normally operate whereas S3 cannot. Figure 16c,d show the results of the experiment conducted under faulty conditions. Two cases have almost the same zero current section, although a d-axis current is applied. In order decide  As shown in Figure 16a, the IGBT fault of the A-phase produces phase-current distortion, which means that the zero-current section is displayed by the reactive power injection. By checking the dq-current angle value, it is possible to detect the S 1 open fault, but the switch S 3 fault also generates confusable waveforms. The P switching state is applied manually, and the neutral-point switch S 3 fault is distinguished from the S 1 fault. When a positive current is induced, as in Figure 16b, the current flow implies that the S 1 switch can normally operate whereas S 3 cannot. Figure 16c,d show the results of the experiment conducted under faulty conditions. Two cases have almost the same zero current section, although a d-axis current is applied. In order decide among the two candidates, the N switching state is applied in the middle of the zero-current section. A constant zero-current state exists, regardless of the N switching state, because switch S 4 fails and the current path is disconnected to form an open circuit (Figure 16c). In addition, the neutral-point IGBT fault has a current path for the current, and a negative current flow is induced for a short time.
During the failure of MOSFET switches, the problem of injecting certain switching states is no matter with fault detection; however, the zero-current section is important for diagnosing the exact faulty location. The zero-current section is defined as the range in which the dq-axis current is distorted. Each MOSFET fault has its own range, as shown in Figure 11. As presented in Figure 16e,f, the MOSFET fault is detected immediately by checking the dq-current angle value. Therefore, the experimental results prove the effectiveness of the proposed fault-detection method.

Conclusions
This paper proposed an open-fault detection method for Si IGBTs and SiC MOSFETs used in a HANPC rectifier. The HANPC rectifier facilitated low power loss characteristics and cost-effective configuration by using Si IGBTs and SiC MOSFETs in a single power stage. To address the reliability issues associated with the HANPC rectifier, this paper addressed switch open-fault cases and analyzed the features of each switch fault. The proposed fault-detection algorithm used phase current and dq-axis current data to diagnose the faulty switch precisely. Moreover, the reactive current component was used to make a remarkable difference from the unity-PF condition. The Lissajous waveforms created by the dq-axis currents contained information on the faulty switch and helped the detect fault occurrence. After the fault was detected by the dq-current and its angular value, a special switching scheme was applied to distinguish similar faulty situations. Accurate fault detection was accomplished using the proposed fault-detection method, without requiring additional hardware or external circuit implementation. Simulations and experiments were conducted, which demonstrated the feasibility and effectiveness of the proposed fault-detection method.