Analysis and Design of Harmonic Rejection Low Noise Ampliﬁer with an Embedded Notch Filter

: This paper presents the analysis and design of the harmonic rejection (HR) low-noise ampliﬁer (LNA) with the fully passive source degeneration notch ﬁlter. The proposed HR LNA provides the rejection for the strong harmonics (3 rd ) of the local oscillator (LO) frequencies, where the HR mixer does not provide sufﬁcient HR performance. The proposed 3 rd harmonic notch ﬁlter modulates the source degeneration factor and the impedance matching performance thereafter. This effect further helps the blocking of the harmonic signal. The proposed LNA provides 11 dB gain at the fundamental frequency (2.1 GHz) while rejecting the 3rd harmonic component by 37 dBc. Compared to the conventional LNA, the 3rd harmonic notch performance is improved by 23 dB. Additionally, the LNA achieves a minimum noise ﬁgure of 3.1 dB, third order input intercept point ( IIP 3 ) of 0.5 dBm, input reﬂection (S 11 ) below − 10 dB from 1.8 GHz–2.3 GHz operational frequency range, and consumed 19 mW of power from a 1.2 V supply.


Introduction
The switching mixer down-converts the harmonics of the local oscillator (LO) signal and corrupts the desired signal in RF receivers. The de-sensitization due to the harmonics is not the exception for the narrow-band receivers. In the architecture of a radio-frequency (RF) receiver, the frequency conversion circuit, also known as a down-conversion mixer, is used to shift the desired RF channel signal to either the base-band or intermediate-frequency (IF). A frequency translation can be achieved by breaking the linear time-invariant (LTI) property and the linear time-varying switching mixer is the norm for modern RF receivers due to its superior performance in terms of the conversion gain and noise figure [1][2][3].
The switching mixer, on the other hand, is notorious for harmonic spurious issue, where the square-wave-like local oscillator LO signal down-converts the interferences at the harmonics of the LO fundamental frequency (ω o ) [4]. This harmonic alias is a serious problem for broadband radio, where the larger blockers are passed upon the receiver without any pre-filtering (attenuation) and thus harmonic rejection (HR) mixer has to be used, albeit with a circuit complexity and an in-sufficient HR performance [5,6].
An HR issue is considered irrelevant for narrowband radio along with the off-chip filtering components. However, recent trends favor the wide-band analog front-end in order to cover vastly different frequency bands and to lower the cost of the RF transceiver, especially in Long Term Evolution (LTE) [7]. Thus, blocker signals may reach the HR mixer where the harmonic alias rejection is usually in the range of 40-50 dBc only [5,6,8].
We propose the HR LNA with a source degeneration notch filter embedded within the amplifying stage. The novelty of the proposed HR LNA is due to features which include: (1) the harmonic filtering occurs before the current to voltage conversion in the load of the LNA and thus the desensitization due to the strong blockers is prevented in the first stage of the receiver chain; (2) the harmonic rejection requirement on the HR mixer is significantly relaxed with the help of HR LNA; (3) the proposed source degeneration notch filter is fully passive and incurs no additional current consumption, and; (4) the source degeneration factor is modulated for the rejection of 3 rd harmonic and the blockers around 3ω o of the LNA is reflected across the antenna-LNA interface. Figure 1 shows the proposed LNA architecture which is based on the inductor degenerated LNA architecture [9]. Instead of the inductor degeneration, the proposed LNA has the LC resonator as the degeneration component, where the desired resonance is at 3ω o . The degeneration capacitor C s is employed to form a parallel LC notch filter at the 3ω o to provide the required filtering of the third harmonic components. The impedance (Z s ) of the LC resonator with finite quality factor (Q s ) of the inductor is expressed as [10]

Proposed Notch LNA
where R s is the series resistance due to the finite Q s = ω s ·L s R s of the inductor and ω s = 1 √ L s ·C s is located at 3 rd harmonic frequency (3ω o ). Then, the effective input impedance (Z in ) exhibits two distinct characteristics at the desired operating frequency range (ω o ) and undesired 3 rd harmonic frequency range (3ω o ).
With g m1 as the trans-conductance of M 1 , Z in (s) can be expressed as From Equation (3), we can achieve the desired input matching by ensuring the resonance at [4] ω o = 1 In addition, Equation (3) manifests the large real impedance (Re[Z in ] = Q 2 s · R s ) at 3ω o , thereby the undesired signals around 3ω o are severely unmatched regardless of the exact resonance frequency at The proposed LNA with a source degeneration notch filter is advantageous for the gain at the fundamental frequency (ω o ). The effective trans-conductance of the proposed circuit before the current to voltage conversion in the load can be expressed as follows.
where Q(s) is the effective quality factor of the input impedance (Z in (s)) and depends on the operating frequency ranges as depicted below [4].
Equations (8) and (9) are calculated based on the frequency-dependent source degeneration impedance, whose impedance (Z s (s)) behaves as an inductor (≈ L s ) and a resistor (≈ Q 2 s · R s ) at the fundamental (ω o ) and 3rd harmonic (3ω o ) frequencies. R ant is the impedance seen into the direction of antenna (usually 50 ohms). From the simulation, Q(ω o ) and Q(3ω o ) are obtained to be 4.74 and 0.18 respectively. Then, G m recorded a boosting factor of 4.74 at ω o .
The output impedance of the proposed LNA at ω o is Q 2 d · R d , where Q d and R d refers to the quality factor and the series parasitic resistance of the inductor load, L d . Then, stand-alone LNA requires the output buffer, whose impedance is ideally matched to the measurement port (=50 Ω). Figure 2 shows the schematic of the source follower circuit, from the figure, the transistors M b2 and M b1 constitute the main trans-conductor and the current bias respectively. Neglecting the body effect, the output impedance of the source follower buffer is given by where g mb2 is the transconductance of the source trans-conductor (M b2 ). Table 1 lists the device used in the LNA and output buffer. The design procedure of the harmonic rejection LNA is as follows. We choose the optimum quality factor of the input impedance at ω o , which is also the function of C gs (and device width of main trans-conducting transistor, M 1 ). The current consumption of the amplifier is dictated by the power budget. In our design, the proposed LNA consumed 15.8 mA and subsequently we could determine the dc bias, trans-conductance of M 1 , and the overdrive voltage of M 1 . Required real impedance of 50 Ω along with the resonance at ω o dictates the inductance at the source and the gate. The capacitor at the source has the desired harmonic resonance at 3ω o and thus we could easily determine the required capacitor size given the inductance (L s ). The transistor M 2 as the cascoded device as well as the load resonator (L d , C d ) are carefully designed while optimizing the current transfer due to M 2 and maximizing the load impedance at ω o .

Verifications
The proposed LNA was implemented with TSMC 40 nm CMOS technology and verified with Cadence Virtuoso. The final layout of the proposed LNA with an embedded notch filter is shown in Figure 3. Due to the large value of the gate inductor (L g ) required, it is placed off-chip, providing much higher quality factor than the on-chip realization. A total area of 0.441 mm × 0.731 mm including the pad was achieved. An important compromise was made between lower metal layers and higher metal layers to avoid too much parasitic capacitance effect which leads to frequency shift and gain reduction. The lower metals are used in the layout of the LNA core to minimize parasitic capacitance effect. The LC resonators are positioned relatively far from each other and also the active devices, hence the need to employ high metal layers to minimize series resistance on the connecting metals.
The frequency response of Z in (s) is shown in Figure 4. The LNA exhibits a real impedance of about 50 Ω around the fundamental frequency while presenting extremely high impedance at 3ω o as presented in Equation (3). At 3ω o , the effective resistance is a function of the antenna resistance and the square of the effective quality factor.   Figure 5 shows the power gain of the proposed LNA compared to the conventional LNA without the notch filter. The cut-off frequency of the band-pass filter employed at the load is carefully tuned to occur around 3ω o . The LC resonator's reactance increases extremely near the cut-off frequency resulting in a gain reduction of about 14 dBc without the notch filter. With the addition of the notch filter, the attenuation is further improved at 3ω o by 23 dBc. The gain difference for the conventional and the proposed embedded notch filter LNA is only 1.5 dB at the fundamental frequency (2.1 GHz).  Figure 6 shows the input reflection of the conventional versus the proposed LNA. The input reflection (S 11 ) is below −10 dB for a frequency range of 1.9 GHz-2.5 GHz without the notch filter. However, S 11 with the notch filter has a frequency range of 1.8 GHz-2.3 GHz. It clearly shows a slight frequency shift, which is as a result of the degeneration capacitor (C s ) and other undesired parasitic effects resulting from the layout. The large signal noise figure performance of the proposed LNA is depicted in Figure 7. The large blocker tone at 3ω o (=6.3 GHz) is imposed on the LNA input while its power is varied from −10 dBm to 30 dBm. The proposed LNA exhibits 0.2 dB higher NF compared to the conventional LNA. On the other hand, the benefit due to the proposed notch LNA is evident from the large-signal NF results with >15 dBm blocker level. The source follower buffer with an output impedance of 1 g mb2 is designed to achieve an output reflection of less than −20 dB as shown in Figure 8. The LNA also demonstrated a very good input third-order intercept point (IIP 3 ) performance of about 0.5 dBm as shown in Figure 9.   Table 2 gives the power at the gate of the input transistor and that of the drain of the cascode transistor when fed with an input signal tone of −50 dBm. The power gain/attenuation is obtained by assigning output ports at nodes V a and V b shown in the schematic of Figure 1. The gain/attenuation is observed at both the fundamental and third harmonic frequencies which are very close to that of the S 21 parameter for the conventional as well as the notch LNA.
A comparison of this work with other related works is given in Table 3. Some of the works in (Table 3) did not provide explicit performance for the harmonic rejection and thus are estimated from the gain (S 21 ) performance. Our work demonstrated the best harmonic rejection performance with a superior noise figure and better linearity.

Conclusions
In this paper, the harmonic rejection LNA with an embedded notch filter as the source degeneration component is proposed to enhance the filtering of 3 rd harmonic signals in an RF receiver system. The frequency-dependent source degeneration impedance, the LNA input impedance, as well as the signal gain/attenuation at both the fundamental and 3 rd harmonic frequencies of the notch filter are analyzed, and the various equations give an accurate relation with that of the simulated results. The simulation results verify that the proposed LNA can attenuate third harmonic signals by 37 dBc while providing a sufficient gain of 11 dB at the fundamental frequency. The LNA demonstrated the noise figure of 3.1 dB with a large blocker tone of 5 dBm at 3ω o imposed upon the LNA input.