Modified Cascaded Z-Source High Step-Up Boost Converter

To improve the voltage gain of step-up converters, cascaded technique is considered as a possible solution in this paper. By considering the concept of cascading two Z-source networks in a conventional boost converter, the converter takes the advantages of both impedance source and cascaded converters. However, by applying some modifications, the proposed converter provides high voltage gain while the voltage stress of switch and diodes are still low. Moreover, the low input current ripple of the converter makes it absolutely appropriate for photovoltaic applications in order to expand the lifetime of PV panels. After analyzing the operation principles of the proposed converter, simulation and experimental results of a 100W prototype are presented to verify the proposed converter performance.


Introduction
By emerging the lack of energy and climate changes due to increasing the fossil fuel consumption over the last decades, using renewable energies could definitely survive the earth planet from future energy crisis [1]. However, in order to utilize the renewable energies, power electronics converters are inevitably essential to produce the required voltage and current for different applications. Among different types of renewable energies, solar energy is more popular as a limitless source of energy which is spread all over the world. Although the output voltage of photovoltaic (PV) cells are relatively low, applying high step-up DC-DC converters lead to increase voltage level without connecting series numerous PV panels to enhance the operation of photovoltaic system especially in low power applications [2].
Research on high step-up converters in recent years led to present diverse topologies in order to resolve the existence drawbacks such as high voltage stress of semiconductor devices, reverse recovery problem of diodes, and intense spike on switches which are mostly appear in conventional boost converter by increasing the duty cycle [3]- [4]. Consequently, the topological alteration of the conventional boost converter was proposed by researchers to extend the input to output voltage ratio meanwhile the circuit operation will enhance as well. To overcome the drawbacks of boost converter with high efficiency and their simple control scheme, based boost converters were proposed by researcher with different techniques such as coupled-inductor based boost converter, switchedcapacitor based boost converter, cascaded boost converter, and interleaved boost converter [5]. All introduced converters have some weaknesses and strengths which make them restricted for specific applications. For this purpose, a better performance of a high step-up converter will be obtain if it would be possible to apply different techniques in a converter.
Inserting the coupled-inductors into the dc-dc converters is an effective method to increase the voltage gain by adjusting the turn ratio between the windings in a topology. Although by increasing the leakage inductance, due to inserting coupled-inductors, the reverse-recovery problem of diodes can reduce effectively, the leakage energy induces high voltage spikes across the semiconductor switches. One approach in order to solve this problem is employing switched-capacitor technique as an active clamp circuit in order to recycle the leakage energy [6]. To reduce the topology complexity and cost, passive clamps are also considered as a possible solution. In [7], a passive clamp is replaced with an active clamp in a flyback converter to enhance the performance of converter by alleviating reverse-recovery problem and lower circulating current into the clamp circuit. Switched-capacitor converters are able to provide high voltage ratio for high power applications, however, high input ripple current in these converters make them inappropriate for renewable energy applications [5].
The other step-up converter topologies such as cascaded boost converter, interleaved boost converter and three-level boost converter effectively can take the advantages of mentioned techniques like coupled-inductor, switched capacitor and switched-inductors to cover the mentioned weaknesses and improve their performance. For instance, the reverse recovery problem of cascadedboost converter can be compromised with coupled-inductor technique, although the converter efficiency in cascaded converters will be decreased due to two times energy processing [8]- [18]. Moreover, low input current ripple of interleaved converter can effectively employ switchedcapacitor configurations to improve their static voltage gain and alleviate the adverse effect of their pulsating input current [9]. In [10], a three-level boost converter is proposed by employing the coupled-inductors to increase the voltage gain and active clamp to recycle the leakage inductance energy of the coupled-inductors. Consequently, it can be observed how incorporating step-up techniques can appropriately influence the operation of different step-up topologies.
Impedance sources converters are the other recent popular methods which are used widely in power electronic converters by inserting an impedance network between power source and main circuit. The first impedance source converter was proposed in [11] on 2003 for implementing DC-AC, AC-DC, DC-DC and AC-AC power conversion. The impedance source converters are able to totally change the operational characteristics of main converter [11], [12]. An impedance network could provide the following features for a high step-up DC-DC converters [13]: high voltage gain, low voltage stress for semiconductor devices, inherent short circuit immunity, and inherent open circuit immunity. Impedance source network consists of inductors, capacitors, and diodes with different configuration such as Z-source, Y-source, Δ-source, T-source, Γ-source, TZ-source, sigma-Z-source, and so on [14]. A Y-shaped impedance network by coupled-inductors implementation in order to obtain high voltage gain in small duty ratio is presented in [15]. In [16], a Δ-source converter is investigated by employing three coupled inductors and compared with Y-source impedance network. The investigation demonstrates in Δ-source converter smaller magnetizing current and winding loss can be attained compared with Y-source converter. Moreover, the adverse effect of leakage inductance caused by coupled-inductors is reduced significantly in Δ-source converter. In [19], the other Z-source high step-up converter is presented by utilizing two core for two sets of coupled inductors. Although the voltage conversion ratio increased in the mentioned proposed converter in [19], the core loss of the ferrite reduced the efficiency of the converter. In [13], different topologies of galvanically isolated impedance source DC-DC converter with wide range of input voltage and load regulation for distributed generation systems is surveyed. However, the operating principle of a common grounded Z-source DC-DC converter for photovoltaic application is proposed in [17]. The proposed converter with the common ground for input and output resulted in to have a low cost and small size step-up converter compared with the isolated ones.
Investigation in different types of high step-up converters, resulted in proposing a novel impedance source converter by cascading two Z-source network and employing switched-capacitorinductor cells in order to obtain a converter with high voltage gain ratio, low voltage stress on semiconductor devices, and low input current ripple as expected from impedance source converters. However, the conventional configuration of cascading two Z-source network between input source and main converter lead to suffer from very high input current ripple and high voltage stress for the switch. Consequently, by modifying the proposed configuration, the converter became appropriate for high step-up applications with low input current ripple. Furthermore, further research can be done to find out how cascading other impedance network configurations could affect the converter operation.
In this paper after elaborating the topology of the proposed converter and investigating the operational modes in section 2, analysing and design consideration of the proposed converter is studied in section 3 in order to find out the voltage conversion ratio and voltage stresses of the switch and diodes. Finally, section 4 involves the experimental results of a prototype converter to validate the theoretical analysis.

Proposed Converter and Principle of Operation
As it can be seen from Fig. 1, the proposed high step-up DC-DC impedance source based boost converter includes two cascaded Z-source network and two switched-capacitor-inductor cells. The converter hires a single ferrite core with six coupled inductors, which are involved into the impedance network and cells. Very high input current ripple and high voltage stress of the switch are two main problems in this converter. Therefore, some inevitable alteration are required in order to make the converter practically applicable. Although by adding a capacitor as shown in Fig. 2, the voltage stress of the switch clamps at a specific value, the high input current ripple still consider as a drawback in this converter. The dashed-line in Fig. 2 represents how the KVL loop clamps the switch voltage at a specific value. Eventually, the final modification into the converter configuration resulted in obtaining a high step-up converter with low input current ripple and low voltage stress for semiconductor devices. Fig. 3 shows the modified proposed high step-up impedance source converter with equivalent circuit of coupled inductors. The proposed converter composed of a single switch Q1, one diode in the impedance network D1, two diodes in the cells D2, D3, and one output diode D4, six coupled inductors L1, L2, L3, L4, L5, and L6, four capacitors in impedance network C1, C2, C3, and C4, two switched-capacitors C5 and C6, and output capacitor C7.  The converter has four time intervals within a switching cycle in the steady state operation. Fig.  4 illustrates the equivalent circuits for each operating interval, the capacitor C2 can be not considered in the circuit due to being in parallel with input voltage source, and Fig. 5 is provided to show theoretical waveforms of the proposed converter. To simplify the steady state analysis, the following assumptions are made:  The converter operates in continuous conduction mode (CCM),  The Switch, diodes, all inductors and capacitors are assumed ideal ,  The magnetizing inductance is large enough to ignore its current ripple,  The leakage inductance of all windings are equal,  The output capacitors C7 is large enough to make the output voltage constant,  The switching capacitors C5 and C6 are equal.

Operation Principles
Interval 1 [t0 < t < t1] (Fig. 4a): Before t0 input diode D1 is conducting and the other semiconductor devices are off. At t0, the switch Q turns on, diode D1 becomes reverse-biased and (2+n)VC-Vin is applied across it. In addition, the current direction of capacitors C3 and C4 become reverse. In this operation mode, the capacitor voltage of C3 and C4 apply to inductors L3 and L4, and consequently this voltage will be induced to other coupled inductors L1, L2, L5, and L6 by considering the turn ratio. In this stage, the energy of leakage inductances L1 and L2 are recycled to the input voltage source, and the energy of leakage inductances L5 and L6 are absorbed by switched-capacitors C5 and C6.
where, n is the turn ratio of coupled inductors: VC5(t0) and VC6(t0) are less than coupled-inductor's voltage in their corresponding cells, so a resonance occurs between the leakage inductances and C4 and C5 to charge the capacitors through D2 and D3 over the half resonance period. The current and voltage of capacitor C5 can be expressed as: The capacitor C3 and switch Q current are determined as: where iC5 is given by (5).
This mode ends after half resonance period at once the current direction is going to be changed. Therefore, the diodes D2 and D3 turn-off at zero current. Interval 2 [t1 < t < t2] (Fig. 4b): At this operation mode the switch Q is still on and all diodes are at the off state. Also the magnetizing inductance Lm is still charging by C3 and C4. Diodes D2 and D3 are off in this stage due to reversing the current of inductors L5 and L6 which are blocked by diodes D2 and D3, respectively. Therefore, the stored magnetic energy of transformer led to slightly increase the current of other coupling windings. This mode ends when the switch Q turns off. The current of inductor L1 can be expressed as: , and regarding equation (5), I1 is also equal to iC4(t1) by considering the turn ratio. Interval 3 [t2 < t < t3] (Fig. 4c): At t=t2 the switch Q turns off, diodes D1 and D4 turn-on and energy transfer from input to the output during this stage. The stored energy of magnetizing inductance, and capacitors C5 and C6 also transfer to the load, and the capacitor C3 and C4 will be charge through diode D1, however, capacitor C1 is discharged in this operation mode. The resonance between leakage inductance L5 and C5 and also leakage inductance L6 and C6 is occurred during the maximum time of half-resonant interval. This stage ends when the resonant current of iC5 becomes zero and provide the ZCS turn-off for diode D4. In the following the corresponding voltage and current equations are expressed: (Fig. 4d): In this stage the switch is still off and the output diode D4 is also off by reversing the current of L5 which was occurred in previous operation mode. However, the input diode D1 remains on in this stage which makes the capacitors C3 and C4 keeping on their charging state from previous stage. Also, capacitor C1 is discharged the same as operation mode 3. The current of L1 can be stated as: where I3 is equal to iC4(t3) by considering the turn ratio.
Moreover, the other current equations can be expressed as: This operation mode ends when the switch will be turn-on again.

The Proposed Converter Analysis and Design Considerations
In this section different features of proposed converter such as voltage gain and voltage stresses of the switch and diodes are discussed and compared with other high step-up converters. Then, in order to compare the performance of proposed converter features, some graphs and tables are provided.

Conversion Ratio
When the input diode D1 is on the capacitors C3 and C4 charge by input voltage source through magnetizing inductance Lm. However, at on-state of switch Q the capacitors C3 and C4 discharge themselves to Lm that makes increasing the voltage gain of the converter. By applying the magnetizing inductor Lm voltage-second balance equation VC can be calculated as: Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 19 October 2020 doi:10.20944/preprints202010.0390.v1 According to the interval 3, by applying a KVL the output voltage can be obtained as: where the VC5 and VC6 can be expressed as: Therefore, the voltage gain of the proposed converter is equal to: Fig. 6 shows the voltage gain of proposed converter by variation the duty cycle for different turn ratio of coupled inductors. As it can be seen, although by increasing the turn ratio of coupled inductors larger voltage gain can be obtained at lower duty cycle, the duty cycle range for step-up purpose in Z-source converter will be restricted. In fact, the following equation represents the range of duty cycle for proposed impedance source converter in step-up operation mode: Moreover, higher turn ratio results in higher power loss due to increasing the leakage inductance of coupled inductors. Also in Fig. 7, the voltage gain of the proposed converter is compared with converters in [12], [18]- [19]. As it can be observed voltage gain of proposed converter is higher than other three converters for variation of duty cycle from zero to 0.33 by considering the unity turn ratio of coupled inductors.

Voltage Stresses of Switch and Diodes
By considering the corresponding time interval of converter operation mode, the voltage stress of semiconductor devices can be calculated. According to the interval 1, voltage stress of D1 and D4 can be determined as: (22) Also the voltage stress of diodes D2 and D3 can be determined by considering interval 2 as: Preprints (www.preprints.org) | NOT PEER-REVIEWED | Posted: 19 October 2020 doi:10.20944/preprints202010.0390.v1 To calculate the voltage stress of switch Q, a KVL is applied by considering interval 3, therefore, the following equation will be obtained: According to the equation (16), the voltage stress of the switch can be expressed as: Fig. 8 shows the voltage stress of the switch for different turn ratio of coupled inductors by varying the duty cycle, as it can be observed by increasing the turn ratio, the voltage stress increase as well. Moreover, Fig. 9 demonstrates the voltage stress of proposed converter compared with converters in [12], [18]- [19]. The voltage gain varies from 5 to 15 and the voltage stress of the switch for the converters compare with each other. As it can be seen from Fig. 9, stress voltage of the switch in proposed converter and converter in [19] is lower than two other converters.

Converter Analysis and Design Guideline
The ZCS occurs for the diodes D2, D3 and D4 for the sake of resonance between leakage inductance of L5 (or L6) and C5 (or C6). The full-resonance will be done if the following equation satisfied: In order to stabilize the input current, the equation (26) is not satisfied in the proposed converter. However, the ZCS condition is still established, because only even begging part of the resonant waveform will be affected.
In addition, the diode D4 is conducting current only in time interval 3 (t2<t<t3). Therefore, it can be concluded, the average current of D4 is equal to output current: Consequently, the leakage inductance can be calculated as: The duration t3-t2 can be considered as maximum DTSW. In addition, magnetizing inductance can be also calculated as following by considering desirable current ripple L I  : The other capacitors in impedance network have the same value as capacitor C3.

High Step-up Converters Comparison
In Table 1 the performance of proposed converter is compared with the other high step-up converters in [12], [18] and [19]. As observed, the proposed converter provide higher voltage gain meanwhile the voltage stress of the switch is lower than others. Moreover, the proposed converter employs a single ferrite core which make the converter more efficient due to reducing the core loss of transformer in comparison with converter in [18] and [19] with two ferrite cores and converter in [12] with three ferrite core. Also, the input current of proposed converter is continuous with low current ripple, however the input current of other compared converter are discontinuous.

Experimental Results
To compare the performance of proposed converter in practice, a real prototype of the converter is implemented and experimental results are provided in order to verify the theoretical analysis. Fig.  10 shows the real implemented prototype. The implemented converter operates at 50 kHz to converter the 25V input voltage to 300V with nominal power of 100W for the load. Table 2 reports the parameters of the designed converter. The drain-to-source breakdown voltage of the selected MOSFET is much lower than output voltage, therefore low RDS of the MOSFET results in low conduction power loss.   Figure 11 to Figure 15. Input current and voltage of the converter are shown in Figure 11, the low input current ripple can be observed in this figure. Figure 12 shows the voltage and current of diode D1, also the voltage and current waveforms of the switch is shown in Figure 13. It can be seen that regarding output voltage of 300V, which is illustrated in Figure 15, the stress voltage of MOSFET is 100V. Finally, the voltage and current of diode D4 can be seen in Figure 14.
The efficiency of proposed converter is calculated by measuring the input and output current and voltage of the converter by means of DC current and voltage meters, respectively. Fig. 16 shows the efficiency of the implemented proposed converter from 50 percent to 100 percent of full load condition and it is compared with converter in [19]. As it can be observed, by increasing the output power, conduction losses increase as well and lead to drop the efficiency slightly. Moreover, under full-load condition, the measured efficiency is 93%.

Conclusions
Among different step-up techniques which were applied on boost converter in order to improve the input to output voltage ratio, cascaded technique was chosen in this paper in order to cascade two Z-source networks and take the advantage of both cascade and impedance source converters. All inductors are coupled together in the proposed converter, therefore, the voltage gain increase only by utilizing a single core in the proposed configuration. Low duty cycle of the switch lead to reduce the reverse recovery problem of the output diode significantly and results in enhancing the efficiency due to reduction of loss power of switch and diodes. Furthermore, diodes D2, D3, and D4 turn off under ZCS condition. The low input current ripple of this converter makes it appropriate to apply in renewable energy sources. A laboratory prototype of the proposed converter in order to justify the theoretic analysis is built and experimental waveforms presented for a 100W output power converter.