Multiple Modulation Strategy of Flying Capacitor DC / DC Converter

: Flying-capacitor multiplexed modulation technology is suitable for bipolar DC microgrids with higher voltage levels and higher current levels. The module combination and corresponding modulation method can be ﬂexibly selected according to the voltage level and capacity level. This paper proposes a bipolar bidirectional DC / DC converter and its interleaved-complementary modulation strategy that is suitable for bipolar DC microgrids. The converter consists of two ﬂying-capacitor three-level bidirectional DC / DC converters that are interleaved in parallel 90 ◦ , and then cascaded with another module to form a symmetrical structure of the upper and lower arms; the complementary modulation of the upper and lower half bridges constitutes an interleaved complementary multilevel bidirectional DC / DC converter. If the bidirectional converter needs to provide a stronger overcurrent capability, more bridge arms can be interleaved in parallel. Once n bridge arms are connected in parallel, the bridge arms should be interleaved 180 ◦ / n in parallel. In bipolar DC microgrids, the upper and lower arms should be complementarily modulated, and the input and output are isolated by the inductance. To solve the current di ﬀ erence, caused by the inconsistent parasitic, the voltage-current double closed-loop-control is used, and the dynamic response is faster during bidirectional operation. This paper proposes theoretical analysis and experiments that verify bipolar bidirectional DC / DC converter for high-power energy storage. This paper proposes a bidirectional DC / DC converter (BDC) topology with multiplexed modulation strategy for a high-power system, as shown in Figure 1. The parallel operation improves the current capability of the BDC; the voltage level is increased in series operation; and the high-voltage and large-capacity characteristics are realized in series-parallel operation. The symbols and reference directions are indicated in the ﬁgure. The basic unit of the ﬂying-capacitor-type three-level bidirectional DC / DC converter (3L_BDC) easily forms a bipolar BDC of high-voltage and high-current systems. S is only of U H or 0.5 U H inductive current the low-voltage side to the high-voltage side is deﬁned the


Introduction
With the high penetration of intermittent energy, such as solar and wind [1][2][3], a power electronic interface for distributed energy storage is becoming increasingly attractive. The bidirectional DC/DC converter (BDC) is an important piece of equipment for distributed energy storage in DC microgrids, which helps to promote intermittent energy scale applications. The BDCs are widely used in DC microgrids, due to their simple structure, easy expansion, and transmission power being independent of transformers [4][5][6][7].
In particular, it plays a large irreplaceable role in the distributed energy storage of high voltage and high power. For BDCs, current research focuses on buck/boost two-level converters and control strategies for suppressing load disturbances [8,9]; however, switches are subject to low-voltages applications. The voltage and current stresses of the converter are relatively high, so a multilevel

Flying Capacitor Type Three-level DC-DC Basic Unit
This paper proposes a bidirectional DC/DC converter (BDC) topology with multiplexed modulation strategy for a high-power system, as shown in Figure 1. The parallel operation improves the current capability of the BDC; the voltage level is increased in series operation; and the high-voltage and large-capacity characteristics are realized in series-parallel operation. The symbols and reference directions are indicated in the figure. The basic unit of the flying-capacitor-type three-level bidirectional DC/DC converter (3L_BDC) easily forms a bipolar BDC of high-voltage and high-current systems.
Experimental verifications in Section 5. Some conclusions are given in Section 6.

Flying Capacitor Type Three-level DC-DC Basic Unit
This paper proposes a bidirectional DC/DC converter (BDC) topology with multiplexed modulation strategy for a high-power system, as shown in Figure 1. The parallel operation improves the current capability of the BDC; the voltage level is increased in series operation; and the high-voltage and large-capacity characteristics are realized in series-parallel operation. The symbols and reference directions are indicated in the figure. The basic unit of the flying-capacitor-type three-level bidirectional DC/DC converter (3L_BDC) easily forms a bipolar BDC of high-voltage and high-current systems. In Figure 1a, UL is the input-side voltage, UH is the DC bus side voltage, CL is the battery-side capacitance, and CH is the DC bus side capacitance. The conduction time of S3 and S4 is defined as Ton in the switching period Ts, and the duty ratio is D = Ton / Ts. To facilitate the analysis, define the switch function as follows: The modal analysis is performed on the basic unit of the flying-capacitor-type three-level bidirectional DC/DC converter. The key waveform is shown in Figure 2. When the operating mode at D > 0.5, the switching mode of S3 and S4 is only 01, 10, 11, and not 00. The voltage at the two points of AB is 0.5UH or 0; at D < 0.5, the switching mode of S3 and S4 is only 00, 01, 10, and not 11. The voltage of AB is UH or 0.5UH. The inductive current flowing from the low-voltage side to the high-voltage side is defined as the positive direction. In Figure 1a, U L is the input-side voltage, U H is the DC bus side voltage, C L is the battery-side capacitance, and C H is the DC bus side capacitance. The conduction time of S 3 and S 4 is defined as T on in the switching period T s , and the duty ratio is D = T on /T s . To facilitate the analysis, define the switch function as follows: . ( The modal analysis is performed on the basic unit of the flying-capacitor-type three-level bidirectional DC/DC converter. The key waveform is shown in Figure 2. When the operating mode at D > 0.5, the switching mode of S 3 and S 4 is only 01, 10, 11, and not 00. The voltage at the two points of AB is 0.5U H or 0; at D < 0.5, the switching mode of S 3 and S 4 is only 00, 01, 10, and not 11. The voltage of AB is U H or 0.5U H . The inductive current flowing from the low-voltage side to the high-voltage side is defined as the positive direction.

Operational Modal Analysis D > 0.5
During the switching cycle, there are three modes of 11, 01, and 10 for each arm.
1. Mode M3 = 11, S1 and S2 are turned off, S3 and S4 are turned on, S1 and S2 voltage stress are UH/2, the voltage of AB two-point is UAB = 0, the inductor voltage across L1 is UL, and iL flows to the high-voltage side and linearly increases: ( 2. Mode M1 = 01, S1 and S3 turn off, S2 and S4 turn on, the S1 and S3 voltage stresses are UH/2, the flying capacitor Cf1 charge according to the differential equation Cf1 dUf1/dt = Ic, that is ΔUf1=t2Ic/Cf1 = Qc/Cf1, UAB = Uf1 = UH/2, the inductor L1 is UL -UAB < 0, the inductor current iL decreases linearly, and the average inductor current is IL = Ic. 3. Mode M3 = 11, S1 and S2 are turned off, S3 and S4 are turned on, the S1 and S2 voltage stresses are UH/2, the voltage of the two-point of AB is UAB=0, the voltage of the inductance L1 is UL, and iL flows to high voltage side and linearly increase, as shown in Equation (2). 4. Mode M2 = 10, S2 and S4 are turned off, S1 and S3 are turned on, the S2 and S4 voltage stresses are UH/2, flying capacitor Cf1 is discharged, UAB = UH − Uf1 = UH/2, the voltage across inductor L1 is UL − UAB < 0, and iL flows to the high-pressure side and decreases linearly. The column differential equation can be obtained as: According to the duty cycle definition, each equation group for the modal action time can be listed during the switching period:  During the switching cycle, there are three modes of 11, 01, and 10 for each arm.

1.
Mode M 3 = 11, S 1 and S 2 are turned off, S 3 and S 4 are turned on, S 1 and S 2 voltage stress are U H /2, the voltage of AB two-point is U AB = 0, the inductor voltage across L 1 is U L , and i L flows to the high-voltage side and linearly increases: (2)

2.
Mode M 1 = 01, S 1 and S 3 turn off, S 2 and S 4 turn on, the S 1 and S 3 voltage stresses are U H /2, the flying capacitor C f1 charge according to the differential equation C f1 dU f1 /dt = I c , that is ∆U f1 =t 2 I c /C f1 = Q c /C f1 , U AB = U f1 = U H /2, the inductor L 1 is U L -U AB < 0, the inductor current i L decreases linearly, and the average inductor current is I L = I c .

3.
Mode M 3 = 11, S 1 and S 2 are turned off, S 3 and S 4 are turned on, the S 1 and S 2 voltage stresses are U H /2, the voltage of the two-point of AB is U AB =0, the voltage of the inductance L 1 is U L , and i L flows to high voltage side and linearly increase, as shown in Equation (2).

4.
Mode M 2 = 10, S 2 and S 4 are turned off, S 1 and S 3 are turned on, the S 2 and S 4 voltage stresses are U H /2, flying capacitor C f1 is discharged, U AB = U H − U f1 = U H /2, the voltage across inductor L 1 is U L − U AB < 0, and i L flows to the high-pressure side and decreases linearly. The column differential equation can be obtained as: According to the duty cycle definition, each equation group for the modal action time can be listed during the switching period: The inductance satisfies the volt-second balance condition: 2.2. Operational Modal Analysis D < 0.5 During the switching cycle, each arm has three modes of 00, 10, and 01.

1.
Mode M 0 = 00, S 3 and S 4 are turned off, S 1 and S 2 are turned on, the voltage of AB is U AB = U H , S 3 and S 4 voltage stress are U H /2, the voltage of inductance L 1 is U L − U H , i L flows to the high-voltage side and decreases linearly, and the corresponding differential equation can be expressed as: 2.
Mode M 2 = 10, S 2 and S 4 are turned off, S 1 and S 3 are turned on, S 2 and S 4 voltage stress are U H /2, C f1 is discharging, U AB = U H − U f1 = U H /2, the voltage across inductor L 1 is U L − U AB >0, i L flows to the high-voltage side and increases linearly, and the differential equation can be expressed as Equation (4).

3.
Mode M 0 = 00, S 3 and S 4 are turned off, S 1 and S 2 are turned on, the voltage of AB is U AB = U H , S 3 and S 4 voltage stress are U H /2, inductance L 1 voltage is U L − U H , i L flow to high voltage side and the linearity is reduced, and the differential equation can be expressed as Equation (7).

4.
Mode M 1 = 01, S 1 and S 3 are turned off, S 2 and S 4 are turned on, S 1 and S 3 voltage stresses are U H /2, flying capacitor C f1 is charging, U AB = U f1 = U H /2, the inductor voltage across L 1 is U L − U AB > 0, i L flows to the high-voltage side and increases linearly, and the differential equation can be expressed as Equation (3). According to the duty cycle definition, each mode action time can be expressed as: The inductance satisfies the volt-second balance:

Two Arms Interleaved Parallel Modulation
Two arms are paralleled, as shown in in Figure 1b, to increase the overcurrent capability and reduce the input side ripple. Arm 1 is composed of S 1 -S 4 , the inductor L 1 and the flying capacitor C f1 ; and arm 2 is composed of S 5 , S 6 , S 7 , S 8 , the inductor L 2 and the flying capacitor C f2 . Among them, S 1 and S 4 are turned on complementarily, S 2 and S 3 are turned on complementarily, the modulated waves of S 1 and S 2 are interleaved 180 • , and the S 3 and S 4 modulated waves are interleaved 180 • , as shown in Figure 3. Arm 2 is modulated in the same manner as arm 1 with a phase lag of 90 • .
Two arms are interleaved 90 • in parallel; eight modes are used at 0.5 < D < 0.75, and other eight modes are used at 0.25 < D < 0.5. The working mode of the space ratio is shown in Table 1. In the forward power flow (Boost mode), the inductor currents i L1 and i L2 are positive and flow from the low voltage side to the high voltage side. When the negative power flows (Buck mode), the inductor currents of i L1 and i L2 are negative, and the high voltage side flows to the low voltage side. The driving signal between the two arms is interleaved 90 • , and the other side bridge arm switch maintains the original state when one side bridge arm is operated. After the inductor current is superimposed, the low-voltage side current is i L = i L1 + i L2 doubling the pulsation frequency, and the ripple of the i L is reduced.
Two arms are interleaved 90° in parallel; eight modes are used at 0.5 < D < 0.75, and other eight modes are used at 0.25 < D < 0.5. The working mode of the space ratio is shown in Table 1. In the forward power flow (Boost mode), the inductor currents iL1 and iL2 are positive and flow from the low voltage side to the high voltage side. When the negative power flows (Buck mode), the inductor currents of iL1 and iL2 are negative, and the high voltage side flows to the low voltage side. The driving signal between the two arms is interleaved 90°, and the other side bridge arm switch maintains the original state when one side bridge arm is operated. After the inductor current is superimposed, the low-voltage side current is iL = iL1 + iL2 doubling the pulsation frequency, and the ripple of the iL is reduced.  0010  1010  1010  0101  1101  1111  0010  0010  0010  1010  1101  1101  1101  0000  0100  0110  0110  1001  1011  1111  0100  0100  0100  0110  1011  1011  1011  0000  0001  0101  0101  1010  1110  1111  0001  0001  0001  0101  1110  1110  1110  0000  1000  1001  1001  0110  0111  1111  1000  1000  1000  1001  0111  0111  0111 Then the inductor current is superimposed, the low-voltage side current is iL = iL1 + iL2 doubling the pulsation frequency, and the ripple of the iL is reduced. According to Equations (2-9), the ripple current of three-level bi-directional DC/DC(3L-BDC) in Figure 1b, ΔIL1_3L_LBDC, can be calculated as Correspondingly, the ripple current of the inductor of two-level bidirectional DC/DC (2L_ BDC) can be calculated as To reduce currents ripple, n arms can be cascaded, and the drive signals between the arms are interleaved 180°/n. The more arms that participate in interleaved parallel connection, the more    0000  0010  1010  1010  0101  1101  1111  0010  0010  0010  1010  1101  1101  1101  0000  0100  0110  0110  1001  1011  1111  0100  0100  0100  0110  1011  1011  1011  0000  0001  0101  0101  1010  1110  1111  0001  0001  0001  0101  1110  1110  1110  0000  1000  1001  1001  0110  0111  1111  1000  1000  1000  1001  0111  0111  0111 Then the inductor current is superimposed, the low-voltage side current is i L = i L1 + i L2 doubling the pulsation frequency, and the ripple of the i L is reduced. According to Equations (2)-(9), the ripple current of three-level bi-directional DC/DC(3L-BDC) in Figure 1b, ∆I L1_3L_LBDC , can be calculated as Correspondingly, the ripple current of the inductor of two-level bidirectional DC/DC (2L_ BDC) can be calculated as To reduce currents ripple, n arms can be cascaded, and the drive signals between the arms are interleaved 180 • /n. The more arms that participate in interleaved parallel connection, the more obvious the ripple reduction effect, and the more characteristic points of zero ripple appear at the same time-these zero ripple points show a uniform distribution law. The aforementioned analysis shows that the voltage stress on the switches and the flying capacitors of the 3L_BDC is half of U H , which is just half of the traditional 2L_BDC. To reduce the voltage stress, it is necessary to employ a series connection.

Two Arms Complementary Series Modulation
The topology is connected in series with two inductors to reduce the inductor current ripple amplitude; the low voltage side is isolated from the output side by two inductors, which can improve the energy storage unit safety; the series structure can reduce the voltage stress of the switches and increase the voltage level of the DBC, as shown in Figure 1c. The inductor current waveform during complementary modulation is shown in Figure 4. S 4 and Q 1 are the same drive signal, S 3 and Q 2 are the same drive signal, S 2 and Q 3 are the same drive signal, and S 1 and Q 4 are the same drive signal; that is, the switch modulation is based on the topology. The switching period inductance fluctuation frequency is equal to twice of the switching frequency, the inductance fluctuation amplitude is half of that of the single submodule, and the remaining mode complementary series modulation is shown in Table 2.
obvious the ripple reduction effect, and the more characteristic points of zero ripple appear at the same time-these zero ripple points show a uniform distribution law. The aforementioned analysis shows that the voltage stress on the switches and the flying capacitors of the 3L_BDC is half of UH, which is just half of the traditional 2L_BDC. To reduce the voltage stress, it is necessary to employ a series connection.

Two Arms Complementary Series Modulation
The topology is connected in series with two inductors to reduce the inductor current ripple amplitude; the low voltage side is isolated from the output side by two inductors, which can improve the energy storage unit safety; the series structure can reduce the voltage stress of the switches and increase the voltage level of the DBC, as shown in Figure 1c. The inductor current waveform during complementary modulation is shown in Figure 4. S4 and Q1 are the same drive signal, S3 and Q2 are the same drive signal, S2 and Q3 are the same drive signal, and S1 and Q4 are the same drive signal; that is, the switch modulation is based on the topology. The switching period inductance fluctuation frequency is equal to twice of the switching frequency, the inductance fluctuation amplitude is half of that of the single submodule, and the remaining mode complementary series modulation is shown in Table 2. The voltage stress on the switches and the flying capacitors is 0.25 UH in Figure 1c. In order to reduce the voltage and current stress, it is necessary to increase the series and parallel bridge arms simultaneously. The ripple current of L1 in Figure 1c, ΔIL1_3L_LBDC, can be calculated as

Four Arms Mixed Modulation
To meet the large-capacity requirements in the bipolar DC bus, the voltage and current stress of the switching tube should be reduced, so a four-arms mixed converter is proposed, that is, the cascaded form of the interleaved parallel flying-capacitor type three-level converter, as shown in  The voltage stress on the switches and the flying capacitors is 0.25 U H in Figure 1c. In order to reduce the voltage and current stress, it is necessary to increase the series and parallel bridge arms simultaneously. The ripple current of L 1 in Figure 1c, ∆I L1_3L_LBDC , can be calculated as

Four Arms Mixed Modulation
To meet the large-capacity requirements in the bipolar DC bus, the voltage and current stress of the switching tube should be reduced, so a four-arms mixed converter is proposed, that is, the cascaded form of the interleaved parallel flying-capacitor type three-level converter, as shown in Figure 1d. The left and right parallel arms are interleaved 90 • parallel modulation, and the upper and lower series arms are complementarily connected in series. For example, when 0.5 < D < 0.75, in mode 0101/1010, it means S 3 is off, S 4 is on, S 7 is off, S 8 is on; while, Q 3 is on, Q 4 is off, Q 7 is on, and Q 8 is off. The modulation rule of the BDC is shown in Figure 5. . The left and right parallel arms are interleaved 90° parallel modulation, and the upper and lower series arms are complementarily connected in series. For example, when 0.5 < D < 0.75, in mode 0101/1010, it means S3 is off, S4 is on, S7 is off, S8 is on; while, Q3 is on, Q4 is off, Q7 is on, and Q8 is off. The modulation rule of the BDC is shown in Figure 5.  By mixed modulation, the average inductor current is only half of the single-arm current, the ripple frequency is doubled, the flying capacitor voltage is 0.25 UH, and the voltage stress of the switch is only 0.25 UH compared to the 2L_BDC. The modulation is shown in Table 3. To compare the characteristics of the structure, shown in Figure 1, the voltage and current stress conditions are listed in Table 3, and the four arms mixed modulation is more suitable for bipolar high-power applications. This modulation strategy helps to control and protect the design of the circuit. A topological comparison of the proposed BDC in this paper with others are shown in Table 4.  By mixed modulation, the average inductor current is only half of the single-arm current, the ripple frequency is doubled, the flying capacitor voltage is 0.25 U H , and the voltage stress of the switch is only 0.25 U H compared to the 2L_BDC. The modulation is shown in Table 3. To compare the characteristics of the structure, shown in Figure 1, the voltage and current stress conditions are listed in Table 3, and the four arms mixed modulation is more suitable for bipolar high-power applications. This modulation strategy helps to control and protect the design of the circuit. A topological comparison of the proposed BDC in this paper with others are shown in Table 4.

Controller design
Define the state variable as x = [ i L , U H , U f ] T , the input variable as u = U L , the transfer function as G id (s) from the duty cycle d to the inductor current i L and the transfer function G ud (s) from the duty cycle d to the output voltage U H , according to Equations (2)- (9).
where, R H is R load , and r L is the inductance parasitic resistance. The main circuit parameters of the converter are shown in Table 5. Due to the inconsistent impedance of the IGBT parasitic parameters and the inductor winding process, the main loop has a certain degree of impedance difference. The controller's PI regulator is G c (s) = k 1 + k 2 /s, where k 1 = 0.1, k 2 = 50, and the control block diagram is shown in Figure 6.  The main circuit parameters of the converter are shown in Table 5. Due to the inconsistent impedance of the IGBT parasitic parameters and the inductor winding process, the main loop has a certain degree of impedance difference. The controller's PI regulator is Gc(s) = k1 + k2/s, where k1 = 0.1, k2 = 50, and the control block diagram is shown in Figure 6.

Parameters Value Parameters Value
The Bode diagram of the proposed control strategy by a single voltage loop, as shown in Figure  6c. The low frequency range is 30 dB, the high frequency band traverses 0 dB with a slope of −20 dB/dec, and the corner frequency is 120 Hz. The gain crossover frequency is 4 kHz, the phase margin is 90°, and the system is stable; however, the gain is higher than 0dB at 0.1 times of switching frequency. The current inner loop uses inductor current feedback, as shown in Figure 6d. The PI regulator is Gc(s) = 0.1 + 50/s, the crossing frequency of the open-loop transfer function is 449 Hz when crossing the 0 dB line, and the phase margin is 70° at the crossing frequency. It can be judged that the closed loop system is stable. A first-order low-pass filter is added to the loop due to the influence of high frequency noise. The cutoff frequency of the first-order low-pass filter (ωc = 2πfc) is set at 0.1 times the switching frequency, and the gain margin kg (fc = 2 kHz) is 13.4 dB, which is ideal. The pole introduced by the first-order LPF is far from the real axis, and has little effect on the bode diagram and can be ignored.

Experimental result
The experimental platform is shown in Figure 7. In the platform, the DC power supply E and resistance R are used to simulate the power generation change of the renewable energy source. The rated voltage of the DC power supply E is 450 V, and the DC bus voltage rating is 400 V. Super capacitor rated voltage is 250 V, rated capacity is 10 F, maximum discharge current is 15 A, charging current is 10 A, super capacitor voltage UL range is 150 ~ 220 V; switching frequency fs is 20 kHz. DC power supply Chroma 62050H-600 (Chroma Systems Solutions, Inc., Foothill Ranch, CA, USA), DC The Bode diagram of the proposed control strategy by a single voltage loop, as shown in Figure 6c. The low frequency range is 30 dB, the high frequency band traverses 0 dB with a slope of −20 dB/dec, and the corner frequency is 120 Hz. The gain crossover frequency is 4 kHz, the phase margin is 90 • , and the system is stable; however, the gain is higher than 0dB at 0.1 times of switching frequency. The current inner loop uses inductor current feedback, as shown in Figure 6d. The PI regulator is G c (s) = 0.1 + 50/s, the crossing frequency of the open-loop transfer function is 449 Hz when crossing the 0 dB line, and the phase margin is 70 • at the crossing frequency. It can be judged that the closed loop system is stable. A first-order low-pass filter is added to the loop due to the influence of high frequency noise. The cutoff frequency of the first-order low-pass filter (ω c = 2πfc) is set at 0.1 times the switching frequency, and the gain margin kg (f c = 2 kHz) is 13.4 dB, which is ideal. The pole introduced by the first-order LPF is far from the real axis, and has little effect on the bode diagram and can be ignored.

Parameters
Value Parameters Value

Experimental result
The experimental platform is shown in Figure 7. In the platform, the DC power supply E and resistance R are used to simulate the power generation change of the renewable energy source. The rated voltage of the DC power supply E is 450 V, and the DC bus voltage rating is 400 V. Super capacitor rated voltage is 250 V, rated capacity is 10 F, maximum discharge current is 15 A, charging current is 10 A, super capacitor voltage U L range is 150~220 V; switching frequency f s is 20 kHz. DC power supply Chroma 62050H-600 (Chroma Systems Solutions, Inc., Foothill Ranch, CA, USA), DC probe YOKOGAWA 701934 (Yokogawa Electric, Inc., Tokyo, Japan), oscilloscope Tek DPO2024B (Tektronix, Inc., Beaverton, OR, USA). The control chip uses DSP (TMS28335) combined with FPGA (EP3C25Q240); DSP is used for signal sampling and control signal generation, and FPGA is used to generate the modulated wave. To test the feasibility of multiple applications, super capacitor U L = 200V, high side load R H = 200 Ω, adjustable power supply E = 450 V, resistance R = 10 Ω; during switch S disconnection, super capacitor discharge, converter operates on boost 0.5 < D < 0.75 mode, the high side capacitor voltage is stable to U H = 400 V. Super capacitor U L = 250 V, high-voltage-side load R H = 200 Ω, adjustable power supply E = 450 V, resistance R = 10 Ω; during switch S closing, super capacitor charging.    In the project, due to the inconsistent IGBT parasitic parameters and the inconsistent impedance caused by the inductor winding process, the main loop objectively has impedance differences.
The voltage and current double closed-loop PI regulators are used for impedance matching. The two control loops share the voltage outer loop, and the current inner loop uses respective inductor current feedback. The control loop is shown in Figure 7b. The difference in the modulation signals generated by the control loop adjusts the respective output impedances to achieve current sharing control. The left and right arms are interleaved 90° parallel, the two inductor current ripples cancel each other, and the output voltage is stable, as shown in Figures 8 and 9. The current iL fluctuating frequency is twice of the switching frequency, and the inductor current fluctuation In the project, due to the inconsistent IGBT parasitic parameters and the inconsistent impedance caused by the inductor winding process, the main loop objectively has impedance differences.
The voltage and current double closed-loop PI regulators are used for impedance matching. The two control loops share the voltage outer loop, and the current inner loop uses respective inductor current feedback. The control loop is shown in Figure 7b. The difference in the modulation signals generated by the control loop adjusts the respective output impedances to achieve current sharing control. The left and right arms are interleaved 90 • parallel, the two inductor current ripples cancel each other, and the output voltage is stable, as shown in Figures 8 and 9. The current i L fluctuating frequency is twice of the switching frequency, and the inductor current fluctuation amplitude is reduced, due to i L through two inductors evenly. Two arms series, the flying capacitor voltage is 0.25 U H , as shown in Figure 10. The inductor current ripple is small, and the flying capacitor voltage is equal to 0.25 U H . In the project, due to the inconsistent IGBT parasitic parameters and the inconsistent impedance caused by the inductor winding process, the main loop objectively has impedance differences.
The voltage and current double closed-loop PI regulators are used for impedance matching. The two control loops share the voltage outer loop, and the current inner loop uses respective inductor current feedback. The control loop is shown in Figure 7b. The difference in the modulation signals generated by the control loop adjusts the respective output impedances to achieve current sharing control. The left and right arms are interleaved 90° parallel, the two inductor current ripples cancel each other, and the output voltage is stable, as shown in Figures 8 and 9. The current iL fluctuating frequency is twice of the switching frequency, and the inductor current fluctuation amplitude is reduced, due to iL through two inductors evenly. Two arms series, the flying capacitor voltage is 0.25 UH, as shown in Figure 10. The inductor current ripple is small, and the flying capacitor voltage is equal to 0.25 UH.
(a) Boost mode without circumferential inhibition   Switch S is turned on at t ON , and the supercapacitor charging power is 800 W in buck mode. Switch S is turned off at t OFF , and the supercapacitor discharging power is 1200 W in boost mode, as shown in Figure 11. The dynamic response time is less than 20 ms from charging to discharging. The dynamic response time is 400 ms from discharging to charging in the four-arms mixed modes. The flying capacitor voltage is always stable, and the DC bus voltage fluctuation is less than 20 V. The input voltage varies between 150-220 V, the output voltage is stable at 400 V, and the change range of D is 0.63-0.45. From the experimental results in Figures 8-11, it can be seen that the input and output side voltage ripple is less than 1%, and the current ripple frequency is relatively small, which is beneficial to the stable operation of the energy storage unit. When Q 7 shorted, i L4 ripple is only once per cycle, losing the advantage of three levels. However, the overall performance of the converter remains stable, and the input and output voltage ripples are low, as shown in Figure 12. Therefore, the BDC has a strong fault tolerance ability, and failure of any one of the arms does not affect the operation of other arms.  Switch S is turned on at tON, and the supercapacitor charging power is 800 W in buck mode. Switch S is turned off at tOFF, and the supercapacitor discharging power is 1200 W in boost mode, as shown in Figure 11. The dynamic response time is less than 20 ms from charging to discharging. The dynamic response time is 400 ms from discharging to charging in the four-arms mixed modes. The flying capacitor voltage is always stable, and the DC bus voltage fluctuation is less than 20 V. The  Figures 8-11, it can be seen that the input and output side voltage ripple is less than 1%, and the current ripple frequency is relatively small, which is beneficial to the stable operation of the energy storage unit. When Q7 shorted, iL4 ripple is only once per cycle, losing the advantage of three levels. However, the overall performance of the converter remains stable, and the input and output voltage ripples are low, as shown in Figure 12. Therefore, the BDC has a strong fault tolerance ability, and failure of any one of the arms does not affect the operation of other arms. The efficiency is reduced, due to the inherent loss increase with a light load. Since there is a dead time of 1.5 µs when the converter is actually running, energy can be transferred from the low voltage side to the high voltage side through the IGBT body diode during dead time, as shown in Figure 13. Thus, the boost mode efficiency is higher than the buck mode. The efficiency curve is more than 90% from light load to heavy load, meeting design requirements.     The efficiency is reduced, due to the inherent loss increase with a light load. Since there is a dead time of 1.5 µs when the converter is actually running, energy can be transferred from the low voltage side to the high voltage side through the IGBT body diode during dead time, as shown in Figure 13. Thus, the boost mode efficiency is higher than the buck mode. The efficiency curve is more than 90% from light load to heavy load, meeting design requirements.

Conclusions
This paper proposes a BDC topology with a multiplexed modulation strategy for high-power energy storage in bipolar DC microgrids. The parallel arms divide the input side current, which can effectively overcome the current difference caused by the inconsistent parasitic parameters of the parallel arms. The series arms divide the voltage of the high voltage side, which can effectively reduce the voltage stress of the switch and the flying capacitor. The bidirectional transient response is milliseconds, which ensures the dynamic performance and operating efficiency of the converter. The BDC has a strong fault tolerance ability, and the failure of any one of the arms does not affect the operation of other arms. The proposed BDC topology and its modulation strategy can effectively solve the issue of high-power energy storage in bipolar DC microgrids.

Conclusions
This paper proposes a BDC topology with a multiplexed modulation strategy for high-power energy storage in bipolar DC microgrids. The parallel arms divide the input side current, which can effectively overcome the current difference caused by the inconsistent parasitic parameters of the parallel arms. The series arms divide the voltage of the high voltage side, which can effectively reduce the voltage stress of the switch and the flying capacitor. The bidirectional transient response is milliseconds, which ensures the dynamic performance and operating efficiency of the converter. The BDC has a strong fault tolerance ability, and the failure of any one of the arms does not affect the operation of other arms. The proposed BDC topology and its modulation strategy can effectively solve the issue of high-power energy storage in bipolar DC microgrids.
Author Contributions: P.L. designed the prototype and was responsible for writing the paper. C.Z., S.P. and L.Z. were responsible for guidance in the experiment and thesis writing process.
Funding: This research was supported by the National Nature Science Foundation of China under Grants 51477148 and the Science Foundation of Hebei University of Science and technology Grants PYB2019011. This research also received funding from EEEIC International, Poland.