Novel Dead-Time Compensation Strategy for Wide Current Range in a Three-Phase Inverter

Abstract: This paper proposes a novel three-phase voltage source inverter dead-time compensation strategy for accurate compensation in wide current regions of the inverter. In particular, an analysis of the output voltage distortion of the inverter, which appears as parasitic components of the switches, was conducted for proper voltage compensation in the low current region, and an on-line compensation voltage controller was proposed. Additionally, a new trapezoidal compensation voltage implementation method using the current phase was proposed to simplify realizing the trapezoidal shape of the three-phase compensation voltages. Finally, when the proposed dead-time compensation strategy was applied, the maximum phase voltage magnitude in the linear modulation voltage regions was defined to achieve smooth operation even at high modulation index. Simulations and experiments were conducted to verify the performance of the proposed dead-time compensation scheme.


Introduction
Dead-time is an efficient strategy which adds blank time within complementary switching signals to prevent arm-short.The series two switches circuit, sharing a DC-link such a half-bridge, is operating complementary to avoid arm-short condition.However, in the actual switch, a delay occurs within on/off operating due to the parasitic components, and the series switches appear to be shorted with a DC-link.The short circuit allows excessive current through the series switches, causing serious system failure.Therefore, the reliability of the system can be guaranteed by injecting enough dead-time (T d ) until the switch reaches a steady state [1,2].
Especially, as shown in Figure 1a, a circuit structure such as a typical three-phase VSI in which three legs share a DC-link must ensure reliability of the system by applying dead-time.Figure 1b shows the operation of a single leg over time during one switching period.Q * 1s , Q the switch parameters are fluctuated with external factors, it is difficult to compensate accurately in all inverter operating areas by using fixed variables.In some papers [6][7][8], the distortions of inverter output voltage by switch's output capacitors were studied and compensation strategies with the look-up table containing the switch-off times according to the magnitude of the current were suggested.Although, a disadvantage is that it is difficult to compensate the precise dead-time in various environments since the table is limited to the experimental environment.The papers [9,10] proposed an on-line dead-time compensation method which modifies the dead-time compensation voltage (DTCV) by feeding back current distortions.However, the strategies extracting the current distortions are complicated, and have drawbacks near the current zero-crossing points.In [11], the dead-time compensation algorithm using a filter has been suggested.However, due to the lowpass-filter characteristics, the bandwidth of the current controller can be limited.In [12], a scheme which compensates the sixth-order harmonic in d-q axis currents on the synchronous reference frame using a bandpass filter is suggested.However, the performance of the dead-time compensation algorithm is limited by the characteristic of the current controller, making it difficult to compensate for all the dead-time effects of wide harmonics.References [13,14] offer compensation strategies using an observer which is feeding back d-q axis currents on synchronous reference frame.However, since it is utilizing an ideal-model, the observer regards not only the dead-time distortions but also various parasitic components as dead-time errors.Thus, it is impossible to accurately estimate the real output voltage of the inverter.In [15,16], the on-line dead-time compensation algorithms having a trapezoidal shape compensation voltage and a modulator for slope have been proposed.However, it is difficult to completely compensate for the non-linearities of the switch, especially in the low current region.The repetitive controller for dead-time compensation is proposed.Since it is based on the permanent magnet synchronous motor (PMSM) position not constant time like the conventional repetitive controller, it is robust at the variation of the motor speed.However, the d-axis current on the synchronous reference frame affects to the position information, and as a result, precise dead-time compensation is impossible [17].A method to compensate the output voltage error of the inverter using the information of the terminal voltage of the inverter is suggested, but it requires additional hardware to sense the terminal voltage, so it is difficult to apply it to the existing three-phase VSI which may lead to an increase in cost [18,19].
Electronics 2019, 8, x FOR PEER REVIEW 2 of 29 published to analyze and compensate for the dead-time defects.In [1,2,5], the dead-time and the switch on/off delay were analyzed and the dead-time compensation method via ideal parameters was suggested.However, since the switch parameters are fluctuated with external factors, it is difficult to compensate accurately in all inverter operating areas by using fixed variables.In some papers [6][7][8], the distortions of inverter output voltage by switch's output capacitors were studied and compensation strategies with the look-up table containing the switch-off times according to the magnitude of the current were suggested.Although, a disadvantage is that it is difficult to compensate the precise dead-time in various environments since the table is limited to the experimental environment.The papers [9,10] proposed an on-line dead-time compensation method which modifies the dead-time compensation voltage (DTCV) by feeding back current distortions.However, the strategies extracting the current distortions are complicated, and have drawbacks near the current zero-crossing points.In [11], the dead-time compensation algorithm using a filter has been suggested.However, due to the lowpass-filter characteristics, the bandwidth of the current controller can be limited.In [12], a scheme which compensates the sixth-order harmonic in d-q axis currents on the synchronous reference frame using a bandpass filter is suggested.However, the performance of the dead-time compensation algorithm is limited by the characteristic of the current controller, making it difficult to compensate for all the dead-time effects of wide harmonics.References [13,14] offer compensation strategies using an observer which is feeding back d-q axis currents on synchronous reference frame.However, since it is utilizing an ideal-model, the observer regards not only the dead-time distortions but also various parasitic components as dead-time errors.Thus, it is impossible to accurately estimate the real output voltage of the inverter.In [15,16], the on-line deadtime compensation algorithms having a trapezoidal shape compensation voltage and a modulator for slope have been proposed.However, it is difficult to completely compensate for the nonlinearities of the switch, especially in the low current region.The repetitive controller for dead-time compensation is proposed.Since it is based on the permanent magnet synchronous motor (PMSM) position not constant time like the conventional repetitive controller, it is robust at the variation of the motor speed.However, the d-axis current on the synchronous reference frame affects to the position information, and as a result, precise dead-time compensation is impossible [17].A method to compensate the output voltage error of the inverter using the information of the terminal voltage of the inverter is suggested, but it requires additional hardware to sense the terminal voltage, so it is difficult to apply it to the existing three-phase VSI which may lead to an increase in cost [18,19].
(a) (b) In this paper, a novel DTCS for accurate dead-time compensation in all output regions of the inverter is proposed.In particular, with the dead-time compensation algorithm using passive calculation it is difficult to accurately compensate all areas of the inverter output because increased switch turn-off delay effects occur due to the parasitic components of the switch in the low current region.Therefore, in this paper, a new controller that can actively compensate for voltage distortion due to the switch parasitic components and a new method that can more easily implement the threephase trapezoidal compensation voltage (TCV) is presented.In Section 2, the inverter output voltage error by the dead-time and the switch's non-linearities are analyzed.In Section 3, a novel three-phase TCV implementation strategy and the on-line TCV controller revising its amplitude and slope is presented.In Section 4, the output voltage distortions of the three-phase VSI and the maximum linear-modulation phase voltage (MMPV) are analyzed on the space vector area.Finally, in Section 5, the simulation and the experiment are implemented to verify the proposed DTCS.The performance of the DTCS is evaluated with phase current total harmonic distortion (THD).

Analysis of the Dead-Time Effects
In this paper, the dead-time d T of Equation ( 2) includes the ON/OFF propagation delay in order to be simply expressed as d V .Additionally, the conduction voltage drops across the diode and switch are excluded from the effect of dead-time because they are negligible compared to the DC-link voltage level.

The Three-Phase VSI Output Voltage Errors by the Dead-Time
In Figure 1b, an a-phase single leg output voltage an v is varied according to the phase current .Therefore, the a-phase pole voltage errors due to the dead-time can be expressed as In this paper, a novel DTCS for accurate dead-time compensation in all output regions of the inverter is proposed.In particular, with the dead-time compensation algorithm using passive calculation it is difficult to accurately compensate all areas of the inverter output because increased switch turn-off delay effects occur due to the parasitic components of the switch in the low current region.Therefore, in this paper, a new controller that can actively compensate for voltage distortion due to the switch parasitic components and a new method that can more easily implement the three-phase trapezoidal compensation voltage (TCV) is presented.In Section 2, the inverter output voltage error by the dead-time and the switch's non-linearities are analyzed.In Section 3, a novel three-phase TCV implementation strategy and the on-line TCV controller revising its amplitude and slope is presented.In Section 4, the output voltage distortions of the three-phase VSI and the maximum linear-modulation phase voltage (MMPV) are analyzed on the space vector area.Finally, in Section 5, the simulation and the experiment are implemented to verify the proposed DTCS.The performance of the DTCS is evaluated with phase current total harmonic distortion (THD).

Analysis of the Dead-Time Effects
In this paper, the dead-time T d of Equation (2) includes the ON/OFF propagation delay in order to be simply expressed as V d .Additionally, the conduction voltage drops across the diode and switch are excluded from the effect of dead-time because they are negligible compared to the DC-link voltage level.

The Three-Phase VSI Output Voltage Errors by the Dead-Time
In Figure 1b, an a-phase single leg output voltage v an is varied according to the phase current i a direction during the dead-time.When the current direction is positive, the current flows through the body diode D 2 in the lower switch Q 1 , so that the v an comes to be −V dc /2.On the other hand, when the current direction is negative, the current flows through the body diode D 1 in the upper switch Q 1 , thus the output v an becomes V dc /2.Therefore, the a-phase pole voltage errors due to the dead-time can be expressed as In Equation ( 2), the V d is average pole voltage error (APVE) that occurs during a single switching period, and it contains switch turn on/off delays T on , T o f f as well as dead-time T d [2].The a-phase APVE can be expressed according to the direction of current as shown Equation (1).In addition, the other phases, b and c, can be expressed in the same approach via each current polarity [1].The APVEs of three-phase can be represented by the voltage errors on the synchronous reference frame d-q axis as follows.
Equation ( 3) is expressed as the average phase voltage error by APVE [2], and Equation (4) represents the average phase voltage error due to the dead-time on the synchronous reference frame d-q axis by the Fourier series expansion [5,11], where θ e , ω e are electrical angle, electrical angular velocity, i d , i q are d-, q-axis current respectively and δ is the phase angle between q-axis and three-phase current vector I s as shown Figure 3.
switching period, and it contains switch turn on/off delays , on off T T as well as dead-time d T [2].The a-phase APVE can be expressed according to the direction of current as shown Equation (1).In addition, the other phases, b and c, can be expressed in the same approach via each current polarity [1].The APVEs of three-phase can be represented by the voltage errors on the synchronous reference frame d-q axis as follows.
sin( 6) sin( 6) sin (6 1) (6 1) 4 cos( 6) cos( 6) cos ( 6 Equation ( 3) is expressed as the average phase voltage error by APVE [2], and Equation (4) represents the average phase voltage error due to the dead-time on the synchronous reference frame d-q axis by the Fourier series expansion [5,11], where , i i are d-, q-axis current respectively and δ is the phase angle between q-axis and three- phase current vector s I as shown Figure 3.The d-q axis voltage error contains both the fundamental and the 6n th harmonics distortions, as in Equation ( 4).Theses voltage errors cause discordance between the real output voltage of threephase VSI and the voltage commands.Furthermore, the distortion components cause harmonic currents, which degrade the performance of the VSI.Therefore, in order to compensate the voltage distortions due to the dead-time, the opposite voltages of the error voltages can be generated using the Equation (1).The average compensation pole voltage (ACPV) can be expressed as follows.
( ) The d-q axis voltage error contains both the fundamental and the 6nth harmonics distortions, as in Equation ( 4).Theses voltage errors cause discordance between the real output voltage of three-phase VSI and the voltage commands.Furthermore, the distortion components cause harmonic currents, which degrade the performance of the VSI.Therefore, in order to compensate the voltage distortions due to the dead-time, the opposite voltages of the error voltages can be generated using the Equation (1).The average compensation pole voltage (ACPV) can be expressed as follows.
The ACPVs of the b-and c-phase can be described in a similar way as Equations ( 5) and ( 6) which is a-phase AVPC [1,2].Using the three-phase ACPVs and d-q axis transformation matrix (4), the d-q axis dead-time compensation voltage waveforms can be illustrated as Figure 4. Figure 4a shows the a-phase current and Figure 4b,c reveals the average compensation pole voltage of the a-phase and the average compensation phase voltage of the a-phase, respectively.Figure 4d presents the dead-time compensation voltage converted to the α − β axis, and Figure 4e shows the dead time compensation voltage on the d-q axis when δ = 0.
( ) ( ) The ACPVs of the b-and c-phase can be described in a similar way as Equations ( 5) and ( 6) which is a-phase AVPC [1,2].Using the three-phase ACPVs and d-q axis transformation matrix (4), the d-q axis dead-time compensation voltage waveforms can be illustrated as Figure 4. Figure 4a shows the a-phase current and Figure 4b,c reveals the average compensation pole voltage of the aphase and the average compensation phase voltage of the a-phase, respectively.Figure 4d

The Effects of Switch Parasitic Components
The real switch contains diverse parasitic components and the output capacitor of the switch is a critical factor in compensating the distorted output voltage of three-phase VSI because it seriously affects the switch off delay time, off T , depending on the magnitude of the phase current [6].Figure 5 exposes the output capacitors 1 2 , C C connected in parallel with the switches and the charging and discharging process when the phase current p i flows in the positive direction.
In Figure 5a, the dc-link voltage ( ) is charging to the capacitor 1 C while the upper switch is turning on.At that moment, the discharging current

The Effects of Switch Parasitic Components
The real switch contains diverse parasitic components and the output capacitor of the switch is a critical factor in compensating the distorted output voltage of three-phase VSI because it seriously affects the switch off delay time, T o f f , depending on the magnitude of the phase current [6].Figure 5 exposes the output capacitors C 1 , C 2 connected in parallel with the switches and the charging and discharging process when the phase current i p flows in the positive direction.
In Figure 5a, the dc-link voltage v C 1 = V dc is charging to the capacitor C 1 while the upper switch is turning on.At that moment, the discharging current −i C 1 flows to the node 'p' due to the potential difference and is charging the capacitor C 2 of the lower switch so that the voltage v C 2 of the lower switch parasitic capacitor C 2 is rapidly charged to V dc .Consequently, when the upper switch is turning on, the output pole voltage v pn of the half-bridge is hardly affected.On the contrary, when the both upper and lower switches are turned off (during the dead-time), as shown in Figure 5b, the capacitor C 2 of the lower switch is discharged and the voltage of v C 2 arrives at zero.At this time, the current i p can be expressed by the sum of the charging current i C 1 of the upper output capacitor and the discharging current i C 2 of the lower output capacitor.
Assuming that the capacitances C 1 , C 2 and the charging/discharging potentials are equal, the turn off delay time T o f f required for discharging v C 2 can be formulated as follows.
From the Equation (10), when the initial value is V dc , the following Equations ( 11), ( 12) can be obtained.
If the current i p flows in the opposite direction, the switch turn off delay occurs in the upper switch in a similar way when the current is flowing in the positive direction, as shown Figure 5. Thus, the upper switch turns off delay is the same as in Equation ( 12) [20].Figures 6 and 7 show the simulation waveforms and the results verify the previously defined equations in Section 2.2.The graph of Figure 6 compares the simulation results of Figure 7 with Equation ( 12), where T sim o f f is the turn off delay times measured using the simulation results in Figure 7, and T eq o f f is the turn off delay times calculated using the Equation ( 12) respectively.Here, the simulation circuit configuration of Figure 7 is arranged such as Figure 5a, and the lower switch is maintaining the turning off condition while the upper switch is turning on and off. Figure 7a shows the gate-source voltage of the upper switch, and the lower switch waveform is omitted because it only applies the off signal.Figure 7c displays the pole voltage, and voltage distortion due to the output capacitor can be confirmed.
switch is turning on, the output pole voltage pn v of the half-bridge is hardly affected.On the contrary, when the both upper and lower switches are turned off (during the dead-time), as shown in Figure 5b, the capacitor 2 C of the lower switch is discharged and the voltage of i of the lower output capacitor.
Assuming that the capacitances 1 2 , C C and the charging/discharging potentials are equal, the turn off delay time off T required for discharging 2 C v can be formulated as follows.
From the Equation ( 10), when the initial value is dc V , the following Equations ( 11), ( 12) can be obtained.
( ) If the current p i flows in the opposite direction, the switch turn off delay occurs in the upper switch in a similar way when the current is flowing in the positive direction, as shown Figure 5. Thus, the upper switch turns off delay is the same as in Equation ( 12) [20].Figures 6 and 7 show the simulation waveforms and the results verify the previously defined equations in Section 2.2.The graph of Figure 6 compares the simulation results of Figure 7 with Equation ( 12), where sim off T is the turn off delay times measured using the simulation results in Figure 7, and eq off T is the turn off delay times calculated using the Equation ( 12) respectively.Here, the simulation circuit configuration of Figure 7 is arranged such as Figure 5a, and the lower switch is maintaining the turning off condition while the upper switch is turning on and off. Figure 7a shows the gate-source voltage of the upper switch, and the lower switch waveform is omitted because it only applies the off signal.Figure 7c displays the pole voltage, and voltage distortion due to the output capacitor can be confirmed.
(a) (b)  When the current p i is positive direction, the output pole voltage of the half-bride represented as Here, the Figure 6 demonstrates that the turn-off delay time T o f f increases very nonlinearly with current magnitude.The characteristics of these output capacitors indicate that compensation strategies that can be actively controlled by considering switch parasitic components are essential for accurate dead-time compensation in wide current ranges.
When the current i p is positive direction, the output pole voltage of the half-bride represented as Here, the v C 2 affects the output of the inverter since it is discharged with a slope depending on the level of i p as shown in Figure 7. Therefore, the v C 2 should be properly compensated because it cannot be actively controlled.When the current p i is positive direction, the output pole voltage of the half-bride represented as Here, the  Figure 8 shows the actual waveform of v C 2 , which varies with current magnitude, compared with Figure 7, which is the simulation result.
(c)  Equation ( 2) is applicable when the current level is enough to saturate off T and the voltage of the output capacitor is rapidly falling or rising.Therefore, it is necessary to redefine the compensation voltage considering the slope of the output capacitor voltage, especially for the low current region where off T is not saturated.
The regions A, B and C are non-controllable voltages caused by the output capacitors in Figure 9, and require appropriate voltage compensation to get the ideal inverter output.The voltage region made by the output capacitor can be described as Equation ( 2) is applicable when the current level is enough to saturate T o f f and the voltage of the output capacitor is rapidly falling or rising.Therefore, it is necessary to redefine the compensation voltage considering the slope of the output capacitor voltage, especially for the low current region where T o f f is not saturated.
The regions A, B and C are non-controllable voltages caused by the output capacitors in Figure 9, and require appropriate voltage compensation to get the ideal inverter output.The voltage region ∆v C 2 made by the output capacitor can be described as Figure 9. Detail of the dashed box in Figure 5c.
Equation ( 2) can be redefined as Equation ( 20) in order to properly compensate the repercussions of the output capacitor in the low-power area, in which the turn off delay of the switch has the greatest influence on the inverter output.

The Proposed DTCS
As mentioned above, the voltage error not only caused by dead-time distortion, but also caused by switch parasitic components, should be compensated to obtain the ideal three-phase VSI output.In Equation ( 19), generally the dead-time d T is fixed value, but the delay time off T is not.Hence, the precise off T has to be calculated according to the phase current levels in real-time for correct compensation.In this paper, to simplify the variation of off T , TCV is adopted [8,15].In addition, the novel three-phase TCV implementation strategy is proposed to simplify the realized trapezoidal shape, and the novel on-line TCV controller is also proposed to flexibly respond with the variation of the parameters.

Implementation of the TCV Based on the Current Position
The proposed DTCS uses a synchronous reference frame transformation matrix and limiter function to simplify realizing the TCV. Figure 10 displays the triangle waveform function ( ) f t , the sinusoidal waveform function ( ) g t with peak value k and the trapezoidal waveforms to compare the waveform outlines.In Figure 3, the position d θ of the three-phase current can be calculated as follows using the d-q axis currents.Equation ( 2) can be redefined as Equation (20) in order to properly compensate the repercussions of the output capacitor in the low-power area, in which the turn off delay of the switch has the greatest influence on the inverter output.

The Proposed DTCS
As mentioned above, the voltage error not only caused by dead-time distortion, but also caused by switch parasitic components, should be compensated to obtain the ideal three-phase VSI output.In Equation ( 19), generally the dead-time T d is fixed value, but the delay time T o f f is not.Hence, the precise T o f f has to be calculated according to the phase current levels in real-time for correct compensation.In this paper, to simplify the variation of T o f f , TCV is adopted [8,15].In addition, the novel three-phase TCV implementation strategy is proposed to simplify the realized trapezoidal shape, and the novel on-line TCV controller is also proposed to flexibly respond with the variation of the parameters.

Implementation of the TCV Based on the Current Position
The proposed DTCS uses a synchronous reference frame transformation matrix and limiter function to simplify realizing the TCV. Figure 10 displays the triangle waveform function f (t), the sinusoidal waveform function g(t) with peak value k and the trapezoidal waveforms to compare the waveform outlines.In Figure 3, the position θ d of the three-phase current can be calculated as follows using the d-q axis currents.
The three-phase sinusoidal waveforms, which is in phase with the three-phase current vector I s , can be defined as follows.The α − β axis voltage g(∆v α ), g ∆v β with peak value k on the stationary reference frame expressed as: g(∆v α ), g ∆v β is transferred to a three-phase stationary coordinate and the amplitude is limited to ±V d , as in Equation ( 23), to generate the TCV as shown in Figure 10b.
As can be seen in the Figure 10b, if the peak level k is large enough to approximate a linear slope between V d and −V d , then the waveforms can be reckoned as f (∆v an ) ≈ g(∆v an ).Next, as illustrated in Figure 11, the peak value k for implementing the TCV having slopes of the width φ can be defined as follows.
( ) ( ) is transferred to a three-phase stationary coordinate and the amplitude is limited to d V ± , as in Equation ( 23), to generate the TCV as shown in Figure 10b.
As can be seen in the Figure 10b, if the peak level k is large enough to approximate a linear slope between d V and d V − , then the waveforms can be reckoned as ( ) ( )   The function ( ) g t can be expressed as ( ) ( ) , and at the point t φ when ( ) g t has a slopes of the width φ defines as t φ , then the time t φ can be derived as: Assuming that the output of ( ) V at the time t φ , the ( ) g t rewritten as: ( ) The adjustable TCV having a desired compensation voltage amplitude d V and the compensation voltage slopes of the width φ can be realized with Equations ( 23) to (26).

The On-Line TCV Controller
It can be seen from Figure 6 and Equation ( 19) that the amplitudes and slopes of APVEs are changing according to the amount of the current flowing in the phase.Especially, when the VSI operates in the low current region, the magnitudes of the APVEs are decreased and the slopes of the TCV are increased.For these reasons, for smooth dead-time compensation in wide current regions, both the scale of the APVE and the slope of the TCV must be modulated to the optimum value corresponding to the inverter operating environment.
Using the previously defined Equations ( 12), ( 19) and (26), it might be possible to vary the amplitudes and the slopes of APVEs by responding to off T .However, there are limitations to actively changing conditions.Therefore, the on-line TCV controller using the errors is proposed to implement robust dead-time compensation even at parameters with mismatching conditions.
While the influence of the dead-time appears 6n th harmonics in the synchronous reference frame as Equation ( 4), the TCV errors can be obtained through them [16].Although the 6n th harmonics appear on both d-q axis, the TCV error extracting axis can be selected as a d-axis since the d-axis has a larger voltage error than the q-axis.However, if there is a d-axis current ( 0 δ ≠ ), the fundamental component of the harmonic voltages is moving to the q-axis as shown in Equation (4).Thus, to obtain a constant error regardless of the amount of d-axis current, the synchronous reference frame transformation based the three-phase current vector s I should be carried out.In this case, if The function g(t) can be expressed as g(t) = k sin(ωt), and at the point t φ when g(t) has a slopes of the width φ defines as t φ , then the time t φ can be derived as: Assuming that the output of g(t) is |V d | at the time t φ , the g(t) rewritten as: The adjustable TCV having a desired compensation voltage amplitude |V d | and the compensation voltage slopes of the width φ can be realized with Equations (23) to (26).

The On-Line TCV Controller
It can be seen from Figure 6 and Equation ( 19) that the amplitudes and slopes of APVEs are changing according to the amount of the current flowing in the phase.Especially, when the VSI operates in the low current region, the magnitudes of the APVEs are decreased and the slopes of the TCV are increased.For these reasons, for smooth dead-time compensation in wide current regions, both the scale of the APVE and the slope of the TCV must be modulated to the optimum value corresponding to the inverter operating environment.
Using the previously defined Equations ( 12), ( 19) and (26), it might be possible to vary the amplitudes and the slopes of APVEs by responding to T o f f .However, there are limitations to actively changing conditions.Therefore, the on-line TCV controller using the errors is proposed to implement robust dead-time compensation even at parameters with mismatching conditions.
While the influence of the dead-time appears 6nth harmonics in the synchronous reference frame as Equation ( 4), the TCV errors can be obtained through them [16].Although the 6nth harmonics appear on both d-q axis, the TCV error extracting axis can be selected as a d-axis since the d-axis has a larger voltage error than the q-axis.However, if there is a d-axis current (δ 0), the fundamental component of the harmonic voltages is moving to the q-axis as shown in Equation (4).Thus, to obtain a constant error regardless of the amount of d-axis current, the synchronous reference frame transformation based the three-phase current vector I s should be carried out.In this case, if the phase of the three-phase current vector I s is simply obtained by using the Equations ( 21) and ( 22), the harmonic components do not appear in the d-axis current because the harmonic component of the current affects δ.For this reason, the ideal phase of three-phase current vector I s can be obained by d-q axis current commands i * d ,i * q as following Equations ( 27) and (28), assuming that the actual currents do not deviate for the current commands.
Figure 12 demonstrates the proposed on-line TCV controller scheme.To adjust the turn off delay time and slopes of the TCV, the integrators are designed, and for faster dynamics, T f f (12) is feedforwarded.The controller error i dd of Figure 12 is calculated from the d-q axis transformation matrix Equation ( 4) and the phase of ideal three-phase current vector I s Equation (28).
the phase of the three-phase current vector s I is simply obtained by using the Equations ( 21) and ( 22), the harmonic components do not appear in the d-axis current because the harmonic component of the current affects δ .For this reason, the ideal phase of three-phase current vector s I can be obained by d-q axis current commands * d i , * q i as following Equations ( 27) and (28), assuming that the actual currents do not deviate for the current commands.
Figure 12 demonstrates the proposed on-line TCV controller scheme.To adjust the turn off delay time and slopes of the TCV, the integrators are designed, and for faster dynamics, ff T (12) is feedforwarded.The controller error dd i of Figure 12 is calculated from the d-q axis transformation matrix Equation ( 4) and the phase of ideal three-phase current vector s I Equation (28).T is a factor controlling the maximum value of APVE, the phase current p i in Equation (12) must be altered as the magnitude of the three-phase current vector s I .
Figure 13 indicates the fast Fourier transform (FFT) results for two types of the DTCV errors.Figure 13a shows the voltage waveform of the d V amplitude error.Additionally, the FFT result of the d V error has a prominent component in the 6 th harmonic as seen in Figure 13b.Figure 13c shows the voltage waveform of the slopes error of TCV.In addition, the FFT result of the slopes error has noticeable elements in the 12 th and 18 th harmonics, as seen in Figure 13d.By utilizing the results of the Figure 13, the 6 th and 18 th can be selected as the multiplying frequency of off T and φ , respectively, such as in Figure 12.In fact, the multiplying frequency for φ can be selected for both the 12 th and the 18 th as shown in Figure 13d.However, to minimize the influence of the off T error, the 18 th is chosen instead of the 12 th .

Dead-time Compensation
Error Calculator The d-axis current (controller error) i dd based on θ * d includes the current distortion of the 6nth harmonic according to the influence of the dead time, and the polarity of the compensation voltage error can be determined by multiplying each harmonic order implemented using θ * d [16].As the T * o f f is a factor controlling the maximum value of APVE, the phase current i p in Equation ( 12) must be altered as the magnitude of the three-phase current vector I s .Figure 13 indicates the fast Fourier transform (FFT) results for two types of the DTCV errors.Figure 13a shows the voltage waveform of the V d amplitude error.Additionally, the FFT result of the V d error has a prominent component in the 6th harmonic as seen in Figure 13b.Figure 13c shows the voltage waveform of the slopes error of TCV.In addition, the FFT result of the slopes error has noticeable elements in the 12th and 18th harmonics, as seen in Figure 13d.
By utilizing the results of the Figure 13, the 6th and 18th can be selected as the multiplying frequency of T o f f and φ, respectively, such as in Figure 12.In fact, the multiplying frequency for φ can be selected for both the 12th and the 18th as shown in Figure 13d.However, to minimize the influence of the T o f f error, the 18th is chosen instead of the 12th.

The Analysis of the Linear Modulation Region of the Three-Phase VSI with Proposed DTCS
The proposed DTCS is the method feedforwarding DTCV at the controller output, which is the voltage references.Thus, when the correct DTCV is applied, the controller side can consider that the inverter is ideal.However, if the controller outputs a voltage command exceeding the inverter output capable, the feedforwarded compensation voltage will not be able to suitably compensate due to physical constraints of the hardware.Therefore, it is required to limit the voltage reference of the controller by applying the proper physical voltage limit to the controller in order to perform normal operating of the DTCS.

Definition of the MMPV of the Three-Phase VSI
Table 1 and Figure 14 express the voltage vectors of the three-phase VSI in Figure 1.The hexagonal region i ℜ using the six active voltage vectors is the ideal voltage region.The switching operation state function ( ) 14 is shown as ( ) In Figure 14 T .
where 1 T , 2 T represent the interval for which the vectors V is applied, respectively.The maximum active voltage vector with

The Analysis of the Linear Modulation Region of the Three-Phase VSI with Proposed DTCS
The proposed DTCS is the method feedforwarding DTCV at the controller output, which is the voltage references.Thus, when the correct DTCV is applied, the controller side can consider that the inverter is ideal.However, if the controller outputs a voltage command exceeding the inverter output capable, the feedforwarded compensation voltage will not be able to suitably compensate due to physical constraints of the hardware.Therefore, it is required to limit the voltage reference of the controller by applying the proper physical voltage limit to the controller in order to perform normal operating of the DTCS.

Definition of the MMPV of the Three-Phase VSI
Table 1 and Figure 14 express the voltage vectors of the three-phase VSI in Figure 1.The hexagonal region i using the six active voltage vectors is the ideal voltage region.The switching operation state function 14 is shown as In Figure 14, V i smax is the magnitude of the MMPV in the ideal voltage region i .When an arbitrary voltage reference V * exists at 0 • ≤ θ ≤ 60 • , it can configure with the neighboring active voltage vector V i 1 ,V i 2 and zero voltage vector O during the switching period T s .
where T 1 , T 2 represent the interval for which the vectors V i 1 , V i 2 is applied, respectively.The maximum active voltage vector with The reference vector V * projected on the V i 1 and V i 2 vectors, respectively, can be given as The reference vector * V projected on the 1 i V and 2 i V vectors, respectively, can be given as

Analysis of the Linear Modulation Region with Dead-Time and When the Proposed DTCS is Applied
The distortion voltage from the dead-time can be derived by using Equations ( 3) to ( 6) and it is illustrated in Figure 4.In this case, the affection of the distorted voltage caused by the dead-time depends on the phase ψ of the current.Thus, the distortion voltage ∆v err α (ψ), ∆v err β (ψ) can be defined as the function of ψ on the α − β axis.Where the maximum three-phase VSI output with six active voltage vectors is v i α , v i β , the distorted three-phase VSI output v r α , v r β can be expressed as The Figure 15 shows example of the phase ψ between the voltage reference and phase current.

Analysis of the Linear Modulation Region with Dead-Time and When the Proposed DTCS is Applied
The distortion voltage from the dead-time can be derived by using Equations ( 3) to ( 6) and it is illustrated in Figure 4.In this case, the affection of the distorted voltage caused by the dead-time depends on the phase  of the current.Thus, the distortion voltage The Figure 15 shows example of the phase  between the voltage reference and phase current.Figure 16 illustrates the distorted three-phase VSI output voltage waveforms v r α , v r β on the stationary reference frame α − β axis according to the phase ψ. Figure 17 displays v r α , v r β regions on the x-y plot using the waveforms of Figure 16 and Equation (39), and the right side of each voltage region reveals the sector 1 in detail for more accurate analysis.

Analysis of the Linear Modulation Region with Dead-Time and When the Proposed DTCS is Applied
The distortion voltage from the dead-time can be derived by using Equations ( 3) to ( 6) and it is illustrated in Figure 4.In this case, the affection of the distorted voltage caused by the dead-time depends on the phase ψ of the current.Thus, the distortion voltage The Figure 15 shows example of the phase ψ between the voltage reference and phase current.Figure 17a-d was divided into four regions along the voltage region forms.In the case of ψ being a negative phase value (leading condition), it has the same form with a positive phase value as Figure 17, since the distortion voltage is an even function.Therefore, the MMPV magnitudes are arranged in Table 2 instead of illustrating the regions about the negative phase value.i , r and VSI distorted by the dead-time, and the output voltage region of the three-phase VSI applied to the proposed DTCS, respectively.As the dead-time physically limits the turn on period of the switch, even if the dead-time compensated theoretically, the physical limits of the inverter cannot be recompensed.Consequently, when the proposed DTCS is applied, the compensated voltage region c is inscribed within the dead-time voltage region r .Figure 17a-d was divided into four regions along the voltage region forms.In the case of ψ being a negative phase value (leading condition), it has the same form with a positive phase value as Figure 17, since the distortion voltage is an even function.Therefore, the MMPV magnitudes are arranged in Table 2 instead of illustrating the regions about the negative phase value.i ℜ , r ℜ and c ℜ are the output voltage region of the ideal three-phase VSI, the output voltage of the three-phase VSI distorted by the dead-time, and the output voltage region of the three-phase VSI applied to the proposed DTCS, respectively.As the dead-time physically limits the turn on period of the switch, even if the dead-time compensated theoretically, the physical limits of the inverter cannot be recompensed.Consequently, when the proposed DTCS is applied, the compensated voltage region   When the output voltage is in phase with phase current, the voltage distortion exactly coincides with the six active voltage vectors as in Figure 16a.Hence, by using the above Equations ( 31) to (39),

Table 2. The compensated MMPV V c
smax when the proposed DTCS applied.

Phase Delay of the Current
When the output voltage is in phase with phase current, the voltage distortion exactly coincides with the six active voltage vectors as in Figure 16a.Hence, by using the above Equations ( 31) to (39), the arbitrary voltage reference V * in the sector 1 can be expressed as follows using the neighboring real voltage vectors V r 1 ,V r 2 .
V r As the segment V r 12 V r 21 is parallel to the voltage vector V i 1 , the additional voltage region ∆V r 12 V r 21 V i 1 generated by the dead-time forms a regular triangle so that the voltage vector V r 12 is always adjoined with ideal voltage region i .Therefore, the compensated MMPV vector V c smax has equal magnitude with ideal modulation phase voltage vector V i smax .

The Results of the Simulation and Experiment of the Proposed DTCS
The Figure 18 is a simplified block diagram of three-phase VSI controller including the proposed DTCS.Since the DTCV is feedforwarded at the controller output, there is no need to compensate for the dead-time into the current controller.Therefore, the error between the voltage reference of the current controller and the output voltage of the three-phase VSI can be minimized, and it makes it easy to design the algorithms using the voltage reference v * dL , v * qL .As mentioned above, unless the output of the current controller is appropriately limited, normal dead-time compensation is not possible, so the current controller output v * d , v * q should be restricted as shown in block (b) in Figure 18.Here, the voltage limit can be defined according to the phase of the current in Table 2.The outside of the current controller of Figure 18 can be designed along the employed applications.
The degree is always 60  according to the Equation (53): As the segment 12 21 r r V V is parallel to the voltage vector 1 i V , the additional voltage region generated by the dead-time forms a regular triangle so that the voltage vector 12 r V is always adjoined with ideal voltage region i ℜ .Therefore, the compensated MMPV vector c smax V has equal magnitude with ideal modulation phase voltage vector i smax V . (54)

The Results of the Simulation and Experiment of the Proposed DTCS
The Figure 18 is a simplified block diagram of three-phase VSI controller including the proposed DTCS.Since the DTCV is feedforwarded at the controller output, there is no need to compensate for the dead-time into the current controller.Therefore, the error between the voltage reference of the current controller and the output voltage of the three-phase VSI can be minimized, and it makes it easy to design the algorithms using the voltage reference * * , dL qL v v .As mentioned above, unless the output of the current controller is appropriately limited, normal dead-time compensation is not possible, so the current controller output * * , d q v v should be restricted as shown in block (b) in Figure 18.Here, the voltage limit can be defined according to the phase of the current in Table 2.The outside of the current controller of Figure 18 can be designed along the employed applications.

Simulation Results
The proposed DTCS was verified using the simulation software Psim.The three-phase VSI and DTCS were designed the same as in Figure 18, and the current controller was performed alone without outer control loop.The circuit uses a three-phase VSI as shown in Figure 1.In order to maximize the effect of dead-time, the load was composed of only the inductors and the resistors without the back electromotive force or the voltage sources.The switches modeled in SKM50GB063D manufactured by the SEMIKRON were used to observe the effects of the output capacitors into the simulation result.Detailed simulation specifications are shown in Table 3.

Simulation Results
The proposed DTCS was verified using the simulation software Psim.The three-phase VSI and DTCS were designed the same as in Figure 18, and the current controller was performed alone without outer control loop.The circuit uses a three-phase VSI as shown in Figure 1.In order to maximize the effect of dead-time, the load was composed of only the inductors and the resistors without the back electromotive force or the voltage sources.The switches modeled in SKM50GB063D manufactured by the SEMIKRON were used to observe the effects of the output capacitors into the simulation result.Detailed simulation specifications are shown in Table 3. Figure 20 demonstrates the simulation results of the proposed DTCV with the above specifications.Figure 20a shows the compensated three-phase current waveforms and Figure 20d displays the compensation voltage on the synchronous reference frame d-q axis.It can be confirmed that the magnitudes of compensation voltages g(∆v d ), g ∆v q change according to the magnitude of the current vector I s and the fundamental component of the dead-time compensation voltage shifts to d-axis along d-axis current level.Figure 20e presents the position information of the three-phase current vector I s using the control position θ e and Equation (21).It can validate that the position θ d of the I s is changed along d-q axis current amounts.
that the magnitudes of compensation voltages ( )  Figure 21 indicates the simulation result when any DTCS is not applied under the condition of Figure 20, comparing the performance of the proposed DTCS. Figure 21a is the three-phase currents and Figure 21b is the d-q axis current on the synchronous reference frame.It can be seen the amount of the current decreases, and the harmonic distortions of the current become smaller.This is caused by the fact that as the switch turn off delay off T is increased in the low current region.However, when off T is in the saturation region sufficiently, there is notable current distortions because the current controller cannot compensate the voltage distortion of high order harmonic distortions.As a result, the proposed DTCS applied three-phase currents has THD below 0.4%.In contrast, the three-phase currents which are not applied DTCS have a 5.4% THD that is about 10 times larger.Figure 21 indicates the simulation result when any DTCS is not applied under the condition of Figure 20, comparing the performance of the proposed DTCS. Figure 21a is the three-phase currents and Figure 21b is the d-q axis current on the synchronous reference frame.It can be seen the amount of the current decreases, and the harmonic distortions of the current become smaller.This is caused by the fact that as the switch turn off delay T o f f is increased in the low current region.However, when T o f f is in the saturation region sufficiently, there is notable current distortions because the current controller cannot compensate the voltage distortion of high order harmonic distortions.As a result, the proposed DTCS applied three-phase currents has THD below 0.4%.In contrast, the three-phase currents which are not applied DTCS have a 5.4% THD that is about 10 times larger.
by the fact that as the switch turn off delay off T is increased in the low current region.However, when off T is in the saturation region sufficiently, there is notable current distortions because the current controller cannot compensate the voltage distortion of high order harmonic distortions.As a result, the proposed DTCS applied three-phase currents has THD below 0.4%.In contrast, the three-phase currents which are not applied DTCS have a 5.4% THD that is about 10 times larger.

Experimental Results
The experiment to verify the proposed DTCS used three-phase VSI connected with DC-power supply as shown Figure 22.To maximize the effects of dead-time, it applied the only inductors and resistances as a load.Detailed specifications of the experiment environment are summarized in Table 4.

Experimental Results
The experiment to verify the proposed DTCS used three-phase VSI connected with DC-power supply as shown Figure 22.To maximize the effects of dead-time, it applied the only inductors and resistances as a load.Detailed specifications of the experiment environment are summarized in Table 4.
Figures 23-25 show the three-phase currents waveforms and dead-time compensation pole voltage of the a-phase to compare the performance of the proposed DTCS.The three-phase current levels kept around 1.4% of the switch current rating to perform in the region where the effects of the switch parasitic are present.Figure 23 is the three-phase current waveforms without any DTCS, and it can be seen that serious current distortions occurs near the zero crossing and peak area.Figures 23-25 show the three-phase currents waveforms and dead-time compensation pole voltage of the a-phase to compare the performance of the proposed DTCS.The three-phase current levels kept around 1.4% of the switch current rating to perform in the region where the effects of the switch parasitic are present.Figure 23 is the three-phase current waveforms without any DTCS, and it can be seen that serious current distortions occurs near the zero crossing and peak area.Figure 24 illustrates the three-phase current waveforms when a conventional DTCS considering only dead-time T d is adapted.While the compensation voltage amplitudes that does not reflect the variation of T o f f are larger than the actual voltage errors.Hence, it confirmed that the current distortion is due to the excessive compensation voltage.Figure 25 reveals the currents waveforms when the proposed DTCS was applied, which shows very ideal sinusoidal current waveforms even in the low current region where affected by T o f f variation.Figure 29 demonstrates the currents waveforms on the stationary reference frame when the proposed DTCS is applied.The currents waveform on the x-y plot is closer to the ideal circle than the waveforms in Figures 26 and 27.Additionally, the currents waveform in Figure 30 appear closer to the circle than in Figures 27 and 28 but it is impossible to draw the ideal circular waveform as proposed DTCS's.
Figure 31 shows the currents' THDs at various inverter output conditions to compare the performance of the proposed DTCS.The currents' THDs were compared with the magnitude of the peak current and the control frequency, and the THD of the a-phase current was extracted.In Figure 31, the square and circle symbols show the THD when the dead time compensation voltage is not applied and the THD when the compensation voltage considering only d T is applied as shown in Figures 23 and 24, respectively.The triangle symbol is the THD when proposed DTCS is applied.The vertical axis denotes the THD value of the a-phase current and the horizontal axis denotes the peak values of the three-phase current.Figure 29 demonstrates the currents waveforms on the stationary reference frame when the proposed DTCS is applied.The currents waveform on the x-y plot is closer to the ideal circle than the waveforms in Figures 26 and 27.Additionally, the currents waveform in Figure 30 appear closer to the circle than in Figures 27 and 28 but it is impossible to draw the ideal circular waveform as proposed DTCS's.
Figure 31 shows the currents' THDs at various inverter output conditions to compare the performance of the proposed DTCS.The currents' THDs were compared with the magnitude of the peak current and the control frequency, and the THD of the a-phase current was extracted.In Figure 31, the square and circle symbols show the THD when the dead time compensation voltage is not applied and the THD when the compensation voltage considering only d T is applied as shown in Figures 23 and 24, respectively.The triangle symbol is the THD when proposed DTCS is applied.The vertical axis denotes the THD value of the a-phase current and the horizontal axis denotes the peak values of the three-phase current.Figure 29 demonstrates the currents waveforms on the stationary reference frame when the proposed DTCS is applied.The currents waveform on the x-y plot is closer to the ideal circle than the waveforms in Figures 26 and 27.Additionally, the currents waveform in Figure 30 appear closer to the circle than in Figures 27 and 28 but it is impossible to draw the ideal circular waveform as proposed DTCS's.
Figure 31 shows the currents' THDs at various inverter output conditions to compare the performance of the proposed DTCS.The currents' THDs were compared with the magnitude of the peak current and the control frequency, and the THD of the a-phase current was extracted.In Figure 31, the square and circle symbols show the THD when the dead time compensation voltage is not applied and the THD when the compensation voltage considering only T d is applied as shown in Figures 23  and 24, respectively.The triangle symbol is the THD when proposed DTCS is applied.The vertical axis denotes the THD value of the a-phase current and the horizontal axis denotes the peak values of the three-phase current.It can be seen that the current distortion due to the compensating voltage error becomes serious in the low power period where the influence of T o f f becomes very large when the compensation voltage considering only T d is applied, and the current THD gradually decreases as the peak current increases.These results show that the application of the wrong compensation voltage has a greater adverse effect than without.In the case where no DTCS is employed, the THD is low in the low current region since the influence of the dead-time is cancelled out due to the T o f f .However, as the magnitude of the current rises, the influence of T o f f is reduced, so that the current distortion gradually appears.If the current magnitude increases until the duty ratio becomes relatively larger than the dead time ratio, the influence of the dead time is reduced and the current THD is lowered.The proposed DTCS shows much lower current THD in wide-current domains.In particular, applying the real-time adjusted TCV using the on-line TCV controller shows higher performance than a general compensation algorithm in a low-power section.
Figure 32 shows the current THD according to the current control frequency when the proposed DTCS is employed.In Figure 32, it can be seen that the current THD increases as the current control frequency increases, because it cannot synthesize the exact trapezoidal voltage waveform due to the limit of the fixed switching frequency.Therefore, with increased control frequency, the current THD increases due to the imperfect TCV.adverse effect than without.In the case where no DTCS is employed, the THD is low in the low current region since the influence of the dead-time is cancelled out due to the off T .However, as the magnitude of the current rises, the influence of off T is reduced, so that the current distortion gradually appears.If the current magnitude increases until the duty ratio becomes relatively larger than the dead time ratio, the influence of the dead time is reduced and the current THD is lowered.The proposed DTCS shows much lower current THD in wide-current domains.In particular, applying the real-time adjusted TCV using the on-line TCV controller shows higher performance than a general compensation algorithm in a low-power section.
Figure 32 shows the current THD according to the current control frequency when the proposed DTCS is employed.In Figure 32, it can be seen that the current THD increases as the current control frequency increases, because it cannot synthesize the exact trapezoidal voltage waveform due to the limit of the fixed switching frequency.Therefore, with increased control frequency, the current THD increases due to the imperfect TCV.

Conclusions
In this paper, the analysis of the output voltage distortion of the three-phase VSI due to the deadtime and the output capacitor was carried out, and a novel DTCS for compensating the nonlinearly varying voltage distortion was proposed.First, equations and strategies for simplified TCV implementation method were proposed.Secondly, a TCV controller was proposed to control both the magnitude and slope of the TCV according to nonlinearly varying voltage distortion.Finally, the linear output voltage limiting regions of the three-phase VSI when the proposed DTCS is applied were defined and, also the maximum linear phase voltage magnitudes were analyzed to allow

Conclusions
In this paper, the analysis of the output voltage distortion of the three-phase VSI due to the dead-time and the output capacitor was carried out, and a novel DTCS for compensating the nonlinearly varying voltage distortion was proposed.First, equations and strategies for simplified TCV implementation method were proposed.Secondly, a TCV controller was proposed to control both the magnitude and slope of the TCV according to nonlinearly varying voltage distortion.Finally, the linear output voltage limiting regions of the three-phase VSI when the proposed DTCS is applied were defined and, also the maximum linear phase voltage magnitudes were analyzed to allow normal compensation, even at high modulation index (MI).Simulation and experiments were performed to verify the performance of the proposed DTCS, and the settable specifications of the simulation were set equal to the experimental environment.Especially, the dead-time was set as an excessive amount rather than the general condition in both the experiment and simulation to verify the proposed DTCS performance in a severe environment.Experimental results show excellent performance in wide current regions.

Figure 1 .Figure 1 .Figure 2 .
Figure 1.Three-phase VSI and dead-time switching patterns of a-phase leg: (a) Typical three-phase VSI configuration; (b) switching patterns and current flow direction of the one phase leg during the dead-time.

ai 1 Q
direction during the dead-time.When the current direction is positive, the current flows through the body diode 2 D in the lower switch , so that the an v comes to be 2 dc V − .On the other hand, when the current direction is negative, the current flows through the body diode 1 D in the upper switch 1 Q , thus the output an v becomes 2 dc V

Figure 2 .
Figure 2. Effects of the dead-time in Figure 1a ( f sw = 20 kHz, V dc = 100 V, L s = 0.01 mH, R s = 10 Ω); (a) an a-phase pole voltage reference as space vector PWM (SVPWM); (b) comparing dead-time effects with equal voltage reference with (a).

Figure 3 .
Figure 3. Stationary reference frame α β − axis and synchronous reference frame d q − axis with δ .

Figure 3 .
Figure 3. Stationary reference frame α − β axis and synchronous reference frame d − q axis with δ.
presents the dead-time compensation voltage converted to the α β − axis, and Figure 4e shows the dead time compensation voltage on the d-q axis when δ = 0.

Figure 4 .
Figure 4. Dead-time compensation voltage waveforms; (a) a-phase current; (b) average compensation pole voltage (ACPV) of a-phase; (c) the average compensation phase voltage of a-phase; (d) dead-time compensation voltages on stationary reference frame α β −

Figure 4 .
Figure 4. Dead-time compensation voltage waveforms; (a) a-phase current; (b) average compensation pole voltage (ACPV) of a-phase; (c) the average compensation phase voltage of a-phase; (d) dead-time compensation voltages on stationary reference frame α − β axis; (e) dead-time compensation voltages on the synchronous reference frame d − q axis.

2 Cv 1 C i of the upper output capacitor and the discharging current 2 C
arrives at zero.At this time, the current p i can be expressed by the sum of the charging current

Figure 5 .Figure 5 .Figure 6
Figure 5. Charging and discharging process of the output capacitors i p > 0 ; (a) the upper switch is turning on; (b) the upper switch is turning off.

Figure 6
Figure 6 demonstrates that the turn-off delay time off T increases very nonlinearly with current magnitude.The characteristics of these output capacitors indicate that compensation strategies that can be actively controlled by considering switch parasitic components are essential for accurate deadtime compensation in wide current ranges.When the current p

2 Cv 2 CvFigure 6 .
Figure 6.Comparing T eq o f f with T sim o f f .

Figure 5 .Figure 6
Figure 5. Charging and discharging process of the output capacitors ( ) 0 p i > ; (a) the upper switch is turning on; (b) the upper switch is turning off

Figure 6
Figure 6 demonstrates that the turn-off delay time off T increases very nonlinearly with current magnitude.The characteristics of these output capacitors indicate that compensation strategies that can be actively controlled by considering switch parasitic components are essential for accurate deadtime compensation in wide current ranges.When the current p

Figure 8 shows the actual waveform of 2 CvFigure 7 .
Figure 8 shows the actual waveform of 2 C v , which varies with current magnitude, compared

Figure 7 .
Figure 7. Simulation results of Figure 5; (a) gate voltage 1 Q v ; (b) lower output capacitor voltage 2 C v

Figure 8 shows the actual waveform of 2 CvFigure 8 .
Figure 8 shows the actual waveform of 2 C v , which varies with current magnitude, compared

Figure 8 .
Figure 8. Variation of T o f f according to the current i p magnitude (R on = 23.5 Ω R o f f = 23.5 Ω); (a) i p = 170 mA; (b) i p = 250 mA; (c) i p = 330 mA; (d) i p = 600 mA.

Figure 9 .
Figure 9. Detail of the dashed box in Figure 5c.

Figure 10 .
Figure 10.Proposed TCV implementation strategy; (a) triangle waveform function f (t) and sinusoidal waveform function g(t) with peak k; (b) TCV shapes comparison.

Figure 11 .
Figure 11.TCV with slope of the width φ .

Figure 11 .
Figure 11.TCV with slope of the width φ.

Figure 13 .
Figure 13.Analysis of DTCV error characteristics on d-axis; (a) error voltage waveform of d V ; (b) fast Fourier transform (FFT) result of Figure 13a; (c) error voltage waveform of slopes of DTCV; (d) FFT result of Figure 13c.

, i smax V 2 iV
is the magnitude of the MMPV in the ideal voltage region i ℜ and zero voltage vector O during the switching period s

Figure 13 .
Figure 13.Analysis of DTCV error characteristics on d-axis; (a) error voltage waveform of V d ; (b) fast Fourier transform (FFT) result of Figure 13a; (c) error voltage waveform of slopes of DTCV; (d) FFT result of Figure 13c.
in the ideal three-phase VSI can be defined as Equation (38).
function of  on the    axis.Where the maximum three-phase VSI output with six active voltage vectors is ,

Figure 15 .
Figure 15.The current phase  with a-phase voltage reference * as v and a-phase current a i .

Figure 16 
Figure 16 illustrates the distorted three-phase VSI output voltage waveforms , r r v v   on the

Figure 15 .
Figure 15.The current phase ψ with a-phase voltage reference v * as and a-phase current i a .
function of ψ on the α β − axis.Where the maximum three-phase VSI output with six active voltage vectors is ,

Figure 15 .
Figure 15.The current phase ψ with a-phase voltage reference * as v and a-phase current a i .

Figure 16
Figure 16 illustrates the distorted three-phase VSI output voltage waveforms , r r v v α β on the stationary reference frame α β − axis according to the phase ψ .Figure 17 displays , r r v v α β regions on the x-y plot using the waveforms of Figure 16 and Equation (39), and the right side of each voltage region reveals the sector ① in detail for more accurate analysis.

Figure 18 .
Figure 18.The control block diagram of three-phase VSI with proposed DTCS.

Figure 19 Figure 18 .
Figure 19 shows a detailed block diagram of the proposed DTCS of Figure 18a.The TCV contains the position calculating block which calculates and outputs current angles d θ , * d θ and the on-line

Figure 19
Figure 19 shows a detailed block diagram of the proposed DTCS of Figure 18a.The TCV contains the position calculating block which calculates and outputs current angles θ d , θ * d and the on-line TCV controller block which regulates φ, T o f f and outputs the references φ * , T * o f f and compensation voltage calculator block which realizes TCV.

Figure 19 .
Figure 19.The specific block diagram of Figure 18a.

Figure 20 Figure 19 .
Figure 20 demonstrates the simulation results of the proposed DTCV with the above specifications.Figure 20a shows the compensated three-phase current waveforms and Figure 20d displays the compensation voltage on the synchronous reference frame d-q axis.It can be confirmed that the magnitudes of compensation voltages ( ) d g v Δ , ( ) q g v Δ change according to the magnitude of the current vector s I and the fundamental component of the dead-time compensation voltage shifts to d-axis along d-axis current level.Figure 20e presents the position information of the threephase current vector s I using the control position e θ and Equation (21).It can validate that the the magnitude of the current vector s I and the fundamental component of the dead-time compensation voltage shifts to d-axis along d-axis current level.Figure 20e presents the position information of the threephase current vector s I using the control position e θ and Equation (21).It can validate that the position d θ of the s I is changed along d-q axis current amounts.

Figure 20 .
Figure 20.Simulation results of the proposed DTCS; (a) three-phase currents; (b) TCV of the a-phase; (c) d-q axis currents on the synchronous reference frame; (d) DTCV on the synchronous reference frame d-q axis; (e) positions.

Figure 20 .
Figure 20.Simulation results of the proposed DTCS; (a) three-phase currents; (b) TCV of the a-phase; (c) d-q axis currents on the synchronous reference frame; (d) DTCV on the synchronous reference frame d-q axis; (e) positions.

Figure 21 .
Figure 21.Simulation results without DTCS; (a) three-phase currents; (b) d-q axis currents on the synchronous reference frame.

Figure 22 .
Figure 22.Experiment setting; (a) the three-phase VSI; (b) DC-power supply for the DC-link voltage source.

Figure 22 .
Figure 22.Experiment setting; (a) the three-phase VSI; (b) DC-power supply for the DC-link voltage source.

Electronics 2019, 8 ,Figure 23 .
Figure 23.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform without any DTCS.

Figure 24 .
Figure 24.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when conventional DTCS considering only d T was applied.

Figure 23 .Figure 23 .
Figure 23.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform without any DTCS.

Figure 24 .
Figure 24.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when conventional DTCS considering only d T was applied.

Figure 24 .
Figure 24.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when conventional DTCS considering only T d was applied.

Figure 25 .
Figure 25.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when the proposed DTCS was applied.

Figure 26 .
Figure 26.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when DTCS, considering only the proper voltage level, was applied.

Figure 25 .Figure 25 .
Figure 25.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when the proposed DTCS was applied.The Figure 26 displays waveforms for confirming the effects of TCV.The compensating pole voltage in Figure 26 has a rectangle shape, whereas amplitude is equal with Figure 25.Even if it was compensating with proper compensation voltage level, the currents distortions still exist.These experiment results prove that not only the amplitudes but also the slopes of the compensation pole voltages are very important factors for correct dead-time compensation, especially in the low-current region.

Figure 26 .
Figure 26.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when DTCS, considering only the proper voltage level, was applied.

Figure 26 .Figure 27 .
Figure 26.Three-phase currents waveforms and a-phase dead-time compensation pole voltage waveform when DTCS, considering only the proper voltage level, was applied.The Figures 27-30 show α − β axis currents from above three-phase currents and also demonstrate the α − β axis currents on the x-y plot that can compare the distortion of the current more intuitively.The α − β axis current waveform on the x-y plot is closer to the ideal circle, and the more ideal currents.

Figure 28 .
Figure 28.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 24.

Figure 27 .
Figure 27.Stationary reference frame α − β axis and on the x-y plot current waveforms with Figure 23.

Figure 27 .
Figure 27.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 23.

Figure 28 .
Figure 28.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 24.

Figure 28 .
Figure 28.Stationary reference frame α − β axis and on the x-y plot current waveforms with Figure 24.

Figure 29 .
Figure 29.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 25.

Figure 30 .Figure 31 .
Figure 30.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 26.

Figure 29 .Figure 29 .
Figure 29.Stationary reference frame α − β axis and on the x-y plot current waveforms with Figure 25.

Figure 30 .Figure 31 .
Figure 30.Stationary reference frame α β − axis and on the x-y plot current waveforms with Figure 26.

Figure 30 .
Figure 30.Stationary reference frame α − β axis and on the x-y plot current waveforms with Figure 26.

Figure 32 .
Figure 32.Changes of current THD according to frequency change of proposed DTCS.

Figure 32 .
Figure 32.Changes of current THD according to frequency change of proposed DTCS.

Table 2 .
The compensated MMPV c smax V when the proposed DTCS applied.

Table 3 .
The specifications of the simulation.

Table 3 .
The specifications of the simulation.