A Capacitance-to-Time Converter-Based Electronic Interface for Differential Capacitive Sensors

In this paper we present an oscillating conditioning circuit, operating a capacitance-to-time conversion, which is suitable for the readout of differential capacitive sensors. The simple architecture, based on a multiple-feedbacks structure that avoids ground noise disturbs and system calibrations, employs only three Operational Amplifiers (OAs) and a mixer implementing a square wave oscillator that provides an AC sensor excitation voltage. It performs a Period Modulation (PM) and a Pulse Width Modulation (PWM) of the output signal proportionally to the sensor differential capacitance values. The sensor variation range and the detection sensitivity can be easily set through the additional resistors. Preliminary PSpice simulation results have shown a good agreement with theoretical calculations as well as a linear response with a high detection sensitivity of differential capacitive sensors having a baseline in the range [2.2 ÷ 180 pF]. Moreover, different experimental measurements have been also performed by implementing the circuit on a laboratory breadboard using commercial discrete components so validating the idea and providing the circuit performances with different kind of differential capacitive sensors achieving detection resolutions of about 0.1 fF in an overall differential capacitive variation range that is equal to ±15.8 pF. The achieved results demonstrate that the proposed interface solution is suitable for on-chip integration with different kinds of differential capacitive sensing devices, such as Micro-Electro-Mechanical-System (MEMS), force/position, and humidity sensors in biomedical and robotics applications.


Introduction
Recent developments on integration techniques and circuit miniaturizations, together with advances on capacitive sensing technologies, have led to the design of high-sensitivity and small-size devices, like Micro-Electro-Mechanical-System (MEMS), gyroscopes, accelerometers, position/displacement, pressure/force, flow, and humidity sensors having very high detection capabilities that are widely used in robotics/biomedical sensor applications as well as in bioengineering microsystems [1][2][3].Basically, their behavior can be simply described as a planar capacitor (i.e., C = ε•A/d, being ε the relative dielectric constant, A the active surface, and d the distance between capacitor metal plates) whose mechanical features (i.e., A and/or d) are temporarily changed by the physical phenomena to be detected.Furthermore, in several sensory systems, differential capacitive sensing configurations also provide a suitable reduction of the common-mode noise and the parasitic component effects [4][5][6][7][8][9][10][11][12][13][14][15].
In the literature, capacitive sensor interfaces mainly concern Capacitance-to-Voltage (C-V) and Capacitance-to-Time (C-T) analogue conversion techniques [15][16][17][18][19][20][21][22][23][24].In particular, the first topology commonly employs voltage/transimpedance amplifiers, charge/chopper amplifiers, and switched capacitors showing limited/reduced detection ranges, sensitivities, and resolutions mainly due to noise issues.On the contrary, the latter approach is typically based on square wave relaxation oscillators in which the sensing operation is performed by the readout of the output signal period (i.e., a Period Modulation, PM) and/or its duty-cycle (i.e., a Pulse Width Modulation, PWM) as a function of the single/differential sensor capacitance.PM-based interfaces are asynchronous and have a measurement time and a resolution generally dependent from the sensor capacitance.
On the other hand, PWM-based solutions are synchronous circuit needing a clock line to synchronize the interfacing operation, while their measurement time and resolution are typically independent from the sensor capacitance.These kinds of interface solutions, typically showing straightforward architectures with a high tolerance to common-mode noise/disturbs and to parasitic components as well as to supply voltage drifts, allows for covering wide capacitive variation ranges and can also be combined with a digital system to easily measure the time intervals (e.g., through counters) [25][26][27][28][29][30][31][32][33][34].
Recently, also mixed-signal and digital sensor systems are becoming prevalent, so that new topologies of sensor conditioning circuits have been also introduced.By performing a Capacitance-to-Digital (C-D) conversion (sometimes also combined with C-V or C-T conversions), these architectures can be directly interfaced with a microcontroller even if, sometimes, requiring high frequency clock signals to achieve suitable sensitivities and resolutions [35][36][37][38][39][40][41][42].However, most of the developed solutions are mainly suitable to only single element capacitive sensors.On the contrary, often direct differential measurements with high acquisition rate, accuracy, precision, sensitivity, and resolution are required, since two single-element measurements could provide errors if not performed simultaneously due to the time variations of the capacitances owed to the occurring dynamic physical phenomenon.
In this regard, here we propose a new low-cost portable solution of analogue electronic interface circuit performing a C-T conversion that is suitable for differential capacitive sensors with high detection sensitivity and resolution.The developed architecture is based on a relaxation oscillator whose generated square wave signal period and duty-cycle are linearly dependent from the differential capacitance variations combining both the PM and the PWM modulations.Through the setting of few resistor values, it is possible to regulate dynamic range, sensitivity, and resolution of the differential capacitance variation detection.Moreover, it shows a very low sensitivity to common-mode noise and disturbances, as well as to the effects due to the presence of parasitic elements at the circuit sensing nodes.The interface circuit has been designed and preliminary simulated in the OrCAD PSpice environment.Afterwards, after its implementation on a laboratory breadboard employing commercial discrete components, the proposed solution has been tested through experimental measurements confirming the theoretical calculations.In particular, sample components and commercial capacitive sensors have been employed, as well as an ad-hoc liquid level detection system has been fabricated and characterized validating the developed solution and its performances.The block diagram of the conducted research is depicted in Figure 1.
commonly employs voltage/transimpedance amplifiers, charge/chopper amplifiers, and switched capacitors showing limited/reduced detection ranges, sensitivities, and resolutions mainly due to noise issues.On the contrary, the latter approach is typically based on square wave relaxation oscillators in which the sensing operation is performed by the readout of the output signal period (i.e., a Period Modulation, PM) and/or its duty-cycle (i.e., a Pulse Width Modulation, PWM) as a function of the single/differential sensor capacitance.PM-based interfaces are asynchronous and have a measurement time and a resolution generally dependent from the sensor capacitance.On the other hand, PWM-based solutions are synchronous circuit needing a clock line to synchronize the interfacing operation, while their measurement time and resolution are typically independent from the sensor capacitance.These kinds of interface solutions, typically showing straightforward architectures with a high tolerance to common-mode noise/disturbs and to parasitic components as well as to supply voltage drifts, allows for covering wide capacitive variation ranges and can also be combined with a digital system to easily measure the time intervals (e.g., through counters) [25][26][27][28][29][30][31][32][33][34].Recently, also mixed-signal and digital sensor systems are becoming prevalent, so that new topologies of sensor conditioning circuits have been also introduced.By performing a Capacitanceto-Digital (C-D) conversion (sometimes also combined with C-V or C-T conversions), these architectures can be directly interfaced with a microcontroller even if, sometimes, requiring high frequency clock signals to achieve suitable sensitivities and resolutions [35][36][37][38][39][40][41][42].
However, most of the developed solutions are mainly suitable to only single element capacitive sensors.On the contrary, often direct differential measurements with high acquisition rate, accuracy, precision, sensitivity, and resolution are required, since two single-element measurements could provide errors if not performed simultaneously due to the time variations of the capacitances owed to the occurring dynamic physical phenomenon.
In this regard, here we propose a new low-cost portable solution of analogue electronic interface circuit performing a C-T conversion that is suitable for differential capacitive sensors with high detection sensitivity and resolution.The developed architecture is based on a relaxation oscillator whose generated square wave signal period and duty-cycle are linearly dependent from the differential capacitance variations combining both the PM and the PWM modulations.Through the setting of few resistor values, it is possible to regulate dynamic range, sensitivity, and resolution of the differential capacitance variation detection.Moreover, it shows a very low sensitivity to commonmode noise and disturbances, as well as to the effects due to the presence of parasitic elements at the circuit sensing nodes.The interface circuit has been designed and preliminary simulated in the OrCAD PSpice environment.Afterwards, after its implementation on a laboratory breadboard employing commercial discrete components, the proposed solution has been tested through experimental measurements confirming the theoretical calculations.In particular, sample components and commercial capacitive sensors have been employed, as well as an ad-hoc liquid level detection system has been fabricated and characterized validating the developed solution and its performances.The block diagram of the conducted research is depicted in Figure 1.

Materials and Methods
The proposed schematic circuit for differential capacitive sensors interfacing is reported in Figure 2, while Figure 3 shows an example of the time response of the circuit reporting the voltage signals at its main output nodes.This solution, designed with a reduced number of active (three Operational Amplifiers, OAs, and one Mixer) and passive (seven resistors) components, is based on a relaxation oscillator performing a C-T conversion through a closed multiple-feedback loop architecture combining both the PM and the PWM modulations.This avoids any calibration procedure and it reduces ground noise/disturbs (i.e., a very low sensitivity to common-mode noise/disturbs and to parasitic elements), while it allows for an auto-excitation of the differential capacitive sensor through the output AC square waveform.The designed architecture, in fact, intrinsically provides a square wave output (i.e., a "digitalized" output signal), which is independent from the supply voltage, so offering further benefits, such as immunity to voltage offsets and easiness in digital multiplexing and signal processing (e.g., its period and duty-cycle can be easily read by means of digital counters).

Materials and Methods
The proposed schematic circuit for differential capacitive sensors interfacing is reported in Figure 2, while Figure 3 shows an example of the time response of the circuit reporting the voltage signals at its main output nodes.This solution, designed with a reduced number of active (three Operational Amplifiers, OAs, and one Mixer) and passive (seven resistors) components, is based on a relaxation oscillator performing a C-T conversion through a closed multiple-feedback loop architecture combining both the PM and the PWM modulations.This avoids any calibration procedure and it reduces ground noise/disturbs (i.e., a very low sensitivity to common-mode noise/disturbs and to parasitic elements), while it allows for an auto-excitation of the differential capacitive sensor through the output AC square waveform.The designed architecture, in fact, intrinsically provides a square wave output (i.e., a "digitalized" output signal), which is independent from the supply voltage, so offering further benefits, such as immunity to voltage offsets and easiness in digital multiplexing and signal processing (e.g., its period and duty-cycle can be easily read by means of digital counters).

Materials and Methods
The proposed schematic circuit for differential capacitive sensors interfacing is reported in Figure 2, while Figure 3 shows an example of the time response of the circuit reporting the voltage signals at its main output nodes.This solution, designed with a reduced number of active (three Operational Amplifiers, OAs, and one Mixer) and passive (seven resistors) components, is based on a relaxation oscillator performing a C-T conversion through a closed multiple-feedback loop architecture combining both the PM and the PWM modulations.This avoids any calibration procedure and it reduces ground noise/disturbs (i.e., a very low sensitivity to common-mode noise/disturbs and to parasitic elements), while it allows for an auto-excitation of the differential capacitive sensor through the output AC square waveform.The designed architecture, in fact, intrinsically provides a square wave output (i.e., a "digitalized" output signal), which is independent from the supply voltage, so offering further benefits, such as immunity to voltage offsets and easiness in digital multiplexing and signal processing (e.g., its period and duty-cycle can be easily read by means of digital counters).More in detail, the circuit is composed of a voltage integrator where the differential capacitive sensor is connected, two hysteresis voltage comparators that allow for regulating the dynamic range and the detection sensitivity and resolution through the use of seven resistors and a mixer that combine all the information providing an output pulsed signal whose period and duty-cycle depend on the two capacitances C 1 and C 2 of the differential capacitive sensor.In particular, the mixer also allows for reducing the measurement time, since the period of the output pulsed signal V MIX is equal to a semi-period (i.e., a double frequency) of the internal square wave signal V COMP2 generated by the closed loop oscillator composed by the integrator and the two comparators.The mixer, in fact, receives at its input terminals the two square wave signals, V COMP1 and V COMP2 , generating a further square waveform V MIX whose period T 1 (that is half period of V COMP1 and V COMP2 ) and pulse width T 2 (that is the overlapping time between V COMP1 and V COMP2 , when they have both positive or negative values) have to be measured so as to estimate and calculate the capacitance values C 1 and C 2 .Moreover, it is possible to easily set the interface working range (i.e., the sensor variation range) through the employed resistors, which also allow for fixing the desired detection sensitivity of the overall conditioning circuit.
Through a straightforward circuit node analysis, when considering ideal components, the time period T 1 and the pulse width T 2 of the generated output square waveform V MIX can be expressed, as follows: from which (i.e., by inverting them) it is possible to achieve the following relationships to estimate/calculate the two components (i.e., C 1 and C 2 ) of the differential capacitive sensor as a function of the other circuit parameters and the time values T 1 and T 2 : It is worth noting that, since the circuit converts a differential capacitance into a pulsed signal, the initial values of C 1 and C 2 impose the starting oscillating period T 1 and duty-cycle T 2 of the output signal.Nevertheless, through the seven resistors it is possible to change these initial values, even if it acts also on the circuit detection range, sensitivity, and resolution.On the other hand, according to Equations ( 1) and ( 2), T 1 and T 2 are mostly/directly conditioned by resistor R 7 , which mainly regulates the charge/discharge of C 1 and C 2 .Therefore, when dealing with small sensor capacitances (in the range of few pF), R 7 is required to be high in order to set T 1 and T 2 in a range (e.g., in the order of µs or ms), which is more suitable for subsequent signal conditioning/processing stages as well as to optimize/maximize the circuit response/performance (i.e., the detectable capacitive variation range and the detection sensitivity/resolution of the interface circuit).For moderate detection of sensitivities/resolutions and/or high capacitive ranges (in the range of hundreds pF), the value of R 7 can be reduced.Finally, if C 1 = C 2 , the relationship between T 1 and T 2 can be simply expressed, as follows: Moreover, we highlight that the output PWM signal can also be easily converted into a DC voltage signal through a low-pass filtering operation.In this way, the information on the duty-cycle of the output square waveform, also evaluated as the ratio T 2 /T 1 taking into account the effects due to the variation of both the sensor capacitive elements C 1 and C 2 (i.e., the differential variation) is evaluated by extracting the DC level of the output pulsed signal V MIX (i.e., its mean value that is proportional to the differential capacitive sensor variation (C 1 − C 2 )/(C 1 + C 2 )) whose value can be ideally calculated, as follows: being V SAT+ and V SAT− the output saturation levels of the mixer reached by V MIX signal.In this last case, the overall circuit can be consequently classified as a C-V converter.

Simulations
OrCAD PSpice simulations have been preliminary conducted employing low-noise JFET-input TL071 by Texas Instruments as OAs and AD633 by Analog Devices as analog multiplier (i.e., mixer) all being supplied at ±15 V. Different values of the baseline of the differential capacitive sensor have been considered (i.e., C 1 = C 2 = C 0 = 2.2 pF, 10 pF, 100 pF, and 180 pF), so to demonstrate the circuit suitability with different kind of commercial and ad-hoc integrated sensors (with responses linear, hyperbolic, etc.).In Figure 4, the simulation results are reported and compared with the related theoretical values (from Equations ( 1) and ( 2)) of the period T 1 and the pulse width T 2 of output square waveform V MIX as a function of the relative variation the differential capacitive sensor (i.e., 100 showing high linearity (i.e., R 2 = 0.9997) and high sensitivity S (i.e., S T1 = 0.145 ms/pF; S T2 = 0.071 ms/pF).In particular, Figure 4a shows an example of the time response of the circuit when considering the voltage signals at its main nodes for C 1 = 5 pF and C 2 = 15 pF (i.e., considering C 0 = 10 pF and a differential capacitance variation equal to −50%).In addition, Figure 4b reports the T 1 and T 2 time values that were achieved when considering a sensor baseline C 1 = C 2 = C 0 = 10 pF (i.e., the central/initial value) and its relative variation of ±50%, so that the differential capacitance (i.e., C 1 − C 2 ) is changed from −10 pF to +10 pF.In particular, C 1 changes from 5 pF to 15 pF, while C 2 varies from 15 pF to 5 pF with a differential capacitance variation step equal to 2 pF (i.e., each single capacitive element varies in opposite way with a step of 1 pF).Moreover, the reported results have been achieved by setting the circuit resistors, as follows: R

Preliminary Experimental Measurements
Basic experimental measurements have been performed implementing the circuit on a laboratory breadboard employing commercial discrete components as well as capacitive sensors.In this case, the differential capacitance (i.e., C1 − C2) is varied from −15.8 pF to +15.8 pF using commercial Moreover, further simulations have been conducted in order to evaluate the effects on the circuit of operating temperature variations.More in detail, we have considered/referred to commercial and industrial applications, so simulating the circuit from −20 • C up to 85 • C. In particular, referring to the circuit set-up considered for the capacitive variation range of 5-15 pF for C 1 and C 2 , the resulting maximum relative variations of T 1 and T 2 at −20 • C is lower than 0.6%, while at +85 • C it is lower than 9%.These values correspond to maximum relative errors that are lower than 10% at −20 • C and lower than 7% at +85 • C in the estimation of C 1 and C 2 values.

Preliminary Experimental Measurements
Basic experimental measurements have been performed implementing the circuit on a laboratory breadboard employing commercial discrete components as well as capacitive sensors.In this case, the differential capacitance (i.e., C 1 − C 2 ) is varied from −15.8 pF to +15.8 pF using commercial high-precision high-accuracy discrete capacitors, calibrated/measured by using an ISO-TECH LCR821 high-precision high-accuracy LCR-meter (accuracy better than 0.5%) verifying the maximum deviation from the capacitance nominal value lower than 1%.In particular, C 1 has been changed from 2.2 pF to 18 pF (i.e., 2.2 pF, 4.7 pF, 8.2 pF, 10 pF, 12 pF, 15 pF, 18 pF) and C 2 from 18 pF to 2.2 pF (i.e., 18 pF, 15 pF, 12 pF, 10 pF, 8.2 pF, 4.7 pF, 2.2 pF), while keeping constant the total capacitance value C 1 + C 2 at about 20 pF (C 0 = 10 pF).In order to get oscillating periods of few milliseconds and to achieve better results, the following resistance values have been chosen: R 1 = 1 kΩ, R 2 = 1.2 kΩ, R 3 = 15 kΩ, R 4 = 1 kΩ, R 5 = 47 kΩ, R 6 = 1 kΩ, R 7 = 10 MΩ.The parasitic capacitance of the resistors was measured, giving values below 0.5 pF.The resulting measurements of the period T 1 and the pulse width T 2 have been performed while employing a GPIB-based experimental setup and a National Instruments LABVIEW-based automatic acquisition system, including conventional instrumentations, such as a frequency-meter Agilent 34970A (accuracy better than 0.01%), a Data Acquisition/Switch Unit, and digital multimeter Agilent 34401A (accuracy better than 0.01%), as well as an oscilloscope Tektronix TPS2024R.
More in detail, firstly we proved the period and pulse width modulations as a function of the variation of the differential capacitance confirming their proportional linearly dependence.The oscillograms are reported in Figure 5a-c  The overall measurement results are reported in Figure 5d showing the oscillation period T 1 and the pulse width T 2 as function of the differential capacitance variation (i.e., 100 × (C 1 − C 2 )/(C 1 + C 2 )), which are in a good agreement with the theoretical calculations according Equations ( 1) and ( 2) and with the related simulation results achieved with the same operating conditions.In this case, the achieved sensitivities with respect to T 1 and T 2 are S T1 = 0.982 ms/pF and S T2 = 0.491 ms/pF, respectively (linearity correlation coefficient R 2 of about 0.999).On the other hand, taking into account the measured values of T 1 and T 2 , Figure 5e reports on the estimated values of C 1 and C 2 capacitances calculated through the Equations ( 3) and ( 4).The corresponding relative error, evaluated between the measured/estimated capacitance values and its nominal/real values, is lower than 3%.Finally, the maximum averaged RMS jitter level, measured on the rising/falling edges of the output square wave signal V MIX , results to be always lower than 50 ns, so that the resulting estimated minimum detectable differential capacitance variation (i.e., the best theoretical detection resolution of the circuit) is about 0.1 fF.The average power consumption of the overall electronic interface circuit is about 68 mW.
the measured/estimated capacitance values and its nominal/real values, is lower than 3%.Finally, the maximum averaged RMS jitter level, measured on the rising/falling edges of the output square wave signal VMIX, results to be always lower than 50 ns, so that the resulting estimated minimum detectable differential capacitance variation (i.e., the best theoretical detection resolution of the circuit) is about 0.1 fF.The average power consumption of the overall electronic interface circuit is about 68 mW.

Relative Humidity (RH) Sensor
In order to evaluate the potentiality of the proposed circuit as electronic interface in real capacitive sensing applications, we arranged an experimental set-up for the measurement of the Relative Humidity (RH) making use of the commercial capacitive sensor HS1101LF by Sensor Solutions-Measurement Specialties and a climatic chamber Challenge CH600 by ACS-Angelantoni Industries.The employed capacitive sensor provides a nominal capacitance value of about 180 pF @ 55% RH and it can be biased/excited in the operating range [5 kHz-300 kHz] with AC voltage signals up to 10 V.
In this regard, for preliminary setting/testing and optimization of the circuit, we made use of commercial high-precision high-accuracy discrete capacitors, calibrated/measured by using the ISO-TECH LCR821 LCR-meter showing a maximum deviation of lower than 1%.In particular, the capacitor C1 has been fixed to a value equal to 180 pF (i.

Relative Humidity (RH) Sensor
In order to evaluate the potentiality of the proposed circuit as electronic interface in real capacitive sensing applications, we arranged an experimental set-up for the measurement of the Relative Humidity (RH) making use of the commercial capacitive sensor HS1101LF by Sensor Solutions-Measurement Specialties and a climatic chamber Challenge CH600 by ACS-Angelantoni Industries.The employed capacitive sensor provides a nominal capacitance value of about 180 pF @ 55% RH and it can be biased/excited in the operating range [5 kHz-300 kHz] with AC voltage signals up to 10 V.
In this regard, for preliminary setting/testing and optimization of the circuit, we made use of commercial high-precision high-accuracy discrete capacitors, calibrated/measured by using the ISO-TECH LCR821 LCR-meter showing a maximum deviation of lower than 1%.In particular, the capacitor C The overall obtained results are shown in Figure 6.In particular, Figure 6a-c 1) and ( 2), and also with the corresponding simulations performed when considering the same circuit parameters.From these results, the two detection sensitivities ST1 = 0.001 ms/pF and ST2 = 0.0006 ms/pF with respect to T1 and T2, respectively, have been calculated (linearity correlation coefficient R 2 of about 0.999) so as to evaluate/estimate the performances of the circuit, especially in terms of the minimum detection resolution of differential capacitance variations that, in this case, is about 83 fF (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of VMIX, lower than 50 ns).Finally, starting from these results and by employing Equations ( 3) and ( 4), the values of C1 and C2 capacitances have been estimated/calculated, as reported in Figure 6d showing a relative error, evaluated between the measured/estimated capacitance values and its nominal/real values, lower than 0.5 %.
Successively, the C2 capacitor has been replaced by the commercial HS1101LF RH capacitive sensor, so performing through the controlled climatic chamber a sweep in the RH from 35% to 75%, with steps of 5% and room temperature set to 25 °C.The achieved results are reported in Figure 7  2), and also with the corresponding simulations performed when considering the same circuit parameters.From these results, the two detection sensitivities S T1 = 0.001 ms/pF and S T2 = 0.0006 ms/pF with respect to T 1 and T 2 , respectively, have been calculated (linearity correlation coefficient R 2 of about 0.999) so as to evaluate/estimate the performances of the circuit, especially in terms of the minimum detection resolution of differential capacitance variations that, in this case, is about 83 fF (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of V MIX , lower than 50 ns).Finally, starting from these results and by employing Equations ( 3) and ( 4), the values of C 1 and C 2 capacitances have been estimated/calculated, as reported in Figure 6d showing a relative error, evaluated between the measured/estimated capacitance values and its nominal/real values, lower than 0.5 %.
Successively, the C 2 capacitor has been replaced by the commercial HS1101LF RH capacitive sensor, so performing through the controlled climatic chamber a sweep in the RH from 35% to 75%, with steps of 5% and room temperature set to 25 • C. The achieved results are reported in Figure 7 comparing the calculated/estimated RH% with the fixed nominal values as well as with the values that were achieved from direct measurement of the sensor by using the ISO-TECH LCR821 high-precision high-accuracy LCR-meter and extracting the data from sensor datasheet.The reported data have been extracted starting from the measurement of the time period T 1 and the pulse width T 2 as a function of the RH% variation with detection sensitivities of about S T1 = 0.0004 ms/RH% and S T2 = 0.0002 ms/RH% with respect to T 1 and T 2 , respectively.Subsequently, the values of the capacitances C 1 and C 2 have been estimated/calculated by employing Equations ( 3) and (4).Finally, from the information reported in the datasheet of the used commercial capacitive sensor, the RH% values have been extracted employing the reverse polynomial response equation reported in the same device datasheet.In this case, the relative error, evaluated between the measured/estimated values and nominal/real values, is lower than 3% and the minimum estimated detection resolution in terms of the RH% variation is about 0.25% (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of V MIX , lower than 50 ns).
Electronics 2019, 8, x FOR PEER REVIEW 9 of 14 comparing the calculated/estimated RH% with the fixed nominal values as well as with the values that were achieved from direct measurement of the sensor by using the ISO-TECH LCR821 highprecision high-accuracy LCR-meter and extracting the data from sensor datasheet.The reported data have been extracted starting from the measurement of the time period T1 and the pulse width T2 as a function of the RH% variation with detection sensitivities of about ST1 = 0.0004 ms/RH% and ST2 = 0.0002 ms/RH% with respect to T1 and T2, respectively.Subsequently, the values of the capacitances C1 and C2 have been estimated/calculated by employing Equations ( 3) and ( 4).Finally, from the information reported in the datasheet of the used commercial capacitive sensor, the RH% values have been extracted employing the reverse polynomial response equation reported in the same device datasheet.In this case, the relative error, evaluated between the measured/estimated values and nominal/real values, is lower than 3% and the minimum estimated detection resolution in terms of the RH% variation is about 0.25% (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of VMIX, lower than 50 ns).

Liquid Level
Lastly, we developed a liquid level meter, with the aim of evaluating the performance of the proposed electronic interface in real differential capacitance measurement applications.The considered experimental apparatus is depicted in Figure 8.A plexiglas-based cube with a volume lower than 1 ℓ is provided with three Cu-based conductive plates.Two of them are fixed at the top and bottom faces, while the other floats onto the top liquid surface keeping the horizontality through the use of a polystyrene plate fixed under the Cu plate (i.e., the combined plates work like a float).In this way, two complementary (differential) capacitors having a common element (i.e., common plate) are formed: one with liquid (i.e., distilled water) as the dielectric forming the capacitor C1 and the other with the air providing the capacitor C2.

Liquid Level
Lastly, we developed a liquid level meter, with the aim of evaluating the performance of the proposed electronic interface in real differential capacitance measurement applications.The considered experimental apparatus is depicted in Figure 8.A plexiglas-based cube with a volume lower than 1 is provided with three Cu-based conductive plates.Two of them are fixed at the top and bottom faces, while the other floats onto the top liquid surface keeping the horizontality through the use of a polystyrene plate fixed under the Cu plate (i.e., the combined plates work like a float).In this way, two complementary (differential) capacitors having a common element (i.e., common plate) are formed: one with liquid (i.e., distilled water) as the dielectric forming the capacitor C 1 and the other with the air providing the capacitor C 2 .
This apparatus has been employed as differential capacitive sensor measured through the developed interface circuit.More in detail, the distilled water level has been changed from 1 cm to 7 cm, with steps of 1 cm, so moving the common central floating plate that provides a simultaneous variation of C 1 and C 2 capacitance values.Moreover, in order to optimize the interface circuit response, the following resistance values have been considered: R 1 = 1 kΩ, R 2 = 1.2 kΩ, R 3 = 15 kΩ, R 4 = 1 kΩ, R 5 = 47 kΩ, R 6 = 1 kΩ, R 7 = 10 MΩ.The overall experimental measurement results are reported in Figure 8, when considering that the two capacitors C 1 and C 2 have been connected to the circuit both, as depicted in Figure 8 (see results of Figure 9a) and by interchanging their positions/connections (i.e., C 1 used as C 2 , and vice versa; see results of Figure 9b).In particular, by measuring the time period T 1 and the pulse width T 2 values of the circuit main output signal V MIX as a function of the liquid level, the C 1 and C 2 capacitance values have been calculated/estimated through the Equations ( 3) and ( 4) and compared with the capacitive values of the same elements achieved from direct measurements through the ISO-TECH LCR821 high-precision high-accuracy LCR-meter.In this last case, the resulting relative error, as calculated among the obtained experimental data, is always lower than 5%, both for the capacitor with higher values and for the capacitor with lower values.The minimum estimated detection resolution in terms of the liquid level variation is about 0.01 mm (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of V MIX , lower than 50 ns).Additional simulation analyses have been also performed, so demonstrating a low sensitivity to common-mode noise and disturbances as well as, in particular, an excellent immunity to additional parasitic capacitances at the main circuit sensing nodes.More in detail, at each terminal node of the differential capacitive sensor connected to the circuit (i.e., the three main input nodes of the interface), a 10 pF grounded capacitor has been considered and added as an external parasitic component (i.e., as a parasitic capacitance provided by a differential capacitive sensor, as those ones related to the plates of C 1 and C 2 of the box shown in Figure 8).In this sense, referring to the circuit set-up considered for the simulation results reported in Section 3.1, and thus considering the capacitive variation range of 5-15 pF for C 1 and C 2 , the resulting maximum relative variation of T 1 and T 2 is lower than 0.25% that, on the other hand, corresponds to a maximum relative error lower than 8% in the estimation of C 1 and C 2 values.This apparatus has been employed as differential capacitive sensor measured through the developed interface circuit.More in detail, the distilled water level has been changed from 1 cm to 7 cm, with steps of 1 cm, so moving the common central floating plate that provides a simultaneous variation of C1 and C2 capacitance values.Moreover, in order to optimize the interface circuit response, the following resistance values have been considered: R1 = 1 kΩ, R2 = 1.2 kΩ, R3 = 15 kΩ, R4 = 1 kΩ, R5 = 47 kΩ, R6 = 1 kΩ, R7 = 10 MΩ.The overall experimental measurement results are reported in Figure 8, when considering that the two capacitors C1 and C2 have been connected to the circuit both, as depicted in Figure 8 (see results of Figure 9a) and by interchanging their positions/connections (i.e., C1 used as C2, and vice versa; see results of Figure 9b).In particular, by measuring the time period T1 and the pulse width T2 values of the circuit main output signal VMIX as a function of the liquid level, the C1 and C2 capacitance values have been calculated/estimated through the Equations ( 3) and ( 4) and compared with the capacitive values of the same elements achieved from direct measurements through the ISO-TECH LCR821 high-precision high-accuracy LCR-meter.In this last case, the resulting relative error, as calculated among the obtained experimental data, is always lower than 5%, both for the capacitor with higher values and for the capacitor with lower values.The minimum estimated detection resolution in terms of the liquid level variation is about 0.01 mm (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of VMIX, lower than 50 ns).Additional simulation analyses have been also performed, so demonstrating a low sensitivity to common-mode noise and disturbances as well as, in particular, an excellent immunity to additional parasitic capacitances at the main circuit sensing nodes.More in detail, at each terminal node of the differential capacitive sensor connected to the circuit (i.e., the three main input nodes of the interface), a 10 pF grounded capacitor has been considered and added as an external parasitic component (i.e., as a parasitic capacitance provided by a differential capacitive sensor, as those ones related to the plates of C1 and C2 of the box shown in Figure 8).In this sense, referring to the circuit set-up considered for the simulation results reported in Section 3.1, and thus considering the capacitive variation range of 5-15 pF for C1 and C2, the resulting maximum relative variation of T1 and T2 is lower than 0.25% that, on the other hand, corresponds to a maximum relative error lower than 8% in the estimation of C1 and C2 values.

Discussion
As a final remark, Table 1 summarizes the main performances and the experimental characteristics of the proposed circuit compared with other similar solutions presented in the literature having linear responses and based on C-T conversion architectures.As it can be seen, the presented circuit is an analogue solution that manages differential capacitive sensors combining PM and PWM techniques and, even if only implemented on breadboard with discrete commercial components, shows very satisfactory characteristics, especially in terms of high detection sensitivity,

Discussion
As a final remark, Table 1 summarizes the main performances and the experimental characteristics of the proposed circuit compared with other similar solutions presented in the literature having linear responses and based on C-T conversion architectures.As it can be seen, the presented circuit is an analogue solution that manages differential capacitive sensors combining PM and PWM techniques and, even if only implemented on breadboard with discrete commercial components, shows very satisfactory characteristics, especially in terms of high detection sensitivity, good detection range, and minimum detection resolution.

Conclusions
A simple interface circuit, operating a capacitance-to-time conversion by means of an oscillator-based topology, suitable for the readout of differential capacitive sensors has been presented.The multiple-feedback circuit architecture, employing only four active components (three OAs and one mixer) and seven resistors, provides an AC sensor excitation voltage, reduces ground noise disturbs, and avoids system calibrations.By performing a PM and a PWM modulations, the provided output square wave signal results in being linearly proportional to the sensor differential capacitance values.The sensor variation range and the detection sensitivity can be easily set through the employed resistors.PSpice simulations, together with all the experimental measurements, performed by implementing the circuit on a laboratory breadboard and using commercial discrete components, have validated the proposed idea showing a good agreement with theoretical calculations within an overall capacitive variation range that is equal to [2.2 pF-197 pF] and achieving a minimum capacitance detection resolutions as low as 0.1 fF for a differential capacitive variation range equal to ±15.8 pF.Moreover, the simple schematic of the proposed circuit makes it suitable to be designed at the transistor level in a Si-based standard CMOS integrated technology for integrated portable

Figure 1 .
Figure 1.Block diagram of the conducted research.

Figure 1 .
Figure 1.Block diagram of the conducted research.

Figure 2 .
Figure 2. Schematic circuit of the proposed electronic interface for differential capacitive sensors.

Figure 3 .
Figure 3. Example of the time response of the proposed interface evaluating the voltage signals at its main nodes.

Figure 2 . 14 Figure 1 .
Figure 2. Schematic circuit of the proposed electronic interface for differential capacitive sensors.

Figure 2 .
Figure 2. Schematic circuit of the proposed electronic interface for differential capacitive sensors.

Figure 3 .
Figure 3. Example of the time response of the proposed interface evaluating the voltage signals at its main nodes.

Figure 3 .
Figure 3. Example of the time response of the proposed interface evaluating the voltage signals at its main nodes.

Figure 4 .
Figure 4. (a) Example of the time response of the circuit; and, (b) simulation results together with the corresponding theoretical data of the period T1 and the pulse width T2 of output square waveform VMIX as a function of the relative variation the differential capacitive sensor for C1 = C2 = C0 = 10 pF.

Figure 4 .
Figure 4. (a) Example of the time response of the circuit; and, (b) simulation results together with the corresponding theoretical data of the period T 1 and the pulse width T 2 of output square waveform V MIX as a function of the relative variation the differential capacitive sensor for C 1 = C 2 = C 0 = 10 pF.
that demonstrate the proper functionality of the proposed interface circuit showing its main signals (in particular, the generated output square waveform V MIX ) and the corresponding measured values of T 1 (i.e., CH1 Period in the right part of each picture) and T 2 (i.e., CH1 Pos Width in the right part of each picture) for three different sets of C 1 and C 2 values: Figure 5a, C 1 = 2.2 pF and C 2 = 18 pF; Figure 5b, C 1 = C 2 = 10 pF; Figure 5c, C 1 = 18 pF and C 2 = 2.2 pF.

Figure 5 .
Figure 5. Measured main output signals of the circuit for (a) C 1 = 2.2 pF and C 2 = 18 pF, (b) C 1 = C 2 = 10 pF, and (c) C 1 = 18 pF and C 2 = 2.2 pF; (d) measured, simulated and theoretical oscillation periods T 1 and pulse widths T 2 as a function of the relative differential capacitance variation; (e) calculated/estimated capacitance values.
1 has been fixed to a value equal to 180 pF (i.e., C 0 = 180 pF), while performing a sweep of the C 2 capacitance in the variation range [160 pF-197 pF] by means of a fixed 150 pF capacitor in parallel with others having smaller different values (i.e., C 2 = 150 pF + [10 pF; 12 pF; 15 pF; 18 pF; 22 pF; 27 pF; 30 pF; 33 pF; 39 pF; 47 pF]).In this case, the following resistance values have been set so to optimize the interface circuit response: R 1 = 470 Ω, R 2 = 560 Ω, R 3 = 2.2 kΩ, R 4 = 470 Ω, R 5 = 4.7 kΩ, R 6 = 470 Ω, R 7 = 47 kΩ.The employed experimental set-up and measurement instrumentations are those ones already previously reported and described in Section 3.1.The overall obtained results are shown in Figure 6.In particular, Figure 6a-c report the oscillograms showing the circuit main output square waveform V MIX , including the corresponding measured values of the period T 1 (i.e., CH1 Period in the right part of each picture) and the pulse width T 2 (i.e., CH1 Pos Width in the right part of each picture).They demonstrate the proper performances of the circuit for an operating configuration with a fixed value of C 1 = 180 pF and three different values of C 2 : Figure 6a, C 2 = 160 pF; Figure 6b, C 2 = 180 pF; Figure 6c, C 2 = 197 pF.Electronics 2019, 8, x FOR PEER REVIEW 8 of 14 report the oscillograms showing the circuit main output square waveform VMIX, including the corresponding measured values of the period T1 (i.e., CH1 Period in the right part of each picture) and the pulse width T2 (i.e., CH1 Pos Width in the right part of each picture).They demonstrate the proper performances of the circuit for an operating configuration with a fixed value of C1 = 180 pF and three different values of C2: Figure 6a, C2 = 160 pF; Figure 6b, C2 = 180 pF; Figure 6c, C2 = 197 pF.

Figure 6 .
Figure 6.Oscillograms showing the output voltage signal VMIX that demonstrates the proper performances of the circuit for a configuration employing a fixed C1 = 180 pF and (a) C2 = 160 pF, (b) C2 = 180 pF, and (c) C2 = 197 pF; (d) measured, simulated, and theoretical oscillation periods T1 and pulse widths T2 as a function of the relative differential capacitance variation; (e) calculated/estimated capacitance values.

Figure 6 .
Figure 6.Oscillograms showing the output voltage signal V MIX that demonstrates the proper performances of the circuit for a configuration employing a fixed C 1 = 180 pF and (a) C 2 = 160 pF, (b) C 2 = 180 pF, and (c) C 2 = 197 pF; (d) measured, simulated, and theoretical oscillation periods T 1 and pulse widths T 2 as a function of the relative differential capacitance variation; (e) calculated/estimated capacitance values.Furthermore, Figure6dshows the overall measurement results reporting the oscillation period T 1 and the pulse width T 2 as function of the relative capacitance variation (i.e., 100× (C 1 − C 2 )/(C 1 + C 2 ))achieved by changing C 2 in the range [160 pF-197 pF].The collected data confirm the correct functionalities of the interface circuit agreeing with the theoretical calculations, from Equations (1) and (2), and also with the corresponding simulations performed when considering the same circuit parameters.From these results, the two detection sensitivities S T1 = 0.001 ms/pF and S T2 = 0.0006 ms/pF with respect to T 1 and T 2 , respectively, have been calculated (linearity correlation coefficient R 2 of about 0.999) so as to evaluate/estimate the performances of the circuit, especially in terms of the minimum detection resolution of differential capacitance variations that, in this case, is about 83 fF (considering a maximum averaged RMS jitter level, measured on the rising/falling edges of V MIX , lower than 50 ns).Finally, starting from these results and by employing Equations (3) and (4), the values of C 1 and C 2 capacitances have been estimated/calculated, as reported in Figure6dshowing a relative error, evaluated between the measured/estimated capacitance values and its nominal/real values, lower than 0.5 %.Successively, the C 2 capacitor has been replaced by the commercial HS1101LF RH capacitive sensor, so performing through the controlled climatic chamber a sweep in the RH from 35% to 75%, with steps of 5% and room temperature set to 25 • C. The achieved results are reported in Figure7comparing the calculated/estimated RH% with the fixed nominal values as well as with the values that were achieved

Figure 7 .
Figure 7. Experimental results concerning the measurement of RH% performed by employing a commercial capacitive sensor.

Figure 7 .
Figure 7. Experimental results concerning the measurement of RH% performed by employing a commercial capacitive sensor.

14 Figure 8 .
Figure 8. Developed liquid level meter employed as differential capacitive sensor.

Figure 9 .
Figure 9. (a) Experimental results achieved by using the developed liquid level meter as differential capacitive sensor reported in Figure 8, (b) after interchanging C 1 and C 2 .

Table 1 .
Main performance parameters of the proposed circuit as compared to other similar solutions based on C-T conversion.