Choi, Y.C.; Bin, S.; Hwang, K.C.; Lee, K.-Y.; Yang, Y.
23.5–27.5 GHz Band Doherty Power Amplifier Integrated Circuit Using 28 nm Bulk CMOS Process Based on Dynamic Power Dividing Network. Electronics 2024, 13, 4190.
https://doi.org/10.3390/electronics13214190
AMA Style
Choi YC, Bin S, Hwang KC, Lee K-Y, Yang Y.
23.5–27.5 GHz Band Doherty Power Amplifier Integrated Circuit Using 28 nm Bulk CMOS Process Based on Dynamic Power Dividing Network. Electronics. 2024; 13(21):4190.
https://doi.org/10.3390/electronics13214190
Chicago/Turabian Style
Choi, Young Chan, Soohyun Bin, Keum Cheol Hwang, Kang-Yoon Lee, and Youngoo Yang.
2024. "23.5–27.5 GHz Band Doherty Power Amplifier Integrated Circuit Using 28 nm Bulk CMOS Process Based on Dynamic Power Dividing Network" Electronics 13, no. 21: 4190.
https://doi.org/10.3390/electronics13214190
APA Style
Choi, Y. C., Bin, S., Hwang, K. C., Lee, K.-Y., & Yang, Y.
(2024). 23.5–27.5 GHz Band Doherty Power Amplifier Integrated Circuit Using 28 nm Bulk CMOS Process Based on Dynamic Power Dividing Network. Electronics, 13(21), 4190.
https://doi.org/10.3390/electronics13214190