A Dual-Mode Control Scheme to Improve Light Load Efficiency for Active-Clamp Flyback Converter

A novel dual-mode control scheme is proposed in this paper that permits the active-clamp flyback (ACF) converter to operate in both the quasi-resonant (QR) mode under light load and the active-clamp mode under medium or heavy load. The mode transition is performed based on the external dual-mode control circuit. In addition, the proposed converter incorporates a new QR mode valley switching (VS) control circuit that reduces switching loss in the main switch by achieving VS. Under medium to full load, the proposed converter becomes an ACF converter designed to achieve zero-voltage switching (ZVS), which reduces switching losses in both power switches. The proposed dual-mode control ACF converter has the following advantages: (1) compared with conventional ACF converters, the proposed ACF converters minimize switching losses by combining VS and ZVS; (2) under light load conditions, the frequency-limiting QR control mechanism is used to avoid disadvantageous switching losses caused by high switching frequencies. The 65 W ACF converter prototype with a DC 155 V input and a DC 19 V/3.42 A output under 65 kHz switching frequency was implemented. The experimental results demonstrate the feasibility of the proposed control scheme. The efficiency of the proposed converter reached 79% at a load of 3.5 W, which is 11% higher than the conventional ACF converter.


Introduction
The flyback converter architecture, as shown in Figure 1, extended from the buckboost converter, is one of the most popular converters in the power electronics industry. This type of converter is characterized by its simple structure, few components, and easy compliance with electrical isolation safety specifications. Due to the fact of these advantages, flyback architecture is widely used in converters with output power levels less than 100 W such as light-emitting diode (LED) indoor lighting and portable chargers. However, in the transformer of the flyback converter, energy is stored in an air gap in the core. To store enough energy for the transformer, the size of the air gap must be increased with a corresponding increase in the leakage inductance of the transformer, resulting in a voltage spike on the switching device when it is turned off. The snubber circuit is a popular solution for suppressing this voltage spike; however, it lowers converter efficiency.
In recent years, numerous researchers have proposed efficiency improvements for flyback converters. Generally, these improvements can be classified into two major categories: constant-frequency control and variable-frequency control. In constant-frequency control, the active-clamp technique has been widely used in flyback converters. The ACF converter structure and key waveforms are presented in Figure 2a. In this technique, a circuit loop, comprising an auxiliary switch (Q 2 ) and a capacitor (C clamp ), is added at the two terminals on the primary side of the transformer. This loop is used to perform ZVS at the main switch, improving converter efficiency and avoiding the high voltage spikes generated when the main switch is turned off [1][2][3][4][5][6][7]. However, conduction loss caused by resonant circulating current and additional switching in the Q 2 switch induces high power loss under light load [8]. Numerous studies [8,9] have described methods for addressing this drawback. Reference [8] employs a secondary-side post-regulator for minimizing power consumption. Consequently, this method requires an external post-regulator, resulting in a circuit with increased cost and size. In [9], a dual-mode control method was adopted in which the operation mode of the ACF converter was divided into two modes based on the load: the conventional flyback mode and the active-clamp mode. Briefly, the proposed converter works as a conventional flyback converter with the auxiliary switch turning off to decrease the converter's switching and conduction losses under no-load conditions but turns into an ACF converter under normal-load/full-load conditions. However, this method is only effective for reducing the power consumption of the ACF converter under no-load conditions. In categories of variable-frequency control, quasi-resonant (QR) control is the mainstream technique [10][11][12][13][14]. The quasi-resonant flyback (QRF) converter structure and key waveforms are presented in Figure 2b. In the QR control technique, the resonance signal generated by the parasitic capacitance of the switch, C OSS , and the magnetizing inductance of the transformer, L m , are used to turn on the main switch when its drain-source voltage reaches a minimum valley point. Hence, switching loss is significantly reduced. However, this technique cannot achieve ZVS. In recent years, numerous researchers have proposed efficiency improvements flyback converters. Generally, these improvements can be classified into two major ca gories: constant-frequency control and variable-frequency control. In constant-frequen control, the active-clamp technique has been widely used in flyback converters. The A converter structure and key waveforms are presented in Figure 2a. In this technique circuit loop, comprising an auxiliary switch (Q2) and a capacitor (Cclamp), is added at two terminals on the primary side of the transformer. This loop is used to perform ZVS the main switch, improving converter efficiency and avoiding the high voltage spikes g erated when the main switch is turned off [1][2][3][4][5][6][7]. However, conduction loss caused by r onant circulating current and additional switching in the Q2 switch induces high pow loss under light load [8]. Numerous studies [8,9] have described methods for address this drawback. Reference [8] employs a secondary-side post-regulator for minimiz power consumption. Consequently, this method requires an external post-regulator, sulting in a circuit with increased cost and size. In [9], a dual-mode control method w adopted in which the operation mode of the ACF converter was divided into two mo based on the load: the conventional flyback mode and the active-clamp mode. Briefly, proposed converter works as a conventional flyback converter with the auxiliary swi turning off to decrease the converter's switching and conduction losses under no-lo conditions but turns into an ACF converter under normal-load/full-load conditions. Ho Thus, as summarized above, constant-frequency and variable-frequency control have advantages and disadvantages. By combining the advantages of ACF and QRF, a novel dual-mode control scheme combining ZVS and VS is proposed in this paper.
Based on the structure of the ACF converter, in this dual-mode control scheme, an external logic circuit, called a dual-mode switching circuit, is integrated for switching the Thus, as summarized above, constant-frequency and variable-frequency control have advantages and disadvantages. By combining the advantages of ACF and QRF, a novel dual-mode control scheme combining ZVS and VS is proposed in this paper.
Based on the structure of the ACF converter, in this dual-mode control scheme, an external logic circuit, called a dual-mode switching circuit, is integrated for switching the converter to the QR mode under light load adopting VS for the main switch to substantially reduce switching surges. However, the converter operating in the QR mode may cause high switching frequency and increased switching losses. Thus, the frequency-limiting QR control technology is combined to avoid the disadvantage of the increased switching frequency. This technique limits the maximum switching frequency during light load operation to allow the converter to achieve the frequency-limiting function. Under heavy load, the dual-mode switching circuit switches the converter back to the conventional ACF converter (active-clamp mode) to enable both power switches to achieve ZVS to obtain high efficiency. Figure 3 presents the block diagram of the proposed dual-mode control scheme and the related control sequence diagram under different load conditions. The control circuit consists of the current-mode controller UC3843 produced by STMicroelectronics (Geneva, Switzerland), a QR control circuit, and a dual-mode switching circuit. Among these components, the current mode controller UC3843 plays a critical role in stabilizing the output voltage. The QR control circuit and dual-mode switching circuit are the core circuits of the active-clamp and QR modes, respectively, as shown in Figure 3a. The working principle of the control circuit is explained in terms of two states: light load and heavy load.

Light Load
Under light load, the controller proposed in this paper controls the ACF converter operating in the QR mode, and the related control sequence diagram is illustrated in Figure 3b. In this case, the output signal (V C ) of the hysteresis comparator is low; thus, the high-side drive circuit is disabled, turning off the auxiliary switch (Q 2 ) of the converter. At this moment, the feedback voltage signal (V FB ) at the converter output is then compared with the internal reference voltage of the feedback circuit to generate the error signal (V Comp ), which is sent to the current mode controller. The controller processes error signals and generates the control driving signal (V PWM ). Notably, the QR mode controller used in this paper has a mechanism to limit the maximum switching frequency, which is different from the conventional first VS method (as indicated by the red dashed circle in Figure 3b); this mechanism avoids disadvantageous switching losses due to the high switching frequencies.

Heavy Load
When the converter transitions from light to heavy load, the operation mode of the converter is switched from the QR mode to the active-clamp mode by the controller. Figure 3c depicts the related control sequence diagram. At this moment, the magnitude of the error signal (V Comp ) generated by the feedback circuit increases, simultaneously increasing the duty cycle of the drive signal (V PWM ) generated by the current mode controller. Due to the hysteresis comparator output signal (V C ) in this state being high, the high-side drive circuit is enabled. Consequently, the auxiliary switch of the ACF Q 2 is activated in accordance with the drive signal of V Q2 . In other words, the driving signals V Q1 and V Q2 are complementary operation signals.

Light Load
Under light load, the controller proposed in this paper controls the ACF converter operating in the QR mode, and the related control sequence diagram is illustrated in Figure 3b. In this case, the output signal (VC) of the hysteresis comparator is low; thus, the high-side drive circuit is disabled, turning off the auxiliary switch (Q2) of the converter. At this moment, the feedback voltage signal (VFB) at the converter output is then compared with the internal reference voltage of the feedback circuit to generate the error signal (VComp), which is sent to the current mode controller. The controller processes error signals and generates the control driving signal (VPWM). Notably, the QR mode controller used in this paper has a mechanism to limit the maximum switching frequency, which is different from the conventional first VS method (as indicated by the red dashed circle in Figure 3b); this mechanism avoids disadvantageous switching losses due to the high switching frequencies.

Heavy Load
When the converter transitions from light to heavy load, the operation mode of the converter is switched from the QR mode to the active-clamp mode by the controller. Figure 3c depicts the related control sequence diagram. At this moment, the magnitude of the error signal (VComp) generated by the feedback circuit increases, simultaneously increasing the duty cycle of the drive signal (VPWM) generated by the current mode controller. Due to the hysteresis comparator output signal (VC) in this state being high, the high-side drive circuit is enabled. Consequently, the auxiliary switch of the ACF Q2 is activated in accordance with the drive signal of VQ2. In other words, the driving signals VQ1 and VQ2 are complementary operation signals.

The Control Circuit of the Proposed Novel Dual-Mode ACF Converter
This section describes the control circuit of the dual-mode ACF proposed in this paper.

Dual-Mode Switching Circuit
The gray block in Figure 4 is a dual-mode switching circuit. When the converter is operating under light load, the hysteresis comparator output (V C ) is low, since the output voltage of the current sensor (V sense2 ) is less than the reference voltage (V REF ). Therefore, the drive signal (V Q2 ) of the high-side auxiliary switch remains low. The input signal (V pulse ) of the second AND gate (AND2) determines the state of the valley trigger signal (V reset ) because the voltage signal (V C ) becomes high after the NOT gate. The valley trigger signal (V reset ) resets the main controller, which can precisely control the low-side main switch (Q 1 ) to achieve VS and to enable the converter to operate in the QR mode.

The Control Circuit of the Proposed Novel Dual-Mode ACF Converter
This section describes the control circuit of the dual-mode ACF proposed in this paper.

Dual-Mode Switching Circuit
The gray block in Figure 4 is a dual-mode switching circuit. When the converter is operating under light load, the hysteresis comparator output (VC) is low, since the output voltage of the current sensor (Vsense2) is less than the reference voltage (VREF). Therefore, the drive signal (VQ2) of the high-side auxiliary switch remains low. The input signal (Vpulse) of the second AND gate (AND2) determines the state of the valley trigger signal (Vreset) because the voltage signal (VC) becomes high after the NOT gate. The valley trigger signal (Vreset) resets the main controller, which can precisely control the low-side main switch (Q1) to achieve VS and to enable the converter to operate in the QR mode. When the converter is operating under heavy load, the hysteresis comparator output (VC) is high; thus, the output state of the first AND gate (AND1) is determined by the voltage signal, VGS2. At this moment, the high-side auxiliary switch begins to operate. For the second AND gate (AND2), the output voltage signal (Vreset) is low since the signal (VC) When the converter is operating under heavy load, the hysteresis comparator output (V C ) is high; thus, the output state of the first AND gate (AND1) is determined by the voltage signal, V GS2 . At this moment, the high-side auxiliary switch begins to operate. For the second AND gate (AND2), the output voltage signal (V reset ) is low since the signal (V C ) is high, and the main controller is not affected by the reset signal. In this stage, the QR control circuit is disabled, enabling the transition of the converter to the active-clamp mode.

Proposed QR Control Circuit
Before introducing the QR control technique proposed in this paper, the disadvantages of the conventional QRF converter are discussed. Conventional QR control methods rely on the phenomenon of resonance generated by the parasitic capacitance of the main switch and the magnetizing inductance of the transformer to turn on the main switch at the first resonance valley, which can reduce switching loss. However, as the output load increases, the switching frequency also increases, which leads to canceling out the advantages of VS as illustrated in Figure 5. One popular solution to overcome these inadequacies is the use of a frequency-limiting mechanism. In this paper, a control technology similar to that in [13] is adopted in which only pulse signals are used to adjust the maximum frequency of the oscillator. The operating principle of the proposed converter is divided into two parts: the operating principle of the ACF converter operating in the QR mode and the operating principle of the QR control circuit that limits the maximum switching frequency.  The operating principle of the ACF converter operating in the QR mode: The operating principle of the ACF converter in the QR mode is described as follows. This operation mode is divided into three states as shown in Figure 6, and the complete key waveforms are presented in Figure 7. The following assumptions are used to simplify One popular solution to overcome these inadequacies is the use of a frequency-limiting mechanism. In this paper, a control technology similar to that in [13] is adopted in which only pulse signals are used to adjust the maximum frequency of the oscillator. The operating principle of the proposed converter is divided into two parts: the operating principle of the ACF converter operating in the QR mode and the operating principle of the QR control circuit that limits the maximum switching frequency.

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The operating principle of the ACF converter operating in the QR mode: The operating principle of the ACF converter in the QR mode is described as follows. This operation mode is divided into three states as shown in Figure 6, and the complete key waveforms are presented in Figure 7. The following assumptions are used to simplify the analysis: 1.
The main switch (Q 1 ) and the auxiliary switch (Q 2 ) have no leakage current and forward resistance; 2.
The parasitic capacitances, C oss1 and C oss2 , are much smaller than C clamp ; 4.
Non-ideal characteristics, such as the forward voltage drop and the resistance effect of the secondary-side rectifier diode, are ignored; 5.
The output capacitance is large enough to be considered as a constant voltage source; 6.
The turn ratio n = N p /N s . State 1 (t0 ≤ t < t1): When t = t0, the main switch (Q1) is turned on, and the auxiliary switch (Q2) is t off. The input source begins to supply energy to the transformer, and the magne inductor current (ILm) increases linearly. Since the primary and secondary sides transformer have opposite polarity, the output rectifier diode (Do) is reverse-biase output energy is supplied by the output filter capacitor (Co). The detailed current p presented in Figure 6a. For the auxiliary winding on the secondary side of the transfo the voltage VZCD remains low because the voltage VS is less than zero.
State 2 (t1 ≤ t < t2): When t = t1, the main switch (Q1) and the auxiliary switch (Q2) are turned off. A time, the magnetizing inductance (Lm) then begins to charge the parasitic capacitor of the main switch (Q1). As a result, the drain-source voltage (VDS) of Q1 on the pr side of the transformer increases rapidly. When VDS1 ≥ Vin + nVo, the diode, Do, con The energy stored in the transformer is then transferred to the output capacitor an output load. The detailed current path is shown in Figure 6b. For the auxiliary wi on the secondary side of the transformer, the voltage VZCD changes from low to hig to the transient transition of Vs.
State 3 (t2 ≤ t < t3): When t = t2, the energy stored in the transformer has been completely transfer the secondary side, and the current IDo decreases to zero. The converter is thus ope in the discontinuous conduction mode (DCM). The magnetizing inductor (Lm) an parasitic capacitor (Coss1) begin to resonate. The detailed current path is shown in F 6c. In the QR mode, when the voltage drops to the valley, the main switch (Q1) tu State 1 (t 0 ≤ t < t 1 ): When t = t 0 , the main switch (Q 1 ) is turned on, and the auxiliary switch (Q 2 ) is turned off. The input source begins to supply energy to the transformer, and the magnetizing inductor current (I Lm ) increases linearly. Since the primary and secondary sides of the transformer have opposite polarity, the output rectifier diode (D o ) is reverse-biased. The output energy is supplied by the output filter capacitor (C o ). The detailed current path is presented in Figure 6a. For the auxiliary winding on the secondary side of the transformer, the voltage V ZCD remains low because the voltage VS is less than zero.
State 2 (t 1 ≤ t < t 2 ): When t = t 1 , the main switch (Q 1 ) and the auxiliary switch (Q 2 ) are turned off. At this time, the magnetizing inductance (L m ) then begins to charge the parasitic capacitor (C oss1 ) of the main switch (Q 1 ). As a result, the drain-source voltage (V DS ) of Q 1 on the primary side of the transformer increases rapidly. When V DS1 ≥ V in + nV o , the diode, D o , conducts. The energy stored in the transformer is then transferred to the output capacitor and the output load. The detailed current path is shown in Figure 6b. For the auxiliary winding on the secondary side of the transformer, the voltage V ZCD changes from low to high due to the transient transition of V s . State 3 (t 2 ≤ t < t 3 ): When t = t 2 , the energy stored in the transformer has been completely transferred to the secondary side, and the current I Do decreases to zero. The converter is thus operating in the discontinuous conduction mode (DCM). The magnetizing inductor (L m ) and the parasitic capacitor (C oss1 ) begin to resonate. The detailed current path is shown in Figure 6c. In the QR mode, when the voltage drops to the valley, the main switch (Q 1 ) turns on to reduce switching loss. At this time, the output energy is provided to the load by the output filter capacitor (C o ). The auxiliary winding on the secondary side of the transformer is in the resonant state due to the voltage V s , resulting in a square wave signal at the output of the comparator with the same resonant frequency.

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The operating principle of the QR control circuit with the maximum switching frequencylimiting function: This section explains the operating principle of the QR control circuit with the maximum switching frequency-limiting function. Figure 8 depicts the QR control block with the maximum switching frequency-limiting function and related key waveforms. Notably, the circuit only operates when the ACF converter is in the resonant state. When voltage V DS1 resonates through point 0 at t 0 , the voltage V ZCD transiently changes from high to low. After being processed by the RC delay circuit, the voltage V ZCD1 will be delayed for a period ∆t. The falling edge of this square wave may coincide with the valley of the switching voltage V DS . Therefore, the pulse generator and the gain controller can generate an adjustable pulse signal V pulse1 at time t 1 . To control the maximum switching frequency limit, the original oscillator signal (V OSC ) must be obtained from the current mode controller. After processing by the squarer, this signal becomes a triangular signal at the same frequency, V OSC1 . This method is used to accentuate the peak voltage of V OSC . The multiplier is the main focus of this control strategy. The input voltages of the multiplier are V OSC1 and V pulse1 ; thus, the peak value of the output voltage V pulse2 gradually increases. Finally, the voltage V sum is generated by adding V OSC1 to V pulse2 . As the number of resonances increases, the peak value of V sum also increases. When the voltage value of V sum is higher than the reference voltage V TH of comparator CMP1 at t 2 , the output signal V reset of CMP1 triggers the current mode controller to reset the oscillator. This technique enables the converter to achieve maximum switching frequency limiting. Thus, controlling the magnitude of the reference voltage V TH determines the valley point of the converter. This section explains the operating principle of the QR control circuit with the maximum switching frequency-limiting function. Figure 8 depicts the QR control block with the maximum switching frequency-limiting function and related key waveforms. Notably, the circuit only operates when the ACF converter is in the resonant state. When voltage VDS1 resonates through point 0 at t0, the voltage VZCD transiently changes from high to low. After being processed by the RC delay circuit, the voltage VZCD1 will be delayed for a period Δt. The falling edge of this square wave may coincide with the valley of the switching voltage VDS. Therefore, the pulse generator and the gain controller can generate an adjustable pulse signal Vpulse1 at time t1. To control the maximum switching frequency limit, the original oscillator signal (VOSC) must be obtained from the current mode controller. After processing by the squarer, this signal becomes a triangular signal at the same frequency, VOSC1. This method is used to accentuate the peak voltage of VOSC. The multiplier is the main focus of this control strategy. The input voltages of the multiplier are VOSC1 and Vpulse1; thus, the peak value of the output voltage Vpulse2 gradually increases. Finally, the voltage Vsum is generated by adding VOSC1 to Vpulse2. As the number of resonances increases, the peak value of Vsum also increases. When the voltage value of Vsum is higher than the reference voltage VTH of comparator CMP1 at t2, the output signal Vreset of CMP1 triggers the current mode controller to reset the oscillator. This technique enables the converter to achieve maximum switching frequency limiting. Thus, controlling the magnitude of the reference voltage VTH determines the valley point of the converter.

Design of the Proposed Novel Dual-Mode ACF Converter
The converter structure and operating principles have been described in detail in the previous section. This section describes the design of the proposed dual-mode ACF converter. A 65 W power supply is used in the following example calculations and the description of the component design of the converter. The specifications of the prototype converter are listed in Table 1.

Design of the Proposed Novel Dual-Mode ACF Converter
The converter structure and operating principles have been described in detail in the previous section. This section describes the design of the proposed dual-mode ACF converter. A 65 W power supply is used in the following example calculations and the description of the component design of the converter. The specifications of the prototype converter are listed in Table 1.
In the following, the design procedure of the converter is briefly presented.
Step 1: Given that the maximum output power P o,max = 65 W and the efficiency η = 0.9, the magnetizing inductance (L m ) of the transformer can be determined [15]: Step 2: After the magnetizing inductance (L m ) of the transformer is known, the peak current of the transformer primary side winding can be calculated: Step 3: The maximum output power (P o,max ) of the converter is 65 W, and the switching frequency is 65 kHz. In this paper, the PQ26/20 iron core produced by TDK (Tokyo, Japan) was used to calculate the primary winding turns of the transformer. Based on the actual design considerations, the magnetizing inductance (L m ) is 400 µH. From the core datasheet, the effective cross-sectional area of the core (A e ) is 1.19 cm, and the maximum magnetic flux density (B max ) is 2000 G. The primary winding turns of the transformer (N p ) can be calculated as follows: Step 4: The secondary winding turns (N s ) can also be calculated: Step 5: The output diode must be selected considering the maximum output current and the withstand voltage. The withstand voltage and withstand current of the diode are calculated as follows: I sec,peak = I L,peak × n ∼ = 13.22 A (6) In accordance with the results of Equations (5)-(7), the ultrafast rectifier diode BYV32E-150 produced by NXP Semiconductors (Eindhoven, Netherlands) was selected as the output rectifier diode with a peak reverse voltage of 150 V and a peak forward current of 20 A.
Step 6: To achieve ZVS for the ACF converter power switch, enough energy must be stored in the resonant inductance (L r ) to completely discharge the parasitic capacitance (C r ) of the power switch; the calculations of this energy are as follows: where E Lr and E Cr are resonant inductance energy and parasitic capacitance energy, respectively.
Step 7: After the resonant inductance has been determined, the appropriate value of the clamping capacitor (C clamp ) can be calculated as follows:

Experimental Results
In this experiment, the control IC UC3843 was used as the main controller. The proposed dual-mode ACF converter had the following specifications: the input voltage was 155 VDC, the output voltage was 19 VDC, and the maximum output power was 65 W. The experimental data included the measured critical switching waveforms, control signal waveforms, dual-mode switching waveforms, ZVS waveforms, and other key parameters. Finally, the comparison of efficiency between the conventional ACF converter and the proposed dual-mode ACF converter is presented in this section. The slope shape of the oscillator waveform is critical for the control technique proposed in this paper, because more precise slope changes result in more accurate VS. Generally, the traditional oscillator is an RC circuit; thus, the slightly curved slope causes the failure of frequency-limited VS. To overcome this challenge, a squarer was used to convert the oscillator waveform into a triangular waveform with a linear slope, improving the accuracy of VS. The relevant waveform is presented in Figure 9.

Experimental Results
In this experiment, the control IC UC3843 was used as the main controller. T posed dual-mode ACF converter had the following specifications: the input volta 155 VDC, the output voltage was 19 VDC, and the maximum output power wa The experimental data included the measured critical switching waveforms, contro waveforms, dual-mode switching waveforms, ZVS waveforms, and other key para Finally, the comparison of efficiency between the conventional ACF converter a proposed dual-mode ACF converter is presented in this section. The slope shape oscillator waveform is critical for the control technique proposed in this paper, b more precise slope changes result in more accurate VS. Generally, the traditional os is an RC circuit; thus, the slightly curved slope causes the failure of frequency-limi To overcome this challenge, a squarer was used to convert the oscillator waveform triangular waveform with a linear slope, improving the accuracy of VS. The r waveform is presented in Figure 9.  Figure 10a shows that when the voltage VDS1 voltage starts to resonate gener valley, a voltage pulse signal is generated. Through the multiplier, a linearly rising pulse signal Vpulse2 is then generated. Next, the oscillating voltage signal VOSC1 and th age signal Vpulse2 are added by the adder to generate the voltage signal Vsum. Fina voltage signal Vsum is compared with the reference voltage VTH to generate a reset signal Vreset, which restarts the control IC UC3843 to complete the frequency-limi as shown in Figure 10b. In other words, the voltage level of the reference voltage termines the VS point, and higher VTH values cause a slower system switching freq Conversely, lower VTH causes a faster system switching frequency.  Figure 10a shows that when the voltage V DS1 voltage starts to resonate generating a valley, a voltage pulse signal is generated. Through the multiplier, a linearly rising voltage pulse signal V pulse2 is then generated. Next, the oscillating voltage signal V OSC1 and the voltage signal V pulse2 are added by the adder to generate the voltage signal V sum . Finally, the voltage signal V sum is compared with the reference voltage V TH to generate a reset voltage signal V reset , which restarts the control IC UC3843 to complete the frequency-limiting VS as shown in Figure 10b. In other words, the voltage level of the reference voltage V TH determines the VS point, and higher V TH values cause a slower system switching frequency. Conversely, lower V TH causes a faster system switching frequency.  Figure 11 presents the key voltage waveforms of the converter operating at different output powers. If the converter operates was at an output power of 6.5 W, the switching frequency of the converter was approximately 70 kHz as presented in Figure 11a. For an output power of 19.5 W, the switching frequency of the converter decreased to approximately 68 kHz as presented in Figure 11b. Although the output power of the converter varied, the switching frequency of the circuit can be limited within a fixed range by the frequency-limiting QR control function of the QR control circuit proposed in this paper. If the output power increased above 19.5 W, the converter changed the operation mode from the QR to the active-clamp mode as presented in Figure 12. Figure 13 shows the ZVS waveforms of the power switches of the proposed converter. The figure shows that before the main switch (Q1) was turned on, the drain-source voltage of the main switch VDS1 decreased to zero. The same principle was applied to the auxiliary switch (Q2); thus, both power switches achieved ZVS.  Figure 11 presents the key voltage waveforms of the converter operating at different output powers. If the converter operates was at an output power of 6.5 W, the switching frequency of the converter was approximately 70 kHz as presented in Figure 11a. For an output power of 19.5 W, the switching frequency of the converter decreased to approximately 68 kHz as presented in Figure 11b. Although the output power of the converter varied, the switching frequency of the circuit can be limited within a fixed range by the frequency-limiting QR control function of the QR control circuit proposed in this paper. If the output power increased above 19.5 W, the converter changed the operation mode from the QR to the active-clamp mode as presented in Figure 12. Figure 13 shows the ZVS waveforms of the power switches of the proposed converter. The figure shows that before the main switch (Q 1 ) was turned on, the drain-source voltage of the main switch V DS1 decreased to zero. The same principle was applied to the auxiliary switch (Q 2 ); thus, both power switches achieved ZVS.  Figure 11 presents the key voltage waveforms of the converter operating at different output powers. If the converter operates was at an output power of 6.5 W, the switching frequency of the converter was approximately 70 kHz as presented in Figure 11a. For an output power of 19.5 W, the switching frequency of the converter decreased to approximately 68 kHz as presented in Figure 11b. Although the output power of the converter varied, the switching frequency of the circuit can be limited within a fixed range by the frequency-limiting QR control function of the QR control circuit proposed in this paper. If the output power increased above 19.5 W, the converter changed the operation mode from the QR to the active-clamp mode as presented in Figure 12. Figure 13 shows the ZVS waveforms of the power switches of the proposed converter. The figure shows that before the main switch (Q1) was turned on, the drain-source voltage of the main switch VDS1 decreased to zero. The same principle was applied to the auxiliary switch (Q2); thus, both power switches achieved ZVS.   Figure 14 presents the key waveforms for switching between the two modes of the converter according to the change in output power when the input voltage V in = 155 VDC. If the output power was 6.5 W, the driving signal V GS2 of the auxiliary switch (Q 2 ) was off, and the driving signal V GS1 of the main switch (Q 1 ) adjusted the pulse width modulation in accordance with the load. At this time, the converter operated in the QR mode. If the output power increased from 6.5 to 65 W, the drive signal V GS2 of the auxiliary switch (Q 2 ) entered a working state, and the main switch (Q 1 ) and the auxiliary switch (Q 2 ) operated in a complementary manner to enable the converter to operate in the active-clamp mode as presented in Figure 14a. By contrast, if the output power decreased from 65 to 6.5 W, the driving signal V GS2 of the auxiliary switch (Q 2 ) changed from the working state to the off state, and the operation mode of the converter changed from the active-clamp mode to the QR mode as shown in Figure 14b. These experimental data demonstrated that the converter proposed in this paper can switch between the two modes.  Figure 14 presents the key waveforms for switching between the two mo converter according to the change in output power when the input voltage Vin = If the output power was 6.5 W, the driving signal VGS2 of the auxiliary switch (Q and the driving signal VGS1 of the main switch (Q1) adjusted the pulse width m  Figure 14 presents the key waveforms for switching between the two m converter according to the change in output power when the input voltage Vin If the output power was 6.5 W, the driving signal VGS2 of the auxiliary switch (Q and the driving signal VGS1 of the main switch (Q1) adjusted the pulse width m   Table 2 presents the efficiency measurement data for the dual-mode ACF converter. In the table, input current, output current, output voltage, and efficiency are presented under different load conditions with a voltage of 155 VDC as the input power supply. Figure 15 provides a comparison of the efficiency curves of the conventional ACF converter and the dual-mode ACF converter at different output power levels. The curve comparison diagram reveals that for an output power of 3.5 W, the efficiency difference between the two converters is at a maximum of 11%. If the output load increases, conduction losses gradually increase; thus, the efficiency difference between the two converters decreases. Table 2 and Figure 15 show that the control technique proposed in this paper has good performance under light load conditions. In addition, Table 3 presents the load regulation measurement data. Based on the measurement results, it can be seen that the minimum load regulation value is 1.09% at the output power of 65 W (i.e., full load).   Table 2 presents the efficiency measurement data for the dual-mode ACF converter. In the table, input current, output current, output voltage, and efficiency are presented under different load conditions with a voltage of 155 VDC as the input power supply. Figure 15 provides a comparison of the efficiency curves of the conventional ACF converter and the dual-mode ACF converter at different output power levels. The curve comparison diagram reveals that for an output power of 3.5 W, the efficiency difference between the two converters is at a maximum of 11%. If the output load increases, conduction losses gradually increase; thus, the efficiency difference between the two converters decreases. Table 2 and Figure 15 show that the control technique proposed in this paper has good performance under light load conditions. In addition, Table 3 presents the load regulation measurement data. Based on the measurement results, it can be seen that the minimum load regulation value is 1.09% at the output power of 65 W (i.e., full load).   Figure 15. Efficiency curves of the conventional ACF converter and dual-mode ACF converters at different output powers.

Conclusions
This paper presented a new dual-mode switching control strategy for the ACF converter working in DCM, which can switch to the QR mode at light loads to improve overall efficiency. This paper proposed a new dual-mode switching control strategy for an ACF converter operating in DCM to enable operation in the QR mode under light load to optimize the overall operation. The control techniques and operating principles were described in detail. The operating principles and the results of an analysis of the control techniques were carefully discussed. A prototype of the 65 W dual-mode ACF converter was developed, and experiments provided satisfactory results. Experimental results revealed that the auxiliary switch of the resonant tank closed when the dual-mode ACF converter was under light load, which enabled the main switch to perform VS and achieve QR mode control. On the contrary, the converter operated in the active-clamp mode under medium and heavy load conditions, thereby achieving ZVS for both power switches to maintain the high efficiency of conventional ACF. In other words, the proposed dualmode ACF converter uses QR mode VS characteristics to improve the poor efficiency of conventional ACF under light load. However, the switching frequency of the QR mode is

Conclusions
This paper presented a new dual-mode switching control strategy for the ACF converter working in DCM, which can switch to the QR mode at light loads to improve overall efficiency. This paper proposed a new dual-mode switching control strategy for an ACF converter operating in DCM to enable operation in the QR mode under light load to optimize the overall operation. The control techniques and operating principles were described in detail. The operating principles and the results of an analysis of the control techniques were carefully discussed. A prototype of the 65 W dual-mode ACF converter was developed, and experiments provided satisfactory results. Experimental results revealed that the auxiliary switch of the resonant tank closed when the dual-mode ACF converter was under light load, which enabled the main switch to perform VS and achieve QR mode control. On the contrary, the converter operated in the active-clamp mode under medium and heavy load conditions, thereby achieving ZVS for both power switches to maintain the high efficiency of conventional ACF. In other words, the proposed dual-mode ACF converter uses QR mode VS characteristics to improve the poor efficiency of conventional ACF under light load. However, the switching frequency of the QR mode is critical to determining the light load efficiency. In general, it is recommended to design the QR mode switching frequency as close to the active-clamp mode switching frequency as possible, because excessively high switching frequencies increase switching losses at light loads. This proposed dual-mode control ACF topology is suitable for applications with relatively low power consumption (under 200 W).