Volatile Memristor in Leaky Integrate-and-Fire Neurons: Circuit Simulation and Experimental Study

: In this paper, circuit implementation of a leaky integrate-and-ﬁre neuron model with a volatile memristor was proposed and simulated in the SPICE simulation environment. We demonstrate that simple leaky integrate-and-ﬁre (LIF) neuron models composed of: volatile memristor, membrane capacitance and neuron resistance can mimic spatial and temporal integration, ﬁring function and signal decay. The existing leaky term originates from the recovery of the initial resistive state in the memristor in the spontaneous reset cycle, which is essential for emulating the forgetting process in all-memristive neural networks (MNNs). Furthermore, a diffusive perovskite memristor was used to validate the model where intrinsic memristors’ capacitance acts as neuron membrane capacitance. Good agreement with experimental and simulation results was observed. Volatility, as an inherent property of speciﬁc memristors, eliminates the need for usage of an additional peripheral circuit which will reinitialize device state, thus allowing the development of energy-efﬁcient, large scale complex memristive neural networks. The presented circuit level model of LIF neurons can facilitate the design of MNNs. dynamic: spatiotemporal integration task, ﬁring function and leakage, i.e., forgetting functionality. The neuron model can also illustrate the inﬂuence of neuron resistance (synaptic weight) and membrane capacitance on ﬁring behaviour and integration time. Veriﬁcation was performed through comparison with an experimental study using Pt/BaTiO 3 /Pt diffu-sive/volatile memristor. In a physical LIF circuit, the intrinsic capacitance of the diffusive memristor is utilized as an integration element. Results show good agreement between model and experimental study for both resistance decay rate of volatile memristor itself and ﬁring behaviour of LIF circuit. Demonstrated SPICE simulation of LIF allows decoupling of individual component inﬂuence of spiking behaviour and contributes to the enhancement of design of complex memristive neuromorphic architectures. Author Contributions: Conceptualization, N.M.S. and S.D.; methodology, N.M.S. and D.L.S.; soft-ware, N.M.S.; validation, N.M.S., J.S.B. and S.D.; investigation, N.M.S., D.L.S. and S.D.; resources, N.M.S., S.D. and J.S.B.; data curation, N.M.S. and J.S.B.; writing—original draft preparation, N.M.S., J.S.B., S.D. and D.L.S.; writing—review and editing, N.M.S., J.S.B., S.D. and D.L.S.; visualization, D.L.S., J.S.B. and N.M.S.; supervision, S.D. All authors have read and agreed to the published version of the manuscript.

On the other hand, the leaky integrate-and-fire model (LIF), is the most commonly used neuron model in spiking neural networks, [4,14], due to its simple realization, with the ability to perform the following essential neuron functionalities: signal integration, firing function and decay of local gradient potential (LGP). Memristive LIF neurons may require additional peripheral circuits: Schmitt trigger-based amplifier-STBA [15], comparator, and pulse generator [16] depending on the properties of memristor itself, which should discharge the capacitor, the element that mimics neural membrane capacitance, and reset the memristor state.
Recently, an all-memristive neural network was presented with a simple memristive LIF neuron circuit and additional membrane capacitance and axon resistance, where leaky functionality was realized using volatility in diffusive memristor, while drift memristor was used in a synaptic circuit composed of one memristor and one transistor (1M-1T) [17].
Although the volatile characteristics of memristors' response were considered originally as unwanted, they have become more interesting recently due to the valuable feature, specifically useful in advanced neuromorphic architectures [17][18][19], selectors [20], in security applications as random generators [21], etc. Volatile memristors can be included either as part of a neuron cell circuit of a memristive neural network [17] or in combination with a non-volatile drift memristor for emulation of synaptic activity [18].
Aiming to standardize the characterization techniques, novel experimental protocols have been proposed recently [22], revealing some of the following effects: number of programming pulses, programming amplitude, polarity, overall input energy on resistive RAM (ReRAM) relaxation response. Available literature reports on the existence of both metastable-volatile and stable-non-volatile states within the same memristive device, dependent on the electrical potential gradient and device history [22,23].
Furthermore, a modelling methodology that accounts for bidirectional volatility was presented in [24], predicting a transient change of memristance through the data-driven analytical approach. In a recent study [25], physical models of the filamentary type of volatile resistive switching devices were presented accounting for Ag nanoparticles motion, which defines disruption and formation of the filament. This model is numerical and based on Monte Carlo simulations and molecular dynamics, whereas the same group of authors presented the analytical model [26], also for volatile memristors confirmed through measurement of ac characteristics and filament disruption dynamics. Application of this physical-based model as ReRAM synapse is demonstrated consisting of a single volatile and non-volatile memristor, mimicking short-term memory effect. Other physical models of volatile/diffusive memristors are also available and based on: electrical, mechanical, thermal effects and electrochemical reaction on filament dynamics [17,18]. Starting from the circuit-level SPICE model, which incorporates both non-volatile and volatile effects in memristor [23], in this paper we included our new window function [27,28] in the memristor's model. The memristor's model was then used in the SPICE simulation of a simple LIF artificial neuron circuit for all-memristive neural networks. Numerical results show that the model can mimic spatial-temporal integration, firing function and leaky functionality of a biological neuron. Results of conducted simulations were verified through carried out experiment on perovskite Pt/BaTiO 3 /Pt diffusive thin film memristor due to the fact that perovskite materials have already proven as good candidates for an active material in diffusive memristors [16]. For the realization of the LIF circuit, internal capacitance of memristor was used to mimic membrane capacitance in a biological neuron and shunt resistor was used as neuron resistance. A good agreement between numerical and experimental findings was observed. As far as our knowledge, this is the first circuit-based SPICE model of simple LIF neuron with volatile memristor which can be used in all-memristive neural networks. Validation of the proposed model was performed by comparison of simulated and experimental results obtained as a response of perovskite volatile memristor in the LIF neuron circuit. This circuit model of LIF neuron allows decoupling of memristive and capacitive influence of neuron response, without the usage of additional optimization tools, such as genetic algorithm [15], and can be potentially used for simulation of complex large memristive neural networks.

Materials and Methods
Simulations of volatile memristor and leaky integrate-and-fire artificial neuron circuits were performed in the SPICE simulating environment (LTspice version). Pt/BaTiO 3 /Pt (BTO) diffusive/volatile memristors were fabricated by spin-coating deposition technique of stable precursor solutions [29], on silicon substrate coated with platinum Pt(~150 nm)/ TiO 2 (~40 nm)/SiO 2 (500 nm) (Vin Karola Instruments, Norcross, GA, USA). Top Pt electrode Electronics 2022, 11, 894 3 of 13 (~100 nm) was deposited by sputtering (LeyboldHeraeusL560Q) on BTO (~100 nm) film. The dynamical response of the LIF circuit was experimentally studied with a measurement setup consisting of NI USB 6351 data acquisition card (National instruments, Austin, TX, USA) and SDG1025 arbitrary waveform generator (Siglent Technologies). SDG1025 is used to supply predefined waveforms to the LIF circuit, while NI USB 6351 is used for the measurement of memristor current and voltage. Memristor current was calculated based on the voltage drop measured across the series resistor (resistor is utilized as a shunt or current sensing resistor). The LabVIEW virtual instrument is designed for simultaneous control of the waveform generator and data acquisition card. Timing characteristic and relaxation time were estimated using Keithley 2410 High-Voltage Source Meter (Tektronix) also controlled with LabVIEW, while frequency analysis of capacitance was performed using Hioki IM3590 impedance analysed (HiokiE.E. Corporation, Nagano, Japan) in frequency range from 1 Hz-100 Hz using the equivalent circuit of parallel connection between capacitor and resistor. Electrical measurements were performed at room temperature in laboratory conditions.

Simulation of LIF Neuron with Volatile Memristor
Starting from the reported SPICE model which can incorporate memristor volatility [23], we included our new window function where parameter N corresponds to parameter p of original Joglekar [30] and Prodromakis [31] window functions. The properties of novel window functions compared to other window functions most often used in literature are listed in Table 1.  In addition to the properties listed in Table 1, the novel window function f N (x) has the first 2N − 1 consecutive derivatives equal to zero at x = 1/2. Since f N (1/2) = 1 and f N (x) ≤ 1, it follows that f N (x) has flattened maximum at x = 1/2. The function f N (x) is shown in Figure 1a for N = 1 ∼ 10. Based on the results from [27], the specific advantage of the proposed novel window function is the possibility to determine exact closed-form analytical solutions, expressing the dependence of the charge q (flux ϕ) on the state variable x, in the case of the used model of memristor: In this way, when our model is used in numerical simulations, we do not have to numerically solve the state equation / = ( ) . Instead, for current-controlled (voltage-controlled) memristor, from ( ) ( ( )) we obtain ( ) ( ( )), and for each value of the charge q (flux φ) we can numerically solve nonlinear algebraic equation ( ) ( ( )) by x, and substitute this x in the state-dependent Ohm's law of memristor ( ) = ( ) ( ) ( ) = ( ) ( ) . With respect to the monotonicity of the functions ( ) and ( ), there exists only one solution ∈ (0,1) in both cases. The influence of the window function on current-voltage characteristics is presented in Figure 1b. The model of the volatile memristor is composed of four cells: terminal cell, x-module, y-module and z-module, which realize coupled differential equations [23]. Terminal cell of the model as originally proposed by Biolek [32], brings the well-known currentvoltage relation of memristors: where ( ) and ( ) represent memristor voltage and current, respectively. Resistance ( ) depends on state variable and values of High Resistance State, HRS, and Low Resistance State : Additional module cells: x, y and z are composed of controlled current and voltage sources, used to implement coupling between differential equations, resistors and capacitors ( , , , , ), which determine the rate of volatile and non-volatile switching, time constant and leaky function. For more details see [23]. It is important to note that parameters of module cell x, y and z as well as the cell circuit itself, do not have physical interpretation and are only used to implement corresponding differential equations [23,35]. In this paper, we modified the equation for the current of controlled sources using a new window function ( ), therefore obtaining the following form for the x-cell controlled current source: In this way, when our model is used in numerical simulations, we do not have to numerically solve the state equation dx/dt = k f (x)i. Instead, for current-controlled (voltage-controlled) memristor, from i(t) (u(t)) we obtain q(t) (ϕ(t)), and for each value of the charge q (flux ϕ) we can numerically solve nonlinear algebraic equation . With respect to the monotonicity of the functions q(x) and ϕ(x), there exists only one solution x ∈ (0, 1) in both cases. The influence of the window function on current-voltage characteristics is presented in Figure 1b.
The model of the volatile memristor is composed of four cells: terminal cell, x-module, y-module and z-module, which realize coupled differential equations [23]. Terminal cell of the model as originally proposed by Biolek [32], brings the well-known current -voltage relation of memristors: where v M (t) and i M (t) represent memristor voltage and current, respectively. Resistance R M (x) depends on state variable x and values of High Resistance State, HRS, R OFF and Low Resistance State R ON : Additional module cells: x, y and z are composed of controlled current and voltage sources, used to implement coupling between differential equations, resistors and capacitors (R x , C x , C y , R z , C z ), which determine the rate of volatile and non-volatile switching, time constant and leaky function. For more details see [23]. It is important to note that parameters of module cell x, y and z as well as the cell circuit itself, do not have physical interpretation and are only used to implement corresponding differential equations [23,35]. In this paper, we modified the equation for the current of controlled sources using a new window function f N (x), therefore obtaining the following form for the x-cell controlled current source: where µ V stands for dopant mobility, and D represents the thickness of the active layer. The controlled current source in y-cell is obtained by analogy.
As recently demonstrated, volatile memristors are suitable candidates for realizing Leaky integrate-and-fire artificial neuron circuit [16,17], as besides integration they could implement the "leaky" function of biological neurons after the actuation signal (input stimulus) is turned off. Here, we incorporated the volatile memristor SPICE model of a memristive artificial neuron, proposed in the recent paper presenting neurons in an all-memristive neural network [17]. The LIF neuron circuit, see Figure 2, is composed of neuron resistance R, neuron capacitance C and memristor M. Voltage source, V S , as stimulus generator, generates input signals (pulses) on voltage divider circuit formed of a neuron resistance and parallelly connected memristor and capacitor. Memristor models the variable ion channel conductivity, while the capacitor is used to implement cell membrane capacitance [17]. For a large on-to-off resistance ratio of memristor, a capacitor is charged through input resistance R, and the capacitor voltage value is increased. Eventually, capacitor voltage reaches the memristors threshold voltage value, switching it to LRS (onstate), which presents the onset of a capacitor discharging through the memristor. Abrupt changes of memristance are detected as the "firing" event in the artificial neuron. After the pulse train voltage is turned off, the volatile memristor turns to HRS (off-state), which eliminates the need for additional reset circuits. where stands for dopant mobility, and D represents the thickness of the active layer. The controlled current source in y-cell is obtained by analogy.
As recently demonstrated, volatile memristors are suitable candidates for realizing Leaky integrate-and-fire artificial neuron circuit [16,17], as besides integration they could implement the "leaky" function of biological neurons after the actuation signal (input stimulus) is turned off. Here, we incorporated the volatile memristor SPICE model of a memristive artificial neuron, proposed in the recent paper presenting neurons in an allmemristive neural network [17]. The LIF neuron circuit, see Figure 2, is composed of neuron resistance R, neuron capacitance C and memristor M. Voltage source, VS, as stimulus generator, generates input signals (pulses) on voltage divider circuit formed of a neuron resistance and parallelly connected memristor and capacitor. Memristor models the variable ion channel conductivity, while the capacitor is used to implement cell membrane capacitance [17]. For a large on-to-off resistance ratio of memristor, a capacitor is charged through input resistance R, and the capacitor voltage value is increased. Eventually, capacitor voltage reaches the memristors threshold voltage value, switching it to LRS (onstate), which presents the onset of a capacitor discharging through the memristor. Abrupt changes of memristance are detected as the "firing" event in the artificial neuron. After the pulse train voltage is turned off, the volatile memristor turns to HRS (off-state), which eliminates the need for additional reset circuits. Results of the SPICE simulations of LIF neuron with volatile memristor are given in Figure 3, parameters values were implemented from [23], while external components equal to: neuron resistance is R = 10 Ωk and membrane capacitance is initially set to C = 50 nF and later variated demonstrating their influence on neuron dynamics. SPICE code (LTspice version) used for simulation of the volatile memristor is included in Appendix A. Values of memristor's subcircuit model parameters are given in Table 2, while independent and controlled source values follow from the model's equation [23].
The neuron circuit is stimulated with multiple subsequent voltage pulses of the following characteristics: pulse duration 1 ms, pulse period 2 ms and amplitude 0.5·V (subthreshold value). Results, given in Figure 3 are shown for two pulse trains with five consecutive pulses and a resting period of 180 ms. Firing occurs at the ~5 ms detected as memristor's current increase, Figure 3 (middle graph, Ix-memristor current in referent di- Results of the SPICE simulations of LIF neuron with volatile memristor are given in Figure 3, parameters values were implemented from [23], while external components equal to: neuron resistance is R = 10 Ωk and membrane capacitance is initially set to C = 50 nF and later variated demonstrating their influence on neuron dynamics. SPICE code (LTspice version) used for simulation of the volatile memristor is included in Appendix A. Values of memristor's subcircuit model parameters are given in Table 2, while independent and controlled source values follow from the model's equation [23].
The neuron circuit is stimulated with multiple subsequent voltage pulses of the following characteristics: pulse duration 1 ms, pulse period 2 ms and amplitude 0.5·V (subthreshold value). Results, given in Figure 3 are shown for two pulse trains with five consecutive pulses and a resting period of 180 ms. Firing occurs at the t f ∼ 5 ms detected as memristor's current increase, Figure 3 (middle graph, Ix-memristor current in referent direction) and discharging of the capacitor (bottom graph), i.e., decay of voltage across parallel circuit formed from memristor and capacitor (v M ). This behaviour is classified as memristors' threshold switching initiated by the pulse input stimulus, where the required time to reach the threshold corresponds to integration time in neuron dynamics [17]. Resting period t r between the pulses is chosen to demonstrate the volatility effect in the LIF neuron circuit. Namely, following the increase rate of memristance R M after the switching, Figure 3 (top graph), turns back to the initial resistive state value during the resting period t r , simulating decay of local graded potential (LGP), i.e., "leaky" or forgetting function in the biological neuron. This initial value of memristance is a biological counterpart to the resting state of LGP. Relaxation or decay time allows the implementation of STM in artificial neural networks [17]. Following, second pulse train in the simulations, starting from t r , induces same effect: charging of membrane capacitance, and transition of memristor's state. ing, Figure 3 (top graph), turns back to the initial resistive state value during the resting period , simulating decay of local graded potential (LGP), i.e., "leaky" or forgetting function in the biological neuron. This initial value of memristance is a biological counterpart to the resting state of LGP. Relaxation or decay time allows the implementation of STM in artificial neural networks [17]. Following, second pulse train in the simulations, starting from , induces same effect: charging of membrane capacitance, and transition of memristor's state. It is worth noticing that memristance transient response highly depends on input stimulus energy, device history, switching threshold values [22] and on-to-off ratio. Respectively, volatile phenomenon, yet not entirely revealed can be considered as spontaneous reset process and returning the device in an initial state.
It is known in the literature [16], that the spatial integration function of an artificial neuron can be validated as a circuit response under external stimulation with different amplitudes, presenting summed spatial stimulus signals. Namely, biological action potential has uniform amplitude, thus the sum of multiple input signals arriving at the same cell can be modelled with the alteration of signal amplitudes. LIF model of a neuron implemented in SPICE environment can also demonstrate spatial integration functionality, e.g., after increasing amplitude of pulse train input signals from 0.5 V to 1 V (see Figure  4a), a rise of spike current is observed, from ~90 µA (Figure 3) to ~320 µA (Figure 4a), respectively. For larger stimulus amplitude, firing event occurs faster as fewer pulses are required for memristor to reach the threshold value.
The temporal integration function of a biological neuron allows summation of signals with different frequencies, which will consequently generate a different spike response [16]. This process is also possible to emulate using the proposed LIF model in the SPICE environment, as higher values of input frequencies induce larger response current, i.e., increased stimulus frequency from 500 Hz to 2 kHz, see Figure 4b,c for comparison, induces 60% current response increase. This behaviour is recognized as temporal signal high It is worth noticing that memristance transient response highly depends on input stimulus energy, device history, switching threshold values [22] and on-to-off ratio. Respectively, volatile phenomenon, yet not entirely revealed can be considered as spontaneous reset process and returning the device in an initial state.
It is known in the literature [16], that the spatial integration function of an artificial neuron can be validated as a circuit response under external stimulation with different amplitudes, presenting summed spatial stimulus signals. Namely, biological action potential has uniform amplitude, thus the sum of multiple input signals arriving at the same cell can be modelled with the alteration of signal amplitudes. LIF model of a neuron implemented in SPICE environment can also demonstrate spatial integration functionality, e.g., after increasing amplitude of pulse train input signals from 0.5 V to 1 V (see Figure 4a), a rise of spike current is observed, from~90 µA ( Figure 3) to~320 µA (Figure 4a), respectively. For larger stimulus amplitude, firing event occurs faster as fewer pulses are required for memristor to reach the threshold value.
The temporal integration function of a biological neuron allows summation of signals with different frequencies, which will consequently generate a different spike response [16]. This process is also possible to emulate using the proposed LIF model in the SPICE environment, as higher values of input frequencies induce larger response current, i.e., increased stimulus frequency from 500 Hz to 2 kHz, see Figure 4b,c for comparison, induces 60% current response increase. This behaviour is recognized as temporal signal high pass filtering and originates from diffusion processes in volatile memristor, as dynamical modulation of memristance [16].
Electronics 2022, 11, x FOR PEER REVIEW 7 of 13 pass filtering and originates from diffusion processes in volatile memristor, as dynamical modulation of memristance [16]. Neuron resistance and membrane capacitance values also have an immense impact on firing dynamics [17], which could be observable using the proposed SPICE model. Starting from membrane capacitance, larger values result in extra pulses required to generate the spike, see Figure 4a,b for comparison for the same stimulus signal due to higher time constant of capacitance charging. Spike current is increased due to the larger amount of stored charge in the capacitor. On the other hand, neuron resistance value in the model influences on the time constant of the capacitor charging (required time to turn on the memristor), i.e., spike time occurrence (integration time) and spike amplitude (Figure 4b vs. Figure 4d). Neuron resistance can be used to model synaptic weight, larger values correspond to lower weight and vice versa [17].

Experimental Results and Discussion
In the following section, we report experimental results performed on perovskite BTO thin film memristor, by analysing device response on consecutive multiple reading pulses, and single writing pulse in order to test volatility behaviour. We also examined the dynamic response of LIF artificial neurons composed of physical memristor with intrinsic capacitance value and external shunt resistance. Experimental results are compared with numerical results from LIF memristive SPICE model. Neuron resistance and membrane capacitance values also have an immense impact on firing dynamics [17], which could be observable using the proposed SPICE model.
Starting from membrane capacitance, larger values result in extra pulses required to generate the spike, see Figure 4a,b for comparison for the same stimulus signal due to higher time constant of capacitance charging. Spike current is increased due to the larger amount of stored charge in the capacitor. On the other hand, neuron resistance value in the model influences on the time constant of the capacitor charging (required time to turn on the memristor), i.e., spike time occurrence (integration time) and spike amplitude (Figure 4b vs. Figure 4d). Neuron resistance can be used to model synaptic weight, larger values correspond to lower weight and vice versa [17].

Experimental Results and Discussion
In the following section, we report experimental results performed on perovskite BTO thin film memristor, by analysing device response on consecutive multiple reading pulses, and single writing pulse in order to test volatility behaviour. We also examined the dynamic response of LIF artificial neurons composed of physical memristor with intrinsic capacitance value and external shunt resistance. Experimental results are compared with numerical results from LIF memristive SPICE model.
Firstly, a typical volatility test [17,18], was performed on a BTO memristor composed of a train of reading pulses and a single writing pulse, as is shown in Figure 5, where red circles correspond to measured resistance values. Initial resistance R 0 of this device is~1.43 kΩ estimated by application of low-voltage reading pulses of 0.1 V, prior to writing event. BTO memristor was further stimulated using a single above-threshold pulse with the amplitude of 5 V, which switches the memristors in LRS state (~1.2 kΩ). Afterwards, a sequence of low-voltage reading pulses was applied, revealing finite characteristic relaxation time τ r 60 s. After this time, the device returns to the initial state R 0 . This behaviour is typical for volatile memristors, indicating that after the stimulus is turned off, the device returns to the HRS state in a finite time period. In realized Pt/BTO/Pt device, diffusion of oxygen vacancies could lead to changes of electrical properties within the material [36], which resembles the ionic diffusion process controlling neuron channel conductance [37]. Both analogue-type switching [16] and threshold switching [38,39] was observed in volatile memristors [40]. Due to the low off-to-on resistance ratio (~1.5) and moderately steep transition between the resistance states ( Figure 5 inset), realized device could be classified as an analogue switching volatile device [40]. Firstly, a typical volatility test [17,18], was performed on a BTO memristor composed of a train of reading pulses and a single writing pulse, as is shown in Figure 5, where red circles correspond to measured resistance values. Initial resistance R0 of this device is ~1.43 kΩ estimated by application of low-voltage reading pulses of 0.1 V, prior to writing event. BTO memristor was further stimulated using a single above-threshold pulse with the amplitude of 5 V, which switches the memristors in LRS state (~1.2 kΩ). Afterwards, a sequence of low-voltage reading pulses was applied, revealing finite characteristic relaxation time τr ~60 s. After this time, the device returns to the initial state R0. This behaviour is typical for volatile memristors, indicating that after the stimulus is turned off, the device returns to the HRS state in a finite time period. In realized Pt/BTO/Pt device, diffusion of oxygen vacancies could lead to changes of electrical properties within the material [36], which resembles the ionic diffusion process controlling neuron channel conductance [37]. Both analogue-type switching [16] and threshold switching [38,39] was observed in volatile memristors [40]. Due to the low off-to-on resistance ratio (~1.5) and moderately steep transition between the resistance states ( Figure 5 inset), realized device could be classified as an analogue switching volatile device [40]. In Figure 6 we included both simulated and experimental values of normalized resistance response upon the previously explained shown pulse train cycles. Simulation was performed in LTspice simulator on volatile memristor model, presented in Section 3, with the following parameters: RON = 1.5 kΩ, ROFF = 2 kΩ, uV = 10 −10 cm 2 /Vs, D = 100 nm corresponding to sample properties. As fitting parameters, we used electrical parameters of xmodule Cx, Rx, i.e., components of the volatile cell, which determines the amount of volatile switching and relaxing period [23], respectively. Results, illustrated in Figure 6, show good agreement between experimental and simulated data. Existing discrepancies in the decay rate may originate from intrinsic device capacitance as well as the parasitic capacitance induced through measurement setup. In Figure 6 we included both simulated and experimental values of normalized resistance response upon the previously explained shown pulse train cycles. Simulation was performed in LTspice simulator on volatile memristor model, presented in Section 3, with the following parameters: R ON = 1.5 kΩ, R OFF = 2 kΩ, u V = 10 −10 cm 2 /Vs, D = 100 nm corresponding to sample properties. As fitting parameters, we used electrical parameters of x-module Cx, Rx, i.e., components of the volatile cell, which determines the amount of volatile switching and relaxing period [23], respectively. Results, illustrated in Figure 6, show good agreement between experimental and simulated data. Existing discrepancies in the decay rate may originate from intrinsic device capacitance as well as the parasitic capacitance induced through measurement setup.
For a simple LIF circuit, an additional capacitor and resistor are included in the neuron model. Recent studies show that external capacitance can lead to a prominent delay in integration time [17], thus we use the intrinsic memristor's capacitance, whose value is estimated to~1 nF, using an impedance analyzer for the frequency range of interest. The extracted simulation parameters and frequency-dependent capacitance value were used as input parameters for SPICE simulation of LIF neuron, Figure 7. For a simple LIF circuit, an additional capacitor and resistor are included in the neuron model. Recent studies show that external capacitance can lead to a prominent delay in integration time [17], thus we use the intrinsic memristor's capacitance, whose value is estimated to ~1 nF, using an impedance analyzer for the frequency range of interest. The extracted simulation parameters and frequency-dependent capacitance value were used as input parameters for SPICE simulation of LIF neuron, Figure 7. The firing dynamic of the artificial neuron circuit could be analyzed using pulse train stimulation as proposed in [16,17]. In this experimental study, we applied multi-pulse voltage stimulation, Vs (frequency 10 Hz, amplitude 6 V, pulse duration 50 ms), Figure 8. Actuation voltage is divided between shunt resistor R and memristor-capacitor parallel connection. In the experimental setup as described in the materials and method section, current response is estimated according to values of voltage across constant resistor R, Vr, see Figure 8b. During the fourth pulse (see Figure 8a), the voltage across the memristor (including intrinsic capacitance), Vm drops down from ~3.8 V to ~3.5 V which occurs as a consequence of memristor switching to LRS state (RON ≈ 1.5 kΩ). Namely, pulse actuation induces conduction modulation within diffusive memristor, which will eventually turn the device to on state and change the Vm value. At the same time, ~0.33 s, the current through the circuit increases starting from 2 mA to 2.36 mA, which is determined according to values of voltage Vr across constant resistor od 1 kΩ (see Figure 8b). An increase in  For a simple LIF circuit, an additional capacitor and resistor are included in the neuron model. Recent studies show that external capacitance can lead to a prominent delay in integration time [17], thus we use the intrinsic memristor's capacitance, whose value is estimated to ~1 nF, using an impedance analyzer for the frequency range of interest. The extracted simulation parameters and frequency-dependent capacitance value were used as input parameters for SPICE simulation of LIF neuron, Figure 7. The firing dynamic of the artificial neuron circuit could be analyzed using pulse train stimulation as proposed in [16,17]. In this experimental study, we applied multi-pulse voltage stimulation, Vs (frequency 10 Hz, amplitude 6 V, pulse duration 50 ms), Figure 8. Actuation voltage is divided between shunt resistor R and memristor-capacitor parallel connection. In the experimental setup as described in the materials and method section, current response is estimated according to values of voltage across constant resistor R, Vr, see Figure 8b. During the fourth pulse (see Figure 8a), the voltage across the memristor (including intrinsic capacitance), Vm drops down from ~3.8 V to ~3.5 V which occurs as a consequence of memristor switching to LRS state (RON ≈ 1.5 kΩ). Namely, pulse actuation induces conduction modulation within diffusive memristor, which will eventually turn the device to on state and change the Vm value. At the same time, ~0.33 s, the current through the circuit increases starting from 2 mA to 2.36 mA, which is determined according to values of voltage Vr across constant resistor od 1 kΩ (see Figure 8b). An increase in The firing dynamic of the artificial neuron circuit could be analyzed using pulse train stimulation as proposed in [16,17]. In this experimental study, we applied multi-pulse voltage stimulation, Vs (frequency 10 Hz, amplitude 6 V, pulse duration 50 ms), Figure 8. Actuation voltage is divided between shunt resistor R and memristor-capacitor parallel connection. In the experimental setup as described in the materials and method section, current response is estimated according to values of voltage across constant resistor R, Vr, see Figure 8b. During the fourth pulse (see Figure 8a), the voltage across the memristor (including intrinsic capacitance), Vm drops down from~3.8 V to~3.5 V which occurs as a consequence of memristor switching to LRS state (R ON ≈ 1.5 kΩ). Namely, pulse actuation induces conduction modulation within diffusive memristor, which will eventually turn the device to on state and change the Vm value. At the same time,~0.33 s, the current through the circuit increases starting from 2 mA to 2.36 mA, which is determined according to values of voltage Vr across constant resistor od 1 kΩ (see Figure 8b). An increase in current during pulse stimulation is interpreted as a firing event [16,17], yet due to the limited performance of BTO physical devices, specifically low off-to-on resistance ratio, this is not a very pronounced effect. It is worth noting that the amplitude of actuation voltage in our experimental studies was chosen in order to more easily reveal switching time, as for lower voltage values, the off-to-on resistance ratio of the diffusive memristor is decreased.
which is required in the circuit design process [15]. Figure 8d illustrates memristors' current (Ix(Memristor:plus)) increases at ~0.32 s from 2.11 mA to 2.49 mA, which is in good agreement with the experimental analysis (see Figure 8b for comparison). Gradual changes of simulated memristors voltage and current values (Figure 8c,d) before reaching the stable state can not be detected through experimental results due to limitations of measuring equipment. After the pulse train is turned off the device returns to its initial state in finite relaxation time.  The additional peripheral circuit could be placed after the artificial neuron, in order to distinguish a spike event from an integration period. Solutions using comparator and pulse generator [16] or Schmitt trigger-based amplifier [15], already presented in literature, allow spike events to occur only when the input signal reaches the predefined threshold value. Certainly, improved performances of volatile memristor eliminate the need for a peripheral circuit in LIF neuron as presented in [17].

Conclusions
In Figure 8c,d SPICE simulation results of the LIF circuit are illustrated with the parameters extracted from normalized resistance timing characteristics ( Figure 6) and properties of the BTO memristor. Regarding memristor voltage value transition, the initial voltage value is 3.69 V, while the final state amounts to 3.49 V, reached at 0.32 s (Figure 8c). Moreover, SPICE simulation results allow extraction of memristor current, without the need for usage of optimization tools for separation of memristive and capacitive effect which is required in the circuit design process [15]. Figure 8d illustrates memristors' current (Ix(Memristor:plus)) increases at~0.32 s from 2.11 mA to 2.49 mA, which is in good agreement with the experimental analysis (see Figure 8b for comparison). Gradual changes of simulated memristors voltage and current values (Figure 8c,d) before reaching the stable state can not be detected through experimental results due to limitations of measuring equipment. After the pulse train is turned off the device returns to its initial state in finite relaxation time.

Conclusions
In summary, we have implemented our new window function in the existing model of the volatile memristor in the SPICE simulation environment and included it in a simple leaky integrate-and-fire neuron circuit applicable in all-memristive neural networks. Simple LIF circuit uses inherent volatility of resistive switching element to provide decay of local gradient potential, as a leaky term in short term memory, therefore no additional blocks are required. Performed simulations demonstrate that the model can capture biological neuron dynamic: spatiotemporal integration task, firing function and leakage, i.e., forgetting functionality. The neuron model can also illustrate the influence of neuron resistance (synaptic weight) and membrane capacitance on firing behaviour and integration time. Verification was performed through comparison with an experimental study using Pt/BaTiO 3 /Pt diffusive/volatile memristor. In a physical LIF circuit, the intrinsic capacitance of the diffusive memristor is utilized as an integration element. Results show good agreement between model and experimental study for both resistance decay rate of volatile memristor itself and firing behaviour of LIF circuit. Demonstrated SPICE simulation of LIF allows decoupling of individual component influence of spiking behaviour and contributes to the enhancement of design of complex memristive neuromorphic architectures.

Data Availability Statement:
The data presented in this study are available on request from the corresponding author.