A Control Scheme to Suppress Circulating Currents in Parallel-Connected Three-Phase Inverters

: The parallel operation of inverters has many beneﬁts, such as modularity and redundancy. However, the parallel connection of inverters produces circulating currents that may result in mal-functions of the system. In this work, a control technique for the elimination of the low-frequency components of the circulating currents in grid-connected inverters is presented. The proposed control structure contains n − 1 zero-sequence control loops, with n being the number of inverters connected in parallel. Simulation and experimental results have been carried out on a prototype composed of two 5 kW inverters connected in parallel. The results have been obtained by considering the following mismatches between both inverters: inductance values of the grid ﬁlters


Introduction
The parallel connection of inverters has been used in various applications, as it has some advantages, such as modularity, redundancy, and easy maintenance [1][2][3].However, when there are mismatches in the hardware components, such as the inductance values of the filters or the control parameters of the modules connected in parallel, circulating currents happen to lead to undesirable effects in the system [4][5][6].Circulating currents can produce adverse effects, such as the distortion of the AC currents, an unbalance in the power delivered by each inverter, higher conduction losses in the switching devices, and lower efficiency of the whole system.
One of the simplest methods to eliminate circulating currents uses transformers to electrically isolate the parallel connected modules.This method leads to an expensive and bulky system, with control methods not requiring extra hardware being preferred [7][8][9][10][11].
The circulating current is composed of high-frequency harmonics, close to the switching frequency and its multiples, and low-frequency harmonics placed at the fundamental frequency and its multiples.High-frequency circulating currents are usually eliminated using passive elements, as in [12,13].This work is focused on low-frequency circulating currents.
To reduce circulating currents, in some works, such as [14,15], the n modules connected in parallel have been considered as a single converter that has as many branches as the branches of each module multiplied by n.This control is very complex for high values of n and does not allow for a modular design.Other works, such as [13], proposed a finite time control method.In [16], a double modulation compensation technique was used; in [8], a harmonic elimination PWM modulation (HEPWM) that needs a high switching frequency, leading to high switching losses, was proposed.Other studies proposed the control of the zero-sequence current of the inverters [17,18].In [17], a common-mode voltage injection PWM method was described, and [18] proposed a multicarrier PWM for parallel three-phase active front-end converters.In both cases, a control action was added to the three control signals of the PWM modulator to reduce the circulating currents.In those works, the effect that the addition of the proposed control signal had on the stability of the system had not been analyzed.Reference [19] proposed the control of the homopolar component of the phase currents to avoid circulating currents using three-dimensional space vector modulation (3D-SVM).
This paper proposes a control structure based on the fact that the circulating currents among inverters agree with the zero-sequence component of the three-phase currents, so that, by regulating the zero-sequence component to a null setpoint value, circulating currents are eliminated.The complexity of the proposed solution is very low, allowing for a modular design that can be easily extended to a high value of n.Regarding [19], where only differences among inverter inductances were taken into account, the present work considers various causes that produce circulating currents: mismatches in the inductance values of the grid filters among inverters and in each phase of the same inverter, unbalance of the delivered power, and the use of different modulation techniques.In addition, the harmonic contents of the circulating currents have been considered to adjust the resonant controllers in the inverter's current loops, which improves the control action at the frequencies of interest.The control structure proposed in the current work has been validated in an experimental laboratory set-up.The stability of the whole system has been analyzed and supported by both analytical and experimental results.

Modeling of n Inverters Connected in Parallel in the Synchronous Reference Frame
Figure 1 shows a general scheme of n inverters connected in parallel.The grid filter of each inverter is an LCL filter with a damping resistance, R d , connected in series with the filter capacitance, C f .The inductances of the filter can be implemented by means of threephase inductors, being L f and L fg , the inverter-side inductance and grid-side self-inductance, respectively, whereas r f and r fg are the corresponding parasitic series resistances.M f and M fg stand for the inverter-side and grid-side mutual inductance values, respectively.The grid impedance at the point of common coupling (PCC) is characterized by its self-inductance, L g , parasitic series resistance, r g , and mutual inductance, M g .

Averaged Model Equations
Figure 2 shows the averaged equivalent circuit of Figure 1 represented in the stationary three-phase reference frame.Equations ( 2)-( 6) are obtained from this scheme.In Equations ( 2)- (6), the value of i (i = 1,…, n) identifies each module, with n being the total num- The goal of this section is to obtain a MIMO model of the system in a dqo synchronous reference frame (SRF), having the grid voltage aligned with the d-axis.Then, the active and reactive powers can be regulated with the d and q components of the AC currents, respectively.It is worth pointing out that the zero-sequence component (channel o) of the current is normally omitted in three-phase inverters because this component is naturally zero in the case of three-wire inverters without a neutral conductor.In the proposed control structure, the zero-sequence component will also be regulated.

Averaged Model Equations
Figure 2 shows the averaged equivalent circuit of Figure 1 represented in the stationary three-phase reference frame.Equations ( 2)-( 6) are obtained from this scheme.In Equations ( 2)-( 6), the value of i (i = 1, . . ., n) identifies each module, with n being the total number of modules.The load factor of each module, c i , is defined by Equation (1), with I 2i_RMS_OP being the RMS phase current at the operation point provided by inverter #i and I 2i_RMS_NOM being its nominal RMS phase current.Fm stands for the gain of the SVM modulation and depends on its implementation inside the digital controller in which the control loops are programmed.
Averaged equivalent circuit of the parallel inverters.
It is worth pointing out that the circulating currents comply with Equation ( 7), so it is only necessary to regulate the n − 1 zero-sequence currents (i o1 to i on ) to zero, being null to the zero-sequence duty cycle of the n-th converter.Taking into account that the filter capacitors are not connected to the midpoint of the dc-link, the circulating currents neither flow through them nor to the grid, as it was shown in [12].In view of this, and following the procedure described in Appendix A, the equations in the SRF have been obtained, Equations ( 8)- (12).

Derivation of the Small Signal MIMO Model
The small signal model of the parallel inverters has been obtained in this section.It has been obtained by applying Equation (13) to SRF Equations ( 8)- (12).In Equation ( 13), x stands for each of the variables of the averaged model, expressed as the sum of the value at the operation point, X, and the small signal value, x.
The equations of the small signal model in the SRF frame are expressed in Equations ( 14)- (21).Because of the model complexity, some auxiliary matrices (A9)-(A25) have been defined to simplify A, B, C, and D. The input vector U defines the control variables (the duty cycle of each branch of the inverter) and the disturbances (the grid voltage).The constant K vo is expressed by Equation (A19), considering that at the DC side, there is a constant power load (CPL) or a photovoltaic field that can be modelled as a current source.
The expressions of the variables at the operation point are summarized in Table 1.In order to simplify their calculation, the inductor resistances have been neglected, as well as the filter capacitors, so that the currents at the grid side (I 1dqi ) and at the converter side (I 2dqi ) agree (I dqi ≈ I 1dqi ≈ I 2dqi ).In addition, the expressions of the operation point have been obtained by considering the control objectives.Since zero reactive power and zero circulating currents are aimed at, both the reactive and zero-sequence components of the currents are chosen to be null.The value of the load factor for each inverter, c i , can vary between 0 and 1.
Table 1.Expression of the variables in the operation point.

Variable Expression
V gd V gRMS (phase-phase)

Control Architecture
Figure 3 shows the scheme of the proposed control scheme.It is composed of n current control loops for dand q-channels (in both cases, one per inverter) and n − 1 current control loops for regulating the o-channel.
By aligning the d-axis of the reference frame with the direct-sequence fundamental space vector of the grid voltage, the active power may be controlled by regulating the d component of the current, whereas the reactive power can be controlled by acting on the q-axis component.In this case, the reference for the q-axis current is zero, i * q = 0, in order to obtain a unity power factor.The references in the dand oaxis are defined by i d * and i o *, respectively.
In three-phase inverters, the zero-sequence component of the phase currents represents the circulating currents among the inverters.The zero-sequence component is defined as one-third of the sum of the phase currents provided by an inverter, i o = (i a + i b + i c )/3.If only one inverter is connected, i o1 = 0, as the sum of the three-phase currents is zero by application of Kirchhoff's first law (i a1 + i b1 + i c1 = 0).If two inverters are connected in parallel, n = 2, i o1 = −i o2 , and the circulating currents can be controlled with only one zero-sequence current control.When there are n inverters connected in parallel, they need n − 1 zero-sequence current control regulators.As has been previously pointed out, there is no need to control the zero-sequence component of a three-wire, three-phase inverter when it is operating as a single inverter.However, that is not true in the case of the parallel connection of inverters due to the existence of circulating currents, which are directly related to the zero-sequence component.Therefore, in the proposed solution, the zero-sequence components are controlled with a reference signal i o * = 0 to suppress the circulating currents among inverters.In three-phase inverters, the zero-sequence component of the phase currents represents the circulating currents among the inverters.The zero-sequence component is defined as one-third of the sum of the phase currents provided by an inverter, io = (ia + ib + ic)/3.If only one inverter is connected, io1 = 0, as the sum of the three-phase currents is zero by application of Kirchhoff's first law (ia1 + ib1 + ic1 = 0).If two inverters are connected in parallel, n = 2, io1 = −io2, and the circulating currents can be controlled with only one zerosequence current control.When there are n inverters connected in parallel, they need n-1 zero-sequence current control regulators.As has been previously pointed out, there is no need to control the zero-sequence component of a three-wire, three-phase inverter when it is operating as a single inverter.However, that is not true in the case of the parallel connection of inverters due to the existence of circulating currents, which are directly related to the zero-sequence component.Therefore, in the proposed solution, the zero-sequence components are controlled with a reference signal io* = 0 to suppress the circulating currents among inverters.
Although the zero-sequence components of the currents can be controlled by means of a sinusoidal PWM modulation, the use of SVM modulation has been preferred.The reason is that SVM modulations are digital, so they allow for a much more flexible trip sequence of the transistors than analog PWM modulations.Generally, in three-phase, three-wire systems, 2D-SVM, or simply SVM, is used.However, to control the zero-se- Although the zero-sequence components of the currents can be controlled by means of a sinusoidal PWM modulation, the use of SVM modulation has been preferred.The reason is that SVM modulations are digital, so they allow for a much more flexible trip sequence of the transistors than analog PWM modulations.Generally, in three-phase, threewire systems, 2D-SVM, or simply SVM, is used.However, to control the zero-sequence component of the currents, 3D-SVM is needed, since the three components αβo of the phase voltage can be controlled in the whole operation range of the inverter.
When inverters are represented in the synchronous reference frame, coupling terms between the dand q-axis of the phase currents appear.Equations ( 24) and (25) express the proposed decoupling terms between both axes, which have been calculated by omitting the effect of the filter capacitors.Under this assumption, the currents at the inverter side (I 1dqoi ) and at the grid side (I 2dqoi ) agree (I dqoi ≈ I 1dqoi ≈ I 2dqoi ).Assuming no disturbances, both at the DC-link voltage and at the grid voltage, vdc (s) = vgd (s) = 0, and Equation ( 22) is obtained.Since ε idi is the current error signal in the d-axis and G i is the current regulator transfer function, the control action in channel dcan be expressed according to Equation (23).The decoupling term K qd is obtained from Equations ( 22) and ( 23).The ex-pression of K dq is calculated similarly.The decoupling terms are valid from DC to medium frequencies, where the effect of the filter capacitance in the coupling can be neglected.
Note that the decoupling terms depend on the number of inverters on stream, n.If the grid inductances are negligible, the parameters L g and M g could be considered null, so that the decoupling terms would be constantly independent of n.However, for the cases where the value of L g and M g could not be considered zero, it is easy to automatically readjust the value of the decoupling terms by stocking the needed value as a function of n.
Equations ( 26)-(28) express the current control open loop gains in channels d, q, and o, respectively.In those equations, R s is the gain of the current sensor, G i (s) is the current regulator transfer function, D(s) represents the transfer function of a delay equal to a switching period, which has been calculated from a second-order Padé approximation, and FPB(s) is the transfer function of a low-pass antialiasing filter implemented in the current sensors.The transfer functions of the current as a function of the duty cycle has been obtained from the state space model of the system using MATLAB TM (R2018b).The current sensors have been located at the inverter side of the LCL filter.Placing the sensors at the inverter side, instead of sensing the currents at the grid side, provides higher robustness to the control system [20].

Three-Dimension Space Vector Modulator
If the fundamental components of the phase currents are balanced in a three-phase, two-level inverter, the fundamental component of the voltage between the midpoint of the dc-link and the neutral point of the grid is zero.Thus, in that case, it can be considered a virtual connection at the fundamental frequency of the line voltage between the neutral point of the grid and the midpoint of the dc-link [21].This is an important difference, with respect to three-phase inverters with a four-wire output (three phases + neutral), where the neutral is physically connected.Three-dimensional SVM modulators have been developed for four-wire connected inverters, and, to the best of the authors' knowledge, the first time 3D-SVM was applied to three-phase inverters without neutral was in this work.
Table 2 shows the phase-to-neutral voltage in abc coordinates using the DC voltage vdc as a reference of the eight possible switching vectors with the considerations described above.It also shows the same voltage in the αβ0 coordinates (Clarke).Figure 4a shows the Electronics 2022, 11, 3720 9 of 23 twelve tetrahedra, which are defined by two consecutive nonzero switching vectors (in Clarke coordinates) and neutral vectors v 0 and v 7 , alternately.The composition of the above tetrahedra defines the whole operation range of the inverter represented in Figure 4b.
the neutral is physically connected.Three-dimensional SVM modulators have been developed for four-wire connected inverters, and, to the best of the authors' knowledge, the first time 3D-SVM was applied to three-phase inverters without neutral was in this work.
Table 2 shows the phase-to-neutral voltage in abc coordinates using the DC voltage vdc as a reference of the eight possible switching vectors with the considerations described above.It also shows the same voltage in the αβ0 coordinates (Clarke).Figure 4a shows the twelve tetrahedra, which are defined by two consecutive nonzero switching vectors (in Clarke coordinates) and neutral vectors v0 and v7, alternately.The composition of the above tetrahedra defines the whole operation range of the inverter represented in Figure 4b.Vector modulation consists of constructing the reference voltage vector v* at the inverter output by alternately applying its adjacent switching vectors.First, the tetrahedron containing the reference vector must be obtained.Once the tetrahedron containing the reference vector is defined, the switching vectors adjacent to v* are known.From the projections of the reference vector on the switching vectors that delimit the tetrahedron, the time that each switching vector must be applied was calculated in [21][22][23].In this work, a symmetric distribution of the switching vectors has been implemented.Table 3 represents the sequence of the switching vectors applied in each prism.Vector modulation consists of constructing the reference voltage vector v* at the inverter output by alternately applying its adjacent switching vectors.First, the tetrahedron containing the reference vector must be obtained.Once the tetrahedron containing the reference vector is defined, the switching vectors adjacent to v* are known.From the projections of the reference vector on the switching vectors that delimit the tetrahedron, the time that each switching vector must be applied was calculated in [21][22][23].In this work, a symmetric distribution of the switching vectors has been implemented.Table 3 represents the sequence of the switching vectors applied in each prism.

Prism
Sequence of Switching Vectors

Experimental Set-Up
A 10 kW prototype composed of two three-phase 5 kW inverters has been built and experimentally tested.Figure 5 shows the single-line scheme of the converters, whereas Table 4 summarizes the parameters of the system.As can be seen from Figure 5, the grid filter was an LCL grid filter composed of C f capacitors with R d damping resistors, three single-phase inductances at the inverter side with a value L f , and a three-phase inductor L g , M g , common to the two inverters connected in parallel.In this case, the inductance L fg of the general model was not used, so it was considered null.

FOR PEER REVIEW 12 of 25
Table 3. Sequence of switching vectors in each prism.

Experimental Set-Up
A 10 kW prototype composed of two three-phase 5 kW inverters has been built and experimentally tested.Figure 5 shows the single-line scheme of the converters, whereas Table 4 summarizes the parameters of the system.As can be seen from Figure 5, the grid filter was an LCL grid filter composed of Cf capacitors with Rd damping resistors, three single-phase inductances at the inverter side with a value Lf,, and a three-phase inductor Lg, Mg, common to the two inverters connected in parallel.In this case, the inductance Lfg of the general model was not used, so it was considered null.

PCC
Single-line scheme of two inverters connected in parallel.
The experimental results have been obtained by means of the set-up depicted in Figure 6.Both parallel operating inverters have been connected to the same AC and DC buses and have been controlled using the dual-core Texas Instruments TMS320F28379D microcontroller.The AC bus has been supplied by a bidirectional power supply, Cinergia GL and EL-50, emulating an AC grid of 230 V RMS phase-phase and 50 Hz.Anyway, a GSS Regatron programmable power supply has set the DC bus to 500 V.

Design of the Control Loops
PI controllers are usually used in power converters to implement the regulators of the current control loops in a synchronous reference frame.However, PI controllers have difficulties when the regulated variables have frequency contents close to the crossover frequency of the loops, which is the case of the low-frequency harmonics of the circulating currents.To address this issue, second-order generalized integrators (SOGI) [24] have been added to the o-channel controllers to increase their gain at the frequency of the circulating currents' low-frequency harmonics, resulting in PI + SOGI o-channel controllers.As it will be seen in the simulation and experimental results section, when the powers provided by the parallel inverters are balanced, the circulating currents present third-order harmonics (150 Hz) and their odd multiples, with the ninth one being the most significant harmonic (450 Hz).Nevertheless, if the power provided by one of the parallel inverters becomes unbalanced, a large fundamental harmonic (50 Hz) appears at the circulating current.Therefore, the SOGIs of the o-channel current controllers are tuned to 50 Hz, 150 Hz, and 450 Hz.
The expressions of the current controllers should be chosen by taking the following

Design of the Control Loops
PI controllers are usually used in power converters to implement the regulators of the current control loops in a synchronous reference frame.However, PI controllers have difficulties when the regulated variables have frequency contents close to the crossover frequency of the loops, which is the case of the low-frequency harmonics of the circulating currents.To address this issue, second-order generalized integrators (SOGI) [24] have been added to the o-channel controllers to increase their gain at the frequency of the circulating currents' low-frequency harmonics, resulting in PI + SOGI o-channel controllers.As it will be seen in the simulation and experimental results section, when the powers provided by the parallel inverters are balanced, the circulating currents present third-order harmonics (150 Hz) and their odd multiples, with the ninth one being the most significant harmonic (450 Hz).Nevertheless, if the power provided by one of the parallel inverters becomes unbalanced, a large fundamental harmonic (50 Hz) appears at the circulating current.Therefore, the SOGIs of the o-channel current controllers are tuned to 50 Hz, 150 Hz, and 450 Hz.
The expressions of the current controllers should be chosen by taking the following issues into account.First, the crossover frequency of the current control loop gains must be higher than the frequency of the harmonics of the variables to be controlled.In addition, the loop gain must be much lower (around 1 decade) than the switching frequency to avoid large signal instabilities and noise problems.In addition, appropriate stability margins must be achieved, typically a phase margin PM > 45 • and a gain margin GM > 6 dB.Equations ( 29) and (34) show the expressions of the chosen current regulators on the dand q-axis and on the o-axis, respectively.The transfer functions of the d and q current channels were similar, so that their controllers could agree.The current controllers in both channels were proportional integral regulators.As indicated above, the current regulator in the zero-sequence channel was a PI + SOGIs one, being the generalized integrators tuned at 50 Hz, 150 Hz, and 450 Hz.The bandwidth of the 50 Hz SOGI was 10 Hz, and its gain was 4. The gain of the 150 Hz SOGI was 4, whereas that of the 450 Hz SOGI was 0.5.The bandwidths of the 150 Hz and 450 Hz SOGIs were reduced, with regard to the bandwidth of the 50 Hz SOGI.The reason for that was to avoid the risk of instability, due to a phase loss close to the crossover frequency of the o-channel current loops.
Figure 7a-c depict the Bode plot measurements and the theoretical curves (gain in dB, phase in deg) of the current loop gains: T id (jω) Equation (26), T iq (jω) Equation ( 27), and T io (jω) Equation (28).The theoretical plots have been obtained by Matlab R2018b.The experimental measurements of Figure 7 have been carried out by means of a frequency response analyzer FRA5097 from NF Corporation.Figure 7d depicts the Bode plot measurements of the current loop gain in the o-channel.
As it can be seen from those figures, the current loop frequency response predicted by the developed model was reasonably close to the experimental measurements, so the developed model was validated as a design and analysis tool.Note that stability was guaranteed in all cases.Specifically, the crossover frequency of the current loops ranged from 680 Hz to 800 Hz, having, in the worst case, the phase margin PM = 47 • and the gain margin GM = 7.2 dB.
and Tio (jω) Equation Error!Reference source not found..The theoretical plots have been obtained by Matlab R2018b.The experimental measurements of Figure 7  As it can be seen from those figures, the current loop frequency response predicted by the developed model was reasonably close to the experimental measurements, so the developed model was validated as a design and analysis tool.Note that stability was guaranteed in all cases.Specifically, the crossover frequency of the current loops ranged from 680 Hz to 800 Hz, having, in the worst case, the phase margin PM = 47° and the gain margin GM = 7.2 dB.The stability of the system has been also analysed by considering variations of Lf in the range between 5 mH-7 mH.Figures 8a,b represent the pole-zero map in the d-and qaxis, respectively.It can be seen that, for higher values of Lf, the system is slower and more stable.Figure 8c shows that the Lf variations do not affect the o-axis stability.The position of the closed loop pole trajectories has been represented in these figures.It can be seen that, for higher values of Kp, the current control loops become faster, compromising the system stability.The stability of the system has been also analysed by considering variations of L f in the range between 5-7 mH. Figure 8a,b represent the pole-zero map in the dand q-axis, respectively.It can be seen that, for higher values of L f , the system is slower and more stable.Figure 8c shows that the L f variations do not affect the o-axis stability.The position of the closed loop pole trajectories has been represented in these figures.It can be seen that, for higher values of K p , the current control loops become faster, compromising the system stability.

Simulation and Experimental Results
In this section, the simulation and experimental results that validate the proposed control scheme for the suppression of circulating currents are shown.The prototype has been tested by considering that low-frequency circulating currents are due to various reasons: an inductance value mismatch in the phases of the same inverter and among different inverters, power unbalance among inverters, and the use of different PWM modulators in each inverter.In practice, the last scenario happens if the inverter that does not need to regulate the homopolar component (#1 in Figure 3) implements 2D-SVM, instead of 3D-SVM.
Simulation results have been obtained by considering two and three inverters with the characteristics of Table 4 connected in parallel.The experimental results with two inverters connected in parallel have been presented.Only one of the previously described reasons for unbalance has been studied in each experiment.

Simulation and Experimental Results
In this section, the simulation and experimental results that validate the proposed control scheme for the suppression of circulating currents are shown.The prototype has been tested by considering that low-frequency circulating currents are due to various reasons: an inductance value mismatch in the phases of the same inverter and among different inverters, power unbalance among inverters, and the use of different PWM modulators in each inverter.In practice, the last scenario happens if the inverter that does not need to regulate the homopolar component (#1 in Figure 3) implements 2D-SVM, instead of 3D-SVM.
Simulation results have been obtained by considering two and three inverters with the characteristics of Table 4 connected in parallel.The experimental results with two inverters connected in parallel have been presented.Only one of the previously described reasons for unbalance has been studied in each experiment.

Two Inverters Connected in Parallel
The simulation results, when two 5 kW inverters are connected in parallel, have been obtained by means of PSIM TM 10.0 and are depicted in Figure 9.In this figure, the circulating currents are represented before and after the activation of the zero-sequence control at t = 0.25 s.The upper part of each of the graphs corresponds to the phase currents of inverter #1, the lower part depicts the phase currents of inverter #2, and in the central part, the circulating currents are shown.load factor of the two inverters becomes unbalanced, so that inverter #1 handles 25% of its nominal power, whereas inverter #2 handles 50% of its nominal power.In this case, the circulating currents are of a higher value than in the case in which the inductances of both inverters are unbalanced, so it is easier to see that the zero-sequence control allows the circulating currents to be significantly reduced.
Figure Error!Reference source not found.cshows the results when the inductance of phase A of the second inverter is 7 mH, instead of 5 mH.In this case, the circulating current had a large fundamental harmonic, and the phase currents became unbalanced.After activating the zero-sequence control at t = 0.25 s, the circulating current was significantly reduced, leading to a good balancing of the currents, provided by both inverters.
Finally, in Figure 9d, the cases of using a 2D-SVM modulator in inverter #1 and a 3D-SVM modulator in inverter #2 are depicted.In this case, the amplitude of the 150 Hz fundamental component of the circulating current was approximately 4 A, being drastically reduced after activating the zero-sequence component control.It should also be noted that the currents in the phases of each inverter are no longer strongly distorted and are transformed into 50 Hz sinusoidal signals

Three Inverters Connected in Parallel
In this section, the proposed technique has been applied to three inverters of 5 kW connected in parallel.Since n-1 zero-sequence current control loops are needed to control the circulating currents, the zero-sequence component of the phase currents in inverters #2 and #3 have been controlled.
Error! Reference source not found.ashows the simulation results with a mismatch in the nominal value of the inductances among inverters.Specifically, Lf in inverter #1 had a value of 5 mH, Lf in inverter #2 had a value of 7 mH, and Lf in inverter #3 was 6 mH. Figure 10b represents the phase currents and the circulating currents when inverter #1, inverter #2, and inverter #3 handled 25%, 30%, and 50% of their nominal power, respectively.Figure 10c depicts the case in which there was a mismatch among the inductances of each phase of the inverter.The phase B inductance of inverter #1 was 6 mH, and the phase A inductance of inverter #2 was 7 mH, instead of 5 mH.Finally, in Figure 10d, the simulation results are shown with a 2D-SVM modulator in inverter #1 and 3D-SVM modulators in inverters #2 and #3.
Note that these results are very similar to the previous case, and that the circulating Figure 9a shows the simulation results when the value of the inverter side inductances of inverter #2, L f , is modified to 7 mH.Despite the fact that the circulating currents are inherently small, without the need to control the zero-sequence component, it was found that, with the proposed control of the zero-sequence channel, the 150 Hz component decreased significantly.As described in Section 6, when the currents provided by the inverters are balanced, the circulating current is composed of a three-order harmonic and its odd multiples if there are mismatches in the value of L f among inverters and in other cases, as will be shown by the experimental results shown in the following.
Figure 9b shows the simulation results when the load factor of the two inverters becomes unbalanced, so that inverter #1 handles 25% of its nominal power, whereas inverter #2 handles 50% of its nominal power.In this case, the circulating currents are of a higher value than in the case in which the inductances of both inverters are unbalanced, so it is easier to see that the zero-sequence control allows the circulating currents to be significantly reduced.
Figure 9c shows the results when the inductance of phase A of the second inverter is 7 mH, instead of 5 mH.In this case, the circulating current had a large fundamental harmonic, and the phase currents became unbalanced.After activating the zero-sequence control at t = 0.25 s, the circulating current was significantly reduced, leading to a good balancing of the currents, provided by both inverters.
Finally, in Figure 9d, the cases of using a 2D-SVM modulator in inverter #1 and a 3D-SVM modulator in inverter #2 are depicted.In this case, the amplitude of the 150 Hz fundamental component of the circulating current was approximately 4 A, being drastically reduced after activating the zero-sequence component control.It should also be noted that the currents in the phases of each inverter are no longer strongly distorted and are transformed into 50 Hz sinusoidal signals.

Three Inverters Connected in Parallel
In this section, the proposed technique has been applied to three inverters of 5 kW connected in parallel.Since n − 1 zero-sequence current control loops are needed to control the circulating currents, the zero-sequence component of the phase currents in inverters #2 and #3 have been controlled.
Figure 10a shows the simulation results with a mismatch in the nominal value of the inductances among inverters.Specifically, L f in inverter #1 had a value of 5 mH, L f in inverter #2 had a value of 7 mH, and L f in inverter #3 was 6 mH. Figure 10b represents the phase currents and the circulating currents when inverter #1, inverter #2, and inverter #3 handled 25%, 30%, and 50% of their nominal power, respectively.Figure 10c depicts the case in which there was a mismatch among the inductances of each phase of the inverter.The phase B inductance of inverter #1 was 6 mH, and the phase A inductance of inverter #2 was 7 mH, instead of 5 mH.Finally, in Figure 10d, the simulation results are shown with a 2D-SVM modulator in inverter #1 and 3D-SVM modulators in inverters #2 and #3.
Note that these results are very similar to the previous case, and that the circulating currents have been drastically reduced with the proposed control structure.

Three Inverters Connected in Parallel
In this section, the proposed technique has been applied to three inverters of 5 kW connected in parallel.Since n-1 zero-sequence current control loops are needed to control the circulating currents, the zero-sequence component of the phase currents in inverters #2 and #3 have been controlled.
Figure 10a shows the simulation results with a mismatch in the nominal value of the inductances among inverters.Specifically, Lf in inverter #1 had a value of 5 mH, Lf in inverter #2 had a value of 7 mH, and Lf in inverter #3 was 6 mH. Figure 10b represents the phase currents and the circulating currents when inverter #1, inverter #2, and inverter #3 handled 25%, 30%, and 50% of their nominal power, respectively.Figure 10c depicts the case in which there was a mismatch among the inductances of each phase of the inverter.The phase B inductance of inverter #1 was 6 mH, and the phase A inductance of inverter #2 was 7 mH, instead of 5 mH.Finally, in Figure 10d, the simulation results are shown with a 2D-SVM modulator in inverter #1 and 3D-SVM modulators in inverters #2 and #3.
Note that these results are very similar to the previous case, and that the circulating currents have been drastically reduced with the proposed control structure.

Experimental results.
In the experimental tests, the factors analyzed in Section 7.1 causing circulating currents have been studied.It should be noted, however, that the experimental results were obtained from real power converters, so it was impossible to study each of the factors in a completely independent way.Indeed, the inductance value used in the grid filter was theoretically 5 mH, but inductances from the same manufacturer have tolerances of up to 20%, even higher in some cases.In this work, inductances with nominal values of 5 mH, 7 mH and tolerances of 10% have been used.To determine the real value of each component, the inductance of each inductor has been measured, resulting in the values collected in Table 6.
At the top of the graphs in Figure 11, the currents in phase A (orange), B (green), and C (pink) of inverter #1 are shown.The phase currents of inverter #2 are shown at the bottom.It should be noted that, in the central part of each graph, the sum of the currents in the phases of inverter #1 (ia1+ib1+ic1) are shown in blue, and the sum of the currents of the phases of inverter #2 are represented in pink.These currents are proportional to the circulating currents between inverters, whose expression is (ia+ib+ic)/3.A dotted black vertical line marks the activation instant of the proposed control for suppression of the circulating currents.
Figure 11a shows the experimental performance of the proposed control technique, with a mismatch between the inductances of the inverters.In inverter #2, the inductor with a nominal inductance of 5 mH has been replaced by an inductance of 7 mH.The actual values of the inductances used in each phase are summarized in Table 7.The results show that a 50 Hz component appeared in the circulating currents, since the inductance differences among phases did not allow for balancing the phases.A small 150 Hz component also appeared when the grid filter inductances between both inverters were different.
Figure 11b shows the experimental results of the control of circulating currents for a load factor of 25% in inverter #1 and 50% in inverter #2.In this case, the 50 Hz and 150 Hz harmonics also appeared, with the 150 Hz harmonic being greater than in the previous case.The proposed control technique considerably reduced the circulating current.

Experimental Results
In the experimental tests, the factors analyzed in Section 7.1 causing circulating currents have been studied.It should be noted, however, that the experimental results were obtained from real power converters, so it was impossible to study each of the factors in a completely independent way.Indeed, the inductance value used in the grid filter was theoretically 5 mH, but inductances from the same manufacturer have tolerances of up to 20%, even higher in some cases.In this work, inductances with nominal values of 5 mH, 7 mH and tolerances of 10% have been used.To determine the real value of each component, the inductance of each inductor has been measured, resulting in the values collected in Table 6.
At the top of the graphs in Figure 11, the currents in phase A (orange), B (green), and C (pink) of inverter #1 are shown.The phase currents of inverter #2 are shown at the bottom.It should be noted that, in the central part of each graph, the sum of the currents in the phases of inverter #1 (i a1 + i b1 + i c1 ) are shown in blue, and the sum of the currents of the phases of inverter #2 are represented in pink.These currents are proportional to the circulating currents between inverters, whose expression is (i a + i b + i c )/3.A dotted black vertical line marks the activation instant of the proposed control for suppression of the circulating currents.
Figure 11a shows the experimental performance of the proposed control technique, with a mismatch between the inductances of the inverters.In inverter #2, the inductor with a nominal inductance of 5 mH has been replaced by an inductance of 7 mH.The actual values of the inductances used in each phase are summarized in Table 7.The results show that a 50 Hz component appeared in the circulating currents, since the inductance differences among phases did not allow for balancing the phases.A small 150 Hz component also appeared when the grid filter inductances between both inverters were different.
Figure 11b shows the experimental results of the control of circulating currents for a load factor of 25% in inverter #1 and 50% in inverter #2.In this case, the 50 Hz and 150 Hz harmonics also appeared, with the 150 Hz harmonic being greater than in the previous case.The proposed control technique considerably reduced the circulating current.
Figure 11c shows the results in the case in which the inductance connected to phase A of the second inverter was replaced by the inductance L f _a2 of 7.16 mH, represented in Table 7.It was observed that, before activating the zero-sequence control, and with both inverters working at their rated power, the sum of the phase currents resulted in a 50 Hz component of about 3.5 A, so the circulating current had a value of about 1.2 A. After activation of the zero-sequence current control, the circulating current was reduced considerably.
Finally, in Figure 11d, inverter #1 works with 2D-SVM and inverter #2 works with 3D-SVM.It was observed that, before activating the control of the zero-sequence component, the currents in the phases were strongly distorted, due to the high value of the 150 Hz component, 4.5 A, that appeared in the circulating current.After the activation of the zero-sequence control, the currents did not exhibit a noticeable distortion.
Electronics 2022, 11, x FOR PEER REVIEW 20 of 25 Figure 11c shows the results in the case in which the inductance connected to phase A of the second inverter was replaced by the inductance Lf_a2 of 7.16 mH, represented in Table 7.It was observed that, before activating the zero-sequence control, and with both inverters working at their rated power, the sum of the phase currents resulted in a 50 Hz component of about 3.5 A, so the circulating current had a value of about 1.2 A. After activation of the zero-sequence current control, the circulating current was reduced considerably.
Finally, in Figure 11d, inverter #1 works with 2D-SVM and inverter #2 works with 3D-SVM.It was observed that, before activating the control of the zero-sequence component, the currents in the phases were strongly distorted, due to the high value of the 150 Hz component, 4.5 A, that appeared in the circulating current.After the activation of the zero-sequence control, the currents did not exhibit a noticeable distortion.

Conclusions
This work presents a method for the suppression of low-frequency circulating currents among n three-phase inverters connected in parallel.To this end, a control technique, in which n − 1 regulation loops with three-dimensional space vector modulators (3D-SVM), was used to regulate the zero-sequence component of the currents in each inverter.Thus, the circulating currents were controlled as they coincided with the zero-sequence components (i o = (i a + i b + i c )/3).As a control objective, a zero setpoint value for the zero-sequence has been imposed, so that the circulating currents cancel out.
Several factors that produce circulating currents have been analyzed: mismatches in the inductance values of the grid filters among inverters and in each phase of the same inverter, unbalance of the delivered power, and finally, the use of different modulation techniques.In addition, the harmonic contents of the circulating currents have been considered to adjust resonant controllers in the zero-sequence current loops.This improves the control action at the frequency of the harmonics that form part of the circulating currents.
The simulation and experimental results have been obtained to validate the correct operation of the proposed control.The most relevant cases that can produce circulating currents among inverters connected in parallel have been evaluated in the tests.From the results obtained, we can conclude that the value of the circulating currents in the event of a mismatch among the nominal value of the inductances of each inverter is very low.The same has been observed when the load factor of each inverter was different.However, when there were differences among the phase inductances of the same inverter, the circulating current at nominal power had a high 50 Hz harmonic of 1.2A.With the proposed control technique, this harmonic was reduced to 8 mA (99% attenuation rate).Finally, when inverter #1 was controlled with 2D-SVM and inverter #2 with 3D-SVM, the circulating current had a high 150 Hz harmonic of 4.5 A, which reduced to 100 mA with the zero-sequence current control loop (98% attenuation rate).Equation (A3).In these equations, ω stands for the grid angular frequency, and x represents any averaged variable (current, voltage, . . .).

Figure 1 .
Figure 1. Circuit of the parallel inverters.

Figure 2 .
Figure 2. Averaged equivalent circuit of the parallel inverters.

Figure 3 .
Figure 3. Scheme of the proposed control stage.

Figure 3 .
Figure 3. Scheme of the proposed control stage.

Figure 4 .
Figure 4. Spatial representation of the 3D-SVM switching vectors.(a) Two tetrahedra composed of two consecutive nonzero switching vectors and neutral vectors v0 and v7 .(b)Spatial representation of the twelve tetrahedra.

Figure 4 .
Figure 4. Spatial representation of the 3D-SVM switching vectors.(a) Two tetrahedra composed of two consecutive nonzero switching vectors and neutral vectors v 0 and v 7 (b) Spatial representation of the twelve tetrahedra.

Figure 5 .
Figure 5. Single-line scheme of two inverters connected in parallel.
have been carried out by means of a frequency response analyzer FRA5097 from NF Corporation.Figure 7d depicts the Bode plot measurements of the current loop gain in the o-channel.

Figure 7 .
Figure 7. Predicted and measured current control loops gain: (a) d-axis, (b) q-axis, and (c) o-axis.(d) Measured current control loop gain in the o-axis where *f stands for the crossover frequency, and*R and *Ɵ for the gain and the phase of the control loop at this frequency

Figure 7 .
Figure 7. Predicted and measured current control loops gain: (a) d-axis, (b) q-axis, and (c) o-axis.(d) Measured current control loop gain in the o-axis where *f stands for the crossover frequency, and *R and *θ for the gain and the phase of the control loop at this frequency.

Figure 9 .
Figure 9. Simulation results of the control of the circulating currents of two inverters connected in parallel (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor between inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.

Figure 9 .
Figure 9. Simulation results of the control of the circulating currents of two inverters connected in parallel (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor between inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.

Figure 9 .
Figure 9. Simulation results of the control of the circulating currents of two inverters connected in parallel (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor between inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.

3 Figure 10 .
Figure 10.Simulation results of the control of the circulating currents among three inverters connected in parallel (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor among inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.

Figure 11 .
Figure 11.Experimental results of the control of the circulating currents (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor between inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.

Figure 11 .
Figure 11.Experimental results of the control of the circulating currents (a) with unbalanced inductances in both inverters, (b) with unbalanced load factor between inverters, (c) with unbalanced inductances in the same inverter, (d) with a different modulation in each inverter.* stands for values that the oscilloscope did not calculate.In this case, the RMS value of Channel 8.

Table 3 .
Sequence of switching vectors in each prism.

Table 4 .
Parameters of the inverters.

Table 4 .
Parameters of the inverters.

Table 5
summarizes the test equipment of the experimental set-up.-phaseand50 Hz.Anyway, a GSS Regatron programmable power supply has set the DC bus to 500 V. Table5summarizes the test equipment of the experimental set-up. phase

Table 5 .
Instruments and laboratory material.

Table 5 .
Instruments and laboratory material.

Table 6 .
Real values of the inductance Lf of 5 mH.

Table 6 .
Real values of the inductance L f of 5 mH.

Table 7 .
Real values of the inductance L f of 7 mH.