An Interleaved Two Switch Soft-Switching Forward PWM Power Converter with Current Doubler Rectiﬁer

: Forward converters have been broadly used in the power supply industry due to their simplicity, worthy efﬁciency, and low cost. A novel prototype soft-switched zero-voltage and zero-current ZVZC PWM DC-DC power converter with low voltage/current stresses is introduced for telecommunication power feeding in this paper. A new two-switch interleaved forward converter circuit is introduced to minimalize current circulation with no supplementary auxiliary snubber circuits. This converter circuit includes some outstanding beneﬁts such as reduced components, improved efﬁciency, high power density and economic circuit conﬁgurations for high power conditioning applications. The simple operation principle is demonstrated on the basis of steady-state analysis. Furthermore, the effective feasibility of the proposed circuit topology is evaluated and veriﬁed practically for a 500 W–100 kHz prototype breadboard. The operation principle and steady-state characteristics are demonstrated from a theoretical point of view. To verify the practical effectiveness of the proposed power converter, a 500 W–100 kHz prototype converter using ultrafast IGBTs is implemented for a distributed telecommunication energy plant. The studied soft-switching converter is evaluated in comparison with the previously-proposed PWM converters in terms of voltage, current stresses, and operating efﬁciency.


Introduction
There is an increasing need to achieve higher power densities and efficiencies for power converters.This has increased the use of soft-switched converters due to the benefits of primary switch zero-voltage switching (ZVS) turn-on and zero-current switching (ZCS) turn-off [1].In particular, half-bridge or full-bridge-based LLC technology [2,3], which is more suitable for medium to high power applications, is broadly used in practical designs.Energy efficiency and power density are very important features of today's consumer electronics and industrial applications.In addition, high efficiency over a wide range of output power and the ability to operate over a wide input voltage range are important future prospects for DC-DC converters.To achieve high efficiency, it is necessary to reduce switching loss, especially in high frequency power converters.In addition, for light loads where switching loss and gate drive loss dominate [4,5], reducing switching loss is effective in achieving high efficiency.On the other hand, for relatively low power applications such as for PV systems with low power or auxiliary power in electric vehicles, a forward converter is usually recommended due to the simplicity of the design [4].According to this, some studies on forward type resonant converters were carried out [4][5][6][7][8].
Operation at hard switching of the flyback and forward converters imposes high voltage and current spikes on their switches, due to presence of transformer leakage inductance.Furthermore, switching losses result in low conversion efficiency.A passive clamp circuit can be added to dissipate the energy stored in the leakage inductance [9] and reduce the voltage stress on the switch.However, the power conversion efficiency of the circuit has not improved significantly.In recent years, active clamping techniques have been proposed for both converters to absorb the energy stored in the leakage inductance and suppress transients across the switch.In addition, the forward converter energy reset process has been completed [10][11][12][13][14].The active-clamping converters have higher efficiency than conventional forward and flyback converters because of the zero-voltage-switching (ZVS) operation of the main switch fulfilled with the help of the auxiliary switch.
Numerous types of soft-switching DC-DC power converters have been proposed.One of the most popular isolated power converters is the forward converter that has been widely implemented in low to medium power supply demands due to its simplicity, high reliability, and high efficiency [12].The HF transformer in forward and flyback converter is used for isolating the electric power signal and storing the magnetic energy.The HF transformer in the forward converter is implemented to achieve galvanic isolation and energy transformation.Resetting the HF transformer is a special feature for the forward DC-DC converter.Therefore, several forward topologies have been suggested with diverse transformer reset arrangements [13][14][15][16][17].
Among these transformer resetting topologies, the two-switch forward DC-DC converter can realize the lowest voltage stresses on the primary-side active switches [17][18][19][20][21][22][23][24][25].Moreover, the magnetizing and leakage energy can be recovered for attaining higher efficiency.Generally, the forward DC-DC converter is a promising choice in applications with high-output current requirements.The primary-side of these converters produces symmetrical AC waveforms across the primary-winding of the HF transformer.Therefore, the core flux is bi-directionally excited, resulting in a better utilization of magnetic core and results in increased power rating.Forward converters offer the advantage of better transformer utilization.Energy is transferred instantly through the transformer and not depending on energy storage [26,27].The lower peak currents produced in the two windings implies lower copper losses as compared with fly-back converter.With considerably higher magnetizing inductance and no air gap, the transformer can be made more ideal.Hence secondary ripple current is dramatically reduced due to the existence of an output inductor and freewheeling diode that keep the output current completely constant.Accordingly, the output voltage ripples are deceased radically due to higher magnetizing inductance and lower active switches peak current.The two-switch method has the lowest voltage stress, and the double-forward method has the highest efficiency [27][28][29][30].In [31], an interleaved series input parallel output (ISIPO) forward converter was proposed.The ISIPO forward converter share many of the same features, including: 1) The voltage stress of each switch is clamped to the input voltage, which is the lowest voltage stress of all the forward topologies mentioned above.No additional magnetization reset circuit is required.Moreover, high efficiency is realized by realizing the inherent degaussing by using an auxiliary diode and reusing both the leakage and the magnetization energies of the transformer.Ref. [32] introduces an interleaved twin double-ended ahead converter.Double-ended ahead converter is the extensively used topology for diverse applications.An interleaved twin double-ended ahead converter consists of double-ended ahead converters.They are operated at 180 • out of phase.
Another category of soft-switching schemes is quasi-resonant converters (QRC) and switched-capacitor resonant converters that depend on frequency control [30].Thus, magnetic components and the output filter passive devices are not optimal.Once the ZVS QRC converter is designed to achieve ZVS condition at light loads [29], the voltage stress on switches is extremely high at full load operating conditions.Likewise, for ZCS type QRC converters [31][32][33][34][35][36], the switch has a high capacitive turn-on loss due to the ZCS turn-on.Generally, voltage and current rms values are relatively high in resonantbased converters due to the sinusoidal voltage and current of the main components.In such converters, resonance occurs just before the switching time, providing PWM control for the converter.These converters provide smooth load-independent switching and operate at constant frequencies [37][38][39].Ref. [40] has introduced a zero-voltage junction (ZVT) forward converter that provides soft-switching states and resonant core resets.However, this converter uses a number of auxiliary components such as diodes, inductors, capacitors, and additional forward transformers in auxiliary circuits.In addition, the voltage load on the auxiliary switch in this circuit is the same as the voltage load on the main switch, resulting in higher capacitive turn-on loss.In [41], a zero current zero voltage transition (ZCZVT) forward converter is proposed.Like the converter in [7], this circuit has a complex topology with many components.More importantly, this converter has an additional diode in the mains path, which results in high conduction losses.This converter uses an additional resonant inductor and a series diode with an auxiliary switch, which increases the conduction loss of the converter.In addition, the auxiliary switch has a high capacitive turn-on loss.For the ZVT forward converter, the auxiliary switch is loaded with a low voltage.However, there are numerous components, including an additional resonant inductor and two diodes, increasing the complexity of the converter, and increasing the conduction loss of the auxiliary circuit [42].This circuit is useful when using IGBTs.In addition, with this converter, in addition to the capacitive turn-on loss of the switch, the main switch is subject to high voltage fluctuations during turn-off.Resonant forward DC-DC converters have been proposed previously to minimize switching losses on semiconductor switches [21][22][23][24].Generally, in high-voltage or high-current applications, the voltage or current stresses in resonant converters are extremely high.High-voltage or high-current power switches have higher cost and high conduction losses.Active-clamping techniques have been proposed with constant frequency switching to absorb the stored energy in the leakage inductor [25][26][27][28].Semiconductor devices are turned on during the transition interval at the zero-voltage switching (ZVS) utilizing the transformer leakage inductance and output capacitance of switches.Usually, the high power density and high power rating are essential in various practical applications such as power supply units in telecommunication power supplies and computer servers.One way to increase output power is to connect two or more converter cells in parallel.Thus, the current stresses and power losses can be distributed into each converter cell.Interleaved pulse-width modulation (PWM) controller can control several converter cells with phase-shifted PWM technique to realise the load current sharing and ripple current cancellation.The parallel forward converters with soft switching techniques have been presented in [29][30][31][32][33] to realise ZVS operation and achieve conversion efficiency improvement.However, the control scheme is more difficult to implement, and many switches are used in the circuits.
This paper describes a new interleaved two switch forward soft-switching transition PWM power converter topology, which can diminish the circulating and idling currents with no extra auxiliary snubber circuits.The DC-DC power converter topology treated here takes advantage of fewer components, better power conversion efficiency, higher power density and cost-effective system configuration for high power conditioning applications.The basic block diagram of the proposed converter is illustrated in Figure 1.The basic building blocks of a the studied telecommunication power supply are as follows: a rectifier/pfc stage, DC-link capacitor, interleaved two-switch forward converter, high-frequency transformer, coupled inductor-current doubler, filter and telecommunication load.The control circuit is composed of controller, voltage and current sensors and gate drive circuit.

Principle of Operation
Figure 2 shows a basic circuit configuration of the proposed DC-DC power converter using the ultrafast IGBTs, which can work as a two-switch interleaving forward power converter with high frequency link.This circuit is a modified version of the two switch interleaved forward converter shown in Figure 2b.One of the forward-type power conversion stages composed of active power switches S1, S4, high frequency transformer T2, fast-recovery diodes D2, D4, and diode rectifier D6.The other bridge leg consists of active power switches S2, S3, high frequency transformer T1, fast recovery diodes D1, D3, and rectifier diode D5.Ls1 and Ls2 are low value leakage inductances of T1 and T2, correspondingly.A tapped inductor is used in the output stage as a low-pass filter.The gate pulse sequences and ideal waveforms of the power converter are demonstrated in Figure 3.The switching pulse sequences are different from those of the conventional interleaved two switch forward type power converter.Active power switch S4 (S3) is turned off after active power S1 (S2) is turned off with a short delay time tδ.Moreover, active power switches S1 and S2 are to be driven complementary with a short blanking interval td.The output voltage can be regulated by varying a controllable interval α t as PWM with a constant switching frequency.Figure 3 schematically shows the gate-pulse control signals of the S1, S2, S3 and S4 main switches of the proposed converter (Figure 2a).The well-known interleaving clocking method is illustrated in Figure 3.To interleave N parallel-connected (or series-connected) converter cells, active switches are switched at the same frequency as the switching operation, but pulses are phase-shifted by 2π/N radians [21].

Principle of Operation
Figure 2 shows a basic circuit configuration of the proposed DC-DC power converter using the ultrafast IGBTs, which can work as a two-switch interleaving forward power converter with high frequency link.This circuit is a modified version of the two switch interleaved forward converter shown in Figure 2b.One of the forward-type power conversion stages composed of active power switches S 1 , S 4 , high frequency transformer T 2 , fast-recovery diodes D 2 , D 4 , and diode rectifier D 6 .The other bridge leg consists of active power switches S 2 , S 3 , high frequency transformer T 1 , fast recovery diodes D 1 , D 3 , and rectifier diode D 5 .Ls 1 and Ls 2 are low value leakage inductances of T 1 and T 2 , correspondingly.A tapped inductor is used in the output stage as a low-pass filter.The gate pulse sequences and ideal waveforms of the power converter are demonstrated in Figure 3.The switching pulse sequences are different from those of the conventional interleaved two switch forward type power converter.Active power switch S 4 (S 3 ) is turned off after active power S 1 (S 2 ) is turned off with a short delay time t δ .Moreover, active power switches S 1 and S 2 are to be driven complementary with a short blanking interval t d .The output voltage can be regulated by varying a controllable interval t α as PWM with a constant switching frequency.Figure 3 schematically shows the gate-pulse control signals of the S 1 , S 2 , S 3 and S 4 main switches of the proposed converter (Figure 2a).The well-known interleaving clocking method is illustrated in Figure 3.To interleave N parallel-connected (or series-connected) converter cells, active switches are switched at the same frequency as the switching operation, but pulses are phase-shifted by 2π/N radians [21].
The basic theory of operation under steady-state operating condition is described with the subsequent beliefs.

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All the active power switches and passive power components are ideal.

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High frequency transformers T 1 and T 2 are matching, so that every magnetizing and leakage inductances are characterized as Inductor L o1 and L o2 are coupled compactly and its coupling coefficient k ≈ 1.
Figure 4 shows the operating current and voltage waveforms at each circuit components.Figure 5 depicts the topological equivalent circuits for one half-cycle interval in continuous conduction mode operation.Before time t 0 , active power switches S 1 , S 4 and fast recovery rectifier diode D 6 are conducting.Switching states equivalent circuits are done using the state of each switch and diode during one switching period.This method involves defining the set of states that the circuit enters in one period of operation.This method elaborates on the converter operation during one period, and corresponding equivalent circuits are given.The basic theory of operation under steady-state operating condition is described with the subsequent beliefs.

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All the active power switches and passive power components are ideal.

•
Capacitors C1 and C2 are identical: C1 = C2 = C.   (a) Mode Interval 1 (t 0 -t 1 ): At time t 0 , active power switch S 1 is turned off under zero voltage soft switching (ZVS) transition with the aid of lossless capacitive snubbers C 1 and C 2 .Since inductances L p and L d1 are both large, magnetizing current i p2 and rectifier current i d6 are to be assumed to be constant during this interval.Capacitor voltage v c1 increases, and rectified voltage v r decreases as: where N T is the turns ratio of the high-frequency transformer (N T = N p /N s ).Because L o1 and L o2 are coupled to each other compactly, freewheeling diode D 7 starts conduction when v r reaches N L E o .On the other hand, N L is the tapped-inductor turns ratio of the and is defined as , n 1 and n 2 are the number of turns of L o1 and L d2 , respectively.(b) Mode Interval 2 (t 1 -t 2 ): The output current flows through D 7 , L o2 and L o1 .Therefore, the output current reproduced to the primary side of the transformer drops.This interval ends when voltage v c2 goes down to zero.
(c) Interval 3 (t 2 -t 3 ): Diode D 2 starts to conduct.The output current reflected to the transformer primary side continues to decrease.The current in capacitors C 1 and C 2 stops.Switch S 4 is still conducting.The energy stored in L p2 is transferring to the secondary side of HFT.However, this interval finishes when the current in diode rectifier i d6 reaches zero.
(d) Interval 4 (t 3 -t 4 ): The whole output current flows through D 7 , L o2 and L o1 .The output current reflected to the transformer primary-side decreases to zero.This means no energy is transferring to the secondary side of HFT.Only a lesser magnetizing current of the transformer T 2 circulates through transistor switch S 4 and diode D 2 .This interval ends when the gate signal is removed from power switch S 4 .Therefore, S 4 is turned off.(g) Operation interval 7(t6-t7): At time t6, the diode D7 turns off.Therefore, the total output current streams through D5 and Ld1 while the magnetizing current ip2 continues decreasing with a constant slope -E/Lp.(e) Interval 5 (t 4 -t 5 ): At time t 4 , corresponding to a delay time t δ , active power switch S 4 is turned off under zero current soft-switching (ZCS).Magnetizing current i p2 flows through D 2 and D 4 to the DC voltage supply E as a resetting action of high frequency transformer T 2 .Then i p2 start decreasing.On the other hand, the load current still circulates through D 7 , L o1 and L o2 .
(f) Interval 6 (t 5 -t 6 ): At time t 5 , depending on duty-ratio of the power converter, S 3 is turning-on under ZCS principle because the leakage inductance L s1 make softer di s3 /dt during turning-on operation of switch S 3 .Active power switch S 2 is also turning-on with hybrid ZCS and ZVS transition when current i u becomes i u < 0. This is because diode D 2 is conducting.The current in the primary-side of the HFT transformer flows through power switches S 2 and S 3 .The current of magnetizing i p1 and rectifier current i d5 starts circulation through switches S 2 and S 3 , and diode D 4 .The energy is transferring to the secondary side of HFT through L s1 and diode D 5 .During this period, the current is increasing in S 3 and D 5 .Meanwhile, current i L2 through L d2 reduces.This operation interval terminates when i L2 drops to zero.
(g) Operation interval 7(t 6 -t 7 ): At time t 6 , the diode D 7 turns off.Therefore, the total output current streams through D 5 and L d1 while the magnetizing current i p2 continues decreasing with a constant slope -E/Lp.
(h) Interval 8 (t 7 -t 8 ): This interval starts at t 7 , the HFT magnetizing current i p2 drops to zero (t = t 7 ), diode D 4 as a passive switch turns off.The electrical energy is delivered to the load through S 3 , S 2 , T 1 and D 5 .The half cycle operating intervals finish at time t 8 .The steady-state operation of the next half-cycle is similar to that of the discussed half-cycle.As mentioned above, S 1 and S 2 are turned-on and turned-off at ZVS soft-switching, while switches S 3 and S 4 behave with ZCS soft-switching at both turn-on and turn-off operation.The circulating and idling currents in both sides of high-frequency transformer HFT are considerably low with no supplementary auxiliary snubber circuits.

Steady State Operational Characteristics
The output voltage characteristics and current stress on the active power switches are analytically estimated in continuous conduction mode in this section.Figure 6 depicts applicable waveforms of rectified voltage v r and the current through inductor i L1 .
switches S3 and S4 behave with ZCS soft-switching at both turn-on and tu tion.The circulating and idling currents in both sides of high-frequency tran are considerably low with no supplementary auxiliary snubber circuits.

Steady State Operational Characteristics
The output voltage characteristics and current stress on the active po are analytically estimated in continuous conduction mode in this section.Fi applicable waveforms of rectified voltage vr and the current through induct The output voltage is controlled by adjusting the duty cycle D when current iL1 is increasing, when vr is low the current iL1 is decreasing unti comes.There are two filter inductors in series with the diode when current the load to reduce the ripples in output currents.The output capacitor has large pulsating output currents since it is supplied only during the switch O This arrangement permits more favorable trapezoidal current wavefor output current and voltage ripple, which consequently gives reduced n creased stress on semiconductors and capacitors.Due to the non-pulsating of its output current, the forward converter is well suited for applications i output currents.
The peak current stress Isp for power switches S1-S4 is given by where Th (Th = T/2) is the half-switching interval of the power converter, and ratio of the power converter represented by D = (Th-Tα)/Th.Since inductance Ls is significantly low, operational intervals from t1 to to t6 are small and negligible as depicted in Figure 6.Therefore, current i can be represented as, The output voltage is controlled by adjusting the duty cycle D when v r is high the current i L1 is increasing, when v r is low the current i L1 is decreasing until a new cycle comes.There are two filter inductors in series with the diode when current is delivered to the load to reduce the ripples in output currents.The output capacitor has to smooth out large pulsating output currents since it is supplied only during the switch OFF period.
This arrangement permits more favorable trapezoidal current waveforms and lower output current and voltage ripple, which consequently gives reduced noise and decreased stress on semiconductors and capacitors.Due to the non-pulsating characteristic of its output current, the forward converter is well suited for applications involving high output currents.
The peak current stress I sp for power switches S 1 -S 4 is given by and i p2 (t 1 ) is estimated as where T h (T h = T/2) is the half-switching interval of the power converter, and D is the duty ratio of the power converter represented by D = (T h − Tα)/T h .Since inductance L s is significantly low, operational intervals from t 1 to t 3 and from t 5 to t 6 are small and negligible as depicted in Figure 6.Therefore, current i L1 through L o1 can be represented as, Then, the current in diode i d6 (t 1 ) and ∆I Lp can be derived as where, I o is the output current and can be estimated by and Therefore, I sp is estimated by The rectified voltage v r during a half cycle period can be represented as From Equation ( 9), the output voltage E o can be derived as When leakage inductance L s is small properly, the output voltage E o is calculated as Realizing Equations ( 8) and (10), when the HFT turns ratio N L is very small as N L << 1, both characteristics of output voltage and current stresses I sp are relatively similar to those of conventional hard-switched interleaving two switches DC-DC forward power converter.However, the main advantages of the interleaving scheme in forward DC-DC converters are reduced ripples in output and input capacitor currents.This enables flexible design to use smaller capacitor banks in input and output to satisfy output voltage ripple requirements.However, the peak currents in the converter circuit are reduced by a factor of two by using two output inductors which in turn decreases the EMI contents for these topologies.The size and cost of these power converters will reduce by reducing the size of filter capacitor banks.

Experimental Results and Discussions
This section presents a precise and concise explanation of the obtained experimental results, their analysis, as well as the experimental conclusions that can be presented.A prototype with power rating of 500 W (E o = 50 V and output current I o = 10 A in experiment) 100 kHz breadboard using IGBTs is implemented in the laboratory to confirm the operating principle and validate the analytical steady state characteristics.The design specifications and the circuit parameters of this converter are designed as given in Table 1.
Table 1. Circuit parameters of prototype converter.The inductance of magnetization and leakage inductance of the high frequency transformer are utilized for Lp 1 , Lp 2 and Ls 1 , Ls 2 , respectively.The timing signal diagram of the power converter operating by means of a current mode control is illustrated in Figure 7.In order to continue operation with ZVS and ZCS soft-switching, a blanking time t d and a delay time t δ are set to 0.5 µs and 0.7 µs, respectively.
The basic timing principle elaborated in the generation of the gating signal is that the pulses generated should be able to turn ON only four semiconductor switches.A pulsed-latch is an ideal sequencing element for high-performance gate signals.The timing signal diagram of the power converter operating by means of a current mode control is implemented practically using the control circuit in Figure 8.The blanking time td and a delay time td are adjusted to continue operation with ZVS and ZCS soft-switching.The circuit composed of two op-amp comparators, latch, oscillator, S-R and T-flip-flops and delay.
Figure 9 shows the voltage current characteristics of the new interleaved two-switches forward converter at Uin = 130 V.The duty cycle of the converter circuit is 0.3, 0.5 and 0.7.It can be seen that all the observed waveforms fit the theoretical analysis well.The experimental wave forms under reduced load with output current of 2 A are shown in Figure 10.The figure shows the switch voltage and current at the mentioned operating conditions.The inductance of magnetization and leakage inductance of the high freq transformer are utilized for Lp1, Lp2 and Ls1, Ls2, respectively.The timing signal di of the power converter operating by means of a current mode control is illustra Figure 7.In order to continue operation with ZVS and ZCS soft-switching, a bla time td and a delay time δ t are set to 0.5 μs and 0.7 μs, respectively.The basic timing principle elaborated in the generation of the gating signal is t pulses generated should be able to turn ON only four semiconductor switc pulsed-latch is an ideal sequencing element for high-performance gate signals.Th ing signal diagram of the power converter operating by means of a current mode c is implemented practically using the control circuit in Figure 8.The blanking time a delay time td are adjusted to continue operation with ZVS and ZCS soft-switchin circuit composed of two op-amp comparators, latch, oscillator, S-R and T-flip-flo delay.The output voltage is calculated by Equation (10).The measured and calculated output voltages are plotted versus output current characteristics and shown in Figure 11.The duty cycle is taken as a parameter under using open loop control scheme.One can observe that the reduction of the converter output voltage produced by the existence of leakage inductance Ls is noticeably low.The actual measured efficiency is shown in Figure 12 as a function of the output load current in case of constant output voltage equal to 50 V.The achieved power conversion efficiency is equal to 93.5% during full-load operating condition.
Electronics 2022, 11, x FOR PEER REVIEW The output voltage is calculated by Equation (10).The measured and ca output voltages are plotted versus output current characteristics and shown in Fi The duty cycle is taken as a parameter under using open loop control scheme.observe that the reduction of the converter output voltage produced by the exis leakage inductance Ls is noticeably low.The actual measured efficiency is show ure 12 as a function of the output load current in case of constant output voltage 50 V.The achieved power conversion efficiency is equal to 93.5% during full-lo ating condition.

Discussion
In this section, the results are discussed and how they can be interpreted f perspective of previous studies and of the working hypotheses.The efficiency v with the output power at different voltages is shown in Figure 12.The measu ciencies of the proposed converter are evaluated at different input voltages (70 110 V and 130 V).The tested results indicate the benefits of the unique architectu energy efficiency over wide input voltage range is achieved.Table 2 shows the ca voltage and current stresses appear during operation for each power converter.parative evaluation is made for voltage and current stresses of the implemen verter from a practical point of view.However, the output voltage reduction ca the forward voltage dropping on the active power switches and diodes, and the duty cycle decrease due to the leakage inductances of the high-frequency tran HFT are approximately assessed totally as 3 V.Although the current ripple o

Discussion
In this section, the results are discussed and how they can be interpreted f perspective of previous studies and of the working hypotheses.The efficiency v with the output power at different voltages is shown in Figure 12.The measu ciencies of the proposed converter are evaluated at different input voltages (70 110 V and 130 V).The tested results indicate the benefits of the unique architectu energy efficiency over wide input voltage range is achieved.Table 2 shows the ca voltage and current stresses appear during operation for each power converter.parative evaluation is made for voltage and current stresses of the implemen verter from a practical point of view.However, the output voltage reduction ca the forward voltage dropping on the active power switches and diodes, and the duty cycle decrease due to the leakage inductances of the high-frequency tran HFT are approximately assessed totally as 3 V.Although the current ripple o

Discussion
In this section, the results are discussed and how they can be interpreted from the perspective of previous studies and of the working hypotheses.The efficiency variation with the output power at different voltages is shown in Figure 12.The measured efficiencies of the proposed converter are evaluated at different input voltages (70 V, 90 V, 110 V and 130 V).The tested results indicate the benefits of the unique architecture.High energy efficiency over wide input voltage range is achieved.Table 2 shows the calculated voltage and current stresses appear during operation for each power converter.A comparative evaluation is made for voltage and current stresses of the implemented converter from a practical point of view.However, the output voltage reduction caused by the forward voltage dropping on the active power switches and diodes, and the effective duty cycle decrease due to the leakage inductances of the high-frequency transformer HFT are approximately assessed totally as 3 V.Although the current ripple of output inductor in the studied DC-DC power converter is pretty considerable, the RMS current stresses on the inductor and the active power switches are nearly the same as compared with those of the hard-switching DC-DC power converter.The experimental results take conduction power losses of the implemented soft-switched DC-DC power converter as low as those of the hard-switched DC-DC power converter.
Turns ratio of the HFT transformer.
Current ripple in the output inductor (peak-to-peak ripple).
Peak current through active power switches.V Figure 13 shows efficiency comparison for the new and conventional interleaved forward power converter in case of 130 V input voltage.It seems that the higher the output power, the lower the efficiency.It is because the conduction losses are the major parts of total losses.All the parameters and devices of the two forward converters are the same except that the resistors RC1 and RC2 in the conventional forward converter are 510 Ω.It is obvious that the new converter can achieve higher conversion efficiency compared with the conventional one, because most of the magnetizing and leakage energy of the transformer is recycled.
References [21][22][23][24] proposed a series of schemes to improve the performance of twoswitch forward converter.Among them, references [40][41][42] have the functions of improving duty cycle and soft switching.However, all of them used auxiliary switches, which will increase the complexity of the topology.In addition, these topologies generally have high voltage stress problem in switches.
Table 3 gives a comparison between the proposed and previous circuits in terms of rating and voltage stresses on switches.
output power, the lower the efficiency.It is because the conduction losses are the parts of total losses.All the parameters and devices of the two forward converters same except that the resistors RC1 and RC2 in the conventional forward converter a Ω.It is obvious that the new converter can achieve higher conversion efficiency pared with the conventional one, because most of the magnetizing and leakage ene the transformer is recycled.

Conclusions
A soft-switched two switch interleaved forward PWM DC-DC power converter using ultrafast IGBTs has been presented as a new generation converter topology in this paper for telecommunication plants.Its operating principle of this converter has been verified with steady-state analysis and experimentally tested by 500 W-100 kHz breadboard using ultrafast IGBTs.The proposed soft-switched PWM-DC-DC converter circuit is characterized by the following exceptional characteristics:

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The switching losses are low through a wide-ranging of load variation.

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Circulating currents are low, resulting in a low amount of conduction losses.

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No need for using additional auxiliary snubber circuits.

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No existence of flux imbalance in the two high frequency transformer windings because of the existence of forward configuration of the converter.
Compared with the bridge converter, the two-switch forward converter has many advantages, such as simple structure, high stability, and simple magnetic reset method.Thus, it is very suitable for high reliability applications.The transformer in the forward converter can only excite in one direction, which means its core volume is larger than that of the bridge converter.However, in a high frequency working environment, it is the thermal stress produced by core loss, rather than the saturated flux density, that plays a major role in constraining the flux swing.Therefore, in a high frequency environment, the problem of the forward converter core size increasing is eliminated.
In the future, the transient analysis of this converter should be assessed from an experimental point of view.

Figure 1 .
Figure 1.Basic building blocks of the proposed converter.

Figure 1 .
Figure 1.Basic building blocks of the proposed converter.

Figure 2 .
Figure 2. (a) Basic circuit configuration of the studied converter.(b) Two-switch interleaved hard-switched forward DC-DC converter.Figure 2. (a) Basic circuit configuration of the studied converter.(b) Two-switch interleaved hardswitched forward DC-DC converter.

Figure 2 . 18 Figure 3 .
Figure 2. (a) Basic circuit configuration of the studied converter.(b) Two-switch interleaved hard-switched forward DC-DC converter.Figure 2. (a) Basic circuit configuration of the studied converter.(b) Two-switch interleaved hardswitched forward DC-DC converter.Electronics 2022, 11, x FOR PEER REVIEW 6 of 18

Figure 4 .
Figure 4. Typical operating waveforms of studied DC-DC power converter.(d)Interval 4 (t3-t4): The whole output current flows through D7, Lo2 and Lo1.The output current reflected to the transformer primary-side decreases to zero.This means no energy is transferring to the secondary side of HFT.Only a lesser magnetizing current of the transformer T2 circulates through transistor switch S4 and diode D2.This interval ends when the gate signal is removed from power switch S4.Therefore, S4 is turned off.(e) Interval 5 (t4-t5): At time t4, corresponding to a delay time δ t , active power switch S4 is turned off under zero current soft-switching (ZCS).Magnetizing current ip2 flows through D2 and D4 to the DC voltage supply E as a resetting action of high frequency transformer T2.Then ip2 start decreasing.On the other hand, the load current still circulates through D7, Lo1 and Lo2.(f) Interval 6 (t5-t6): At time t5, depending on duty-ratio of the power converter, S3 is turning-on under ZCS principle because the leakage inductance Ls1 make softer dis3/dt during turning-on operation of switch S3.Active power switch S2 is also turning-on with hybrid ZCS and ZVS transition when current iu becomes iu < 0. This is because diode D2 is conducting.The current in the primary-side of the HFT transformer flows through power switches S2 and S3.The current of magnetizing ip1 and rectifier current id5 starts circulation through switches S2 and S3, and diode D4.The energy is transferring to the secondary side of HFT through Ls1 and diode D5.During this period, the current is increasing in S3 and D5.Meanwhile, current iL2 through Ld2 reduces.This operation interval terminates when iL2 drops to zero.

Figure 4 .
Figure 4. Typical operating waveforms of studied DC-DC power converter.

Figure 5 .
Figure 5. Equivalent circuits of the circuit during half cycle operating intervals.

Figure 5 .
Figure 5. Equivalent circuits of the circuit during half cycle operating intervals.

Figure 6 .
Figure 6.Rectified voltage v r and inductor current i L1 operational waveforms.

Figures 9
and 10 depict observed voltages and currents waveforms under the specified conditions of E = 260 V, E o = 50 V, I o = 10 A and E = 260 V, E o = 50 V, I o = 2 A. In both cases, active semiconductor devices S 1 and S 2 operate achieving ZVS soft-switching, and active power switches S 3 and S 4 operate achieving ZCS soft-switching at turn-on and turn-off by realizing low idling and circulation currents.

Figure 7 .
Figure 7. Timing diagram of the controller.

Figure 9
Figure 9 shows the voltage current characteristics of the new interleaved two-switches forward converter at Uin = 130 V.The duty cycle of the converter circuit is 0.3, 0.5 and 0.7.It can be seen that all the observed waveforms fit the theoretical analysis well.The experimental wave forms under reduced load with output current of 2 A are shown in Figure 10.The figure shows the switch voltage and current at the mentioned operating conditions.Figures 9 and 10 depict observed voltages and currents waveforms under the specified conditions of E = 260 V, Eo = 50 V, Io = 10 A and E = 260 V, Eo = 50 V, Io =

Figure 8 .
Figure 8. Generation of gate signal for power switches.

Figure 11 .
Figure 11.Calculated and measured output voltages versus load current.

Figure 12 .
Figure 12.Measured output power at different input voltages.

Figure 11 .
Figure 11.Calculated and measured output voltages versus load current.

Figure 11 .
Figure 11.Calculated and measured output voltages versus load current.

Figure 12 .
Figure 12.Measured output power at different input voltages.

Figure 12 .
Figure 12.Measured output power at different input voltages.

Figure 13 .
Figure 13.Efficiency comparison between the conventional and developed converter.

Table 2 .
Comparison of voltage and current stresses of the proposed and conventional conv

1 Figure 13 .
Figure 13.Efficiency comparison between the conventional and developed converter.

Table 3 .
Comparison between the proposed and previous.

Table 2 .
Comparison of voltage and current stresses of the proposed and conventional converter.