Analysis of a Resonant Converter with Wide Input Voltage

: A DC-DC converter with a 16:1 ( V in,max = 16 V in,min ) wide input voltage operation is presented for auxiliary power supplies on solar power conversion circuits or railway vehicles. The solar cell output voltage is associated with the solar intensity (day or night) and geographical location. Thus, the wide input voltage capability of DC converters is required for photovoltaic power conversion. For low power supplies on railway vehicles, the nominal input voltages are 24 V~110 V for the electric door system, motor drive, solid state lighting systems and braking systems. The presented converter uses buck/boost and resonant circuits to achieve the wide input voltage range operation from 18 V to 288 V. If V in stays on a low input voltage range (18 V~72 V), the buck/boost circuit is operated at a voltage boost characteristic. On the other hand, the buck/boost circuit is operated at a voltage buck characteristic when the input voltage climbs to a high voltage range (72 V~288 V). Thus, the buck/boost circuit can output a constant voltage. Then, the resonant circuit in the second stage is worked at a constant input voltage case so that the frequency variation range is reduced. Finally, to investigate the performance and effectiveness of the studied circuit, experiments with a 500 W prototype were conducted to investigate the performance of the studied circuit.


Introduction
Wide voltage range DC-DC converters have been discussed and presented for solar cell power conversion due to the variable output voltage of the photovoltaic panel. The output voltage of a photovoltaic panel depends on the solar intensity of the day and night. Therefore, DC converters with a wide voltage range are developed for solar power conversion and the self-supplying power units are developed for remote control systems. Wide voltage DC-DC converters are also needed on a railway vehicle due to many different nominal DC voltages (24 V~110 V) that are requested for the communication system, lighting system, electric door system and braking system. Thus, pulse-width modulation (PWM) converters with a wide voltage operation are welcomed and demanded on railway power supply units. Multi-stage converters [1,2] have been proposed to actualize the wide voltage capability operation. The buck or boost circuit topology is selected on the front-stage to achieve a buck or boost operation. The flyback, forward or half-bridge circuit topology with pulse-width modulation is adopted on the rear-stage to regulate output voltage. However, these solutions have high switching losses on power devices and the input voltage range is still limited at V in,max ≤ 4V in,min or V in,max ≤ 6V in,min . Seriesparallel connection DC converters have been discussed in [3][4][5]. Unfortunately, the circuit structure is too complicated and more expensive for use in low or medium power supplies. Single-stage DC converters with a PWM operation were discussed in [6][7][8][9][10][11][12] to extend the input voltage range. However, the input voltage range in [6][7][8][9][10][11][12] is still limited at V in,max ≤ 4V in,min . In [13], the thermal constraints issue has been discussed for a currentmode monolithic DC-DC converter.
In this paper, we present and investigate a DC-DC converter that has a 16:1 (V in = 288 V~18 V) wide voltage operation and soft switching turn-on operation. To realize a 16:1 wide voltage operation, a buck/boost DC-DC circuit is utilized in the first stage to accomplish either a voltage boost action if the V in is on a low input voltage range (V in,min < V in < 4V in,min ) or a voltage buck action if the V in is on a high input voltage range (4V in,min < V in < 16V in,min ). Therefore, the output terminal voltage of the buck/boost converter is controlled at a constant value. An LLC converter is used in the rear-stage to control the output voltage while accomplishing zero voltage switching (ZVS) for active devices. Since the input voltage of the LLC converter is almost constant due to the buck/boost converter regulation, the variation in switching frequency is limited to a narrow frequency range. Compared to conventional DC-DC converters and multi-stage converters, the main contributions in this paper are (1) the wide voltage range action, (2) the soft switching operation in the second stage circuit, and (3) the simple control scheme. The converter characteristics are confirmed by the experiments using a prototype circuit. Figure 1 provides the circuit schematic of the presented PWM converter with the function of a 16:1 voltage range operation for PV panel power converters or the auxiliary power on railway vehicles. The presented circuit is a two-stage DC converter. The frontstage is a buck/boost circuit and the rear-stage is an LLC converter. The components of a buck/boost circuit include Q 1 , D 1 , L f , Q 2 , D 2 and C dc . The LLC converter includes L r , S 1 , S 2 , T, C r , D o1 , D o2 and C o . The buck/boost circuit can achieve a wide input voltage range operation. When V in < V dc , the buck/boost circuit is operated at a voltage boost. On the other hand, the buck/boost circuit is worked at a buck operation if V in > V dc . The LLC resonant circuit in the rear-stage is operated at a constant input voltage V dc condition. Therefore, the switching frequency of a resonant circuit can be designed at a series resonant frequency to lessen the magnetizing current losses, while, at the same time, having ZVS characteristics for switches S 1 and S 2 and diodes D o1 and D o2 . According to the input voltage range, the presented converter can be operated at two voltage ranges (V in,min~4 V in,min ) and (4V in,min~1 6V in,min ). When V in is greater than V in,min and less than 4V in,min , the switch Q 1 is on, diode D 1 is on the reverse biased and Q 2 is controlled with pulse-width modulation. Thus, the buck/boost circuit is worked like a boost converter to achieve a voltage step-up characteristic, as shown in Figure 2a. The DC bus voltage V dc is controlled at the reference voltage V dc,ref and the LLC resonant circuit is controlled at a constant input voltage case. When 4V in,min < V in < 16V in,min , switch Q 2 is off and switch Q 1 is controlled with a pulse-width modulation scheme to control the DC bus voltage V dc = V dc,ref . Thus, the buck/boost converter is working as a buck converter to achieve a voltage step-down characteristic, as shown in Figure 2b. According to the adopted control algorithm, the studied converter has a 16:1 (V in,max = 16V in,min ) voltage range operation for a solar PV panel power conversion and a railway vehicle with low power supplies and applications.

Circuit Structure
In this paper, we present and investigate a DC-DC converter that has a 16:1 (Vin = V~18 V) wide voltage operation and soft switching turn-on operation. To realize a wide voltage operation, a buck/boost DC-DC circuit is utilized in the first stage to acc plish either a voltage boost action if the Vin is on a low input voltage range (Vin,min < 4Vin,min) or a voltage buck action if the Vin is on a high input voltage range (4Vin,min < 16Vin,min). Therefore, the output terminal voltage of the buck/boost converter is contro at a constant value. An LLC converter is used in the rear-stage to control the output vo while accomplishing zero voltage switching (ZVS) for active devices. Since the input age of the LLC converter is almost constant due to the buck/boost converter regula the variation in switching frequency is limited to a narrow frequency range. Compare conventional DC-DC converters and multi-stage converters, the main contributions in paper are (1) the wide voltage range action, (2) the soft switching operation in the sec stage circuit, and (3) the simple control scheme. The converter characteristics are firmed by the experiments using a prototype circuit. Figure 1 provides the circuit schematic of the presented PWM converter with function of a 16:1 voltage range operation for PV panel power converters or the auxi power on railway vehicles. The presented circuit is a two-stage DC converter. The fr stage is a buck/boost circuit and the rear-stage is an LLC converter. The components buck/boost circuit include Q1, D1, Lf, Q2, D2 and Cdc. The LLC converter includes Lr, S T, Cr, Do1, Do2 and Co. The buck/boost circuit can achieve a wide input voltage range o ation. When Vin < Vdc, the buck/boost circuit is operated at a voltage boost. On the o hand, the buck/boost circuit is worked at a buck operation if Vin > Vdc. The LLC reso circuit in the rear-stage is operated at a constant input voltage Vdc condition. There the switching frequency of a resonant circuit can be designed at a series resonant quency to lessen the magnetizing current losses, while, at the same time, having ZVS c acteristics for switches S1 and S2 and diodes Do1 and Do2. According to the input vol range, the presented converter can be operated at two voltage ranges (Vin,min~4Vin,min) (4Vin,min~16Vin,min). When Vin is greater than Vin,min and less than 4Vin,min, the switch Q1 i diode D1 is on the reverse biased and Q2 is controlled with pulse-width modulation. T the buck/boost circuit is worked like a boost converter to achieve a voltage step-up c acteristic, as shown in Figure 2a. The DC bus voltage Vdc is controlled at the refer voltage Vdc,ref and the LLC resonant circuit is controlled at a constant input voltage When 4Vin,min < Vin < 16Vin,min, switch Q2 is off and switch Q1 is controlled with a pulse-w modulation scheme to control the DC bus voltage Vdc = Vdc,ref. Thus, the buck/boost verter is working as a buck converter to achieve a voltage step-down characteristi shown in Figure 2b. According to the adopted control algorithm, the studied conv has a 16:1 (Vin,max = 16Vin,min) voltage range operation for a solar PV panel power conver and a railway vehicle with low power supplies and applications. Figure 1. The circuit diagram of the presented converter with 16:1 (Vin,max = 16Vin,min) voltage ra operation.

Operation Principle
The studied converter is a two-stage circuit. The front-stage is a to achieve either a voltage boost action if Vin is on a low input volta buck action if Vin is on a high input voltage range. The buck/boost by a pulse-width modulation. The second stage is an LLC resonan plish both electric isolation and a ZVS turn-on operation for active

Circuit Operation of the Buck/Boost Converter
The buck/boost converter can work at a voltage boost operati To accomplish a wide voltage operation, the DC bus voltage of the is controlled at Vdc = 4Vin,min. When Vin,min ≤ Vin < 4Vin,min, the buck/bo at a boost operation ( Figure 2a)and Q1 is on, diode D1 is off and Q2 is width modulation to have a voltage boost action. Figure 3a gives th buck/boost converter for a voltage step-up action. Under a continu operation, two circuit modes are observed (Figure 3b,c). Based on ance on the inductor Lf, the DC bus voltage Vdc is obtained as dQ1Vin where dQ1 and dQ2 are duty cycles of Q1 and Q2, respectively, and d operation.

Operation Principle
The studied converter is a two-stage circuit. The front-stage is a buck/boost converter to achieve either a voltage boost action if V in is on a low input voltage range or a voltage buck action if V in is on a high input voltage range. The buck/boost converter is regulated by a pulse-width modulation. The second stage is an LLC resonant converter to accomplish both electric isolation and a ZVS turn-on operation for active devices.

Circuit Operation of the Buck/Boost Converter
The buck/boost converter can work at a voltage boost operation or buck operation. To accomplish a wide voltage operation, the DC bus voltage of the buck/boost converter is controlled at V dc = 4V in,min . When V in,min ≤ V in < 4V in,min , the buck/boost converter operates at a boost operation ( Figure 2a)and Q 1 is on, diode D 1 is off and Q 2 is controlled by a pulsewidth modulation to have a voltage boost action. Figure 3a gives the PWM signals of the buck/boost converter for a voltage step-up action. Under a continuous conduction mode operation, two circuit modes are observed (Figure 3b,c). Based on a voltage-second balance on the inductor L f , the DC bus voltage V dc is obtained as where d Q1 and d Q2 are duty cycles of Q 1 and Q 2 , respectively, and d Q1 = 1 under the boost operation.
Mode 1 [t 0~t0 + d Q2 T sw ]: At t = t 0 , Q 2 is activated to turn on. Since Q 1 is always on and D 1 is reverse biased for the voltage boost operation, the voltage across on L f can be obtained as v Lf = V in and v D2 is −V DC . The inductor current i Lf increases and the diode D 2 is reverse biased. Capacitor C dc is discharged to supply current i dc to the secondstage resonant converter.  When 4Vin,min < Vin ≤ 16Vin,min, the buck/boost converter operates as a volt down operation (Figure 2b). The switch Q2 is controlled at an off state, diode D2 conducting and Q1 is activated by pulse-width modulation to accomplish a volt down. The pulse-width modulation waveforms of the voltage step-down oper given in Figure 4a and two circuit modes are shown in Figure 4b,c under a co conduction mode. Based on a flux balance on inductor Lf, the DC bus voltage Vd lated as dQ1Vin/(1 − dQ2) = dQ1Vin where dQ2 = 0 under the buck operation.
Mode 1 [t0~t0 + dQ1Tsw]: At time t0, Q1 turns on. Since Q2 is always off and D2 is biased for the voltage step-down operation, the inductor voltage vLf = Vin − Vdc>0 −Vin. In this mode, iLf increases, the D1 is reverse biased and Cdc is charged.
The drain-to-source voltage of Q 2 is equal to the DC bus voltage V dc . Mode 2 is ended at time t 0 + T sw .
When 4V in,min < V in ≤ 16V in,min , the buck/boost converter operates as a voltage step-down operation (Figure 2b). The switch Q 2 is controlled at an off state, diode D 2 is always conducting and Q 1 is activated by pulse-width modulation to accomplish a voltage step-down. The pulse-width modulation waveforms of the voltage step-down operation are given in Figure 4a and two circuit modes are shown in Figure 4b,c under a

Circuit Operation of the LLC Resonant Circuit
Since the DC bus voltage Vdc is a constant voltage due to the buck/boost circ ation, the LLC resonant converter is operated under almost constant voltage Vdc. switching frequency of the LLC resonant circuit is controlled at a limited narrow f range. The converter voltage gain is calculated as GLLC = 2nVo/Vdc = 2nVo (1 − d Figure 5a gives the main circuit waveforms of the resonant converter and  Mode 1 [t 0~t0 + d Q1 T sw ]: At time t 0 , Q 1 turns on. Since Q 2 is always off and D 2 is forward biased for the voltage step-down operation, the inductor voltage v Lf = V in − V dc > 0 and v D1 is −V in . In this mode, i Lf increases, the D 1 is reverse biased and C dc is charged.
Mode 2 [t 0 + d Q1 T sw~t0 + T sw ]: At time t 0 + d Q1 T sw , Q 1 turns off. In mode 2, v Lf = −V dc , i Lf decreases, v Q1,ds = V in , v Q2,ds = V dc and C dc is discharged. This mode ends at time t 0 + T sw .

Circuit Operation of the LLC Resonant Circuit
Since the DC bus voltage V dc is a constant voltage due to the buck/boost circuit operation, the LLC resonant converter is operated under almost constant voltage V dc . Thus, the switching frequency of the LLC resonant circuit is controlled at a limited narrow frequency range. The converter voltage gain is calculated as Figure 5a gives the main circuit waveforms of the resonant converter and Figure 5b-g shows the six mode operations.  Mode 1 [t 0~t1 ]: At time t < t 0 , the active device S 1 is off, v CS1 is positive and i Lr is negative. At time t 0 , v CS1 = 0 and D S1 is conducting. After time t 0 , S 1 can turn on at the ZVS action. Since D o1 is conducting, v Lm = nV o . Power is delivered to a load side through the components S 1 , L r , T, C r and D o1 . L r and C r are naturally resonant, with frequency f r = 1/2π √ L r C r . If f r is greater than the switching frequency f sw , then the circuit proceeds to mode 2, or it goes to mode 3.
Mode 2 [t 1~t2 ]: Since f r > f sw , i Do1 will decrease to 0 at t 1 . D o1 is off. i Lr will flow through S 1 , L m , L r and C r . Together with L r and L m , C r is naturally resonant, with frequency f m = 1/2π (L m + L r )C r and f m < f r .
Mode 3 [t 2~t3 ]: Active device S 1 is turned off at time t 2 under zero voltage. After time t 2 , i Lr > 0 and i Lr < i Lm . Thus, C S2 (C S1 ) discharges (charges) and the secondary diode D o2 conducts.
Mode 4 [t 3~t4 ]: At time t 3 , C S2 is discharged to zero and D S2 is conducting due to i Lr (t 3 ) > 0. After t 3 , S 2 turns on under zero voltage. D o2 is forward biased on the secondary side, v Lm = −nV o . Energy stored on C r is transferred to the output load. L r and C r are naturally resonant, with frequency f r .
Mode 5 [t 4~t5 ]: If f sw < f r , then i D2 will decrease to 0 at t 4 . D o2 is reverse biased. No power is delivered to the output load. L r , L m and C r are naturally resonant, with frequency f m .

Circuit Characteristics
The buck/boost converter is operated by a 16:1 wide voltage range operation. The output voltage V dc of the buck/boost converter is controlled at V dc,ref = 4V in,min . If V in is on a low voltage range (V in < V dc,ref = 4V in,min ), then the converter is operated at the boost operation. As a result, Q 1 stays on, Q 2 is operated by a duty cycle control and D 1 is reverse biased. When V in is on a high input voltage range (V in > V dc,ref = 4V in,min ), the converter is operated at a buck operation. As a result, Q 2 stays off and Q 1 is operated by pulse-width modulation. Thus, the LLC resonant circuit is operated at a constant input voltage of V dc = 4V in,min . The buck/boost converter is controlled at a continuous conduction mode. For the boost operation, V Lf = V in (or V in − V o ) if Q 2 is on (or off) as shown in Figure 3. For the buck operation, V Lf = V in − V o (or −V o ) if Q 1 is on (or off) as shown in Figure 4. For a continuous conduction mode, the DC bus voltage V dc is calculated as: where d Q1 and d Q2 are duty cycles of Q 1 and Q 2 , respectively. V in is greater than V in,min and less than 4V in,min on the low voltage range. Therefore, the maximum and minimum duty cycles of Q 2 are expressed as: In the same manner, the maximum and minimum duty cycles of Q 1 are expressed as (4) and (5) on the high input voltage range (4V in,min < V in < 16V in,min ).
d Q1,min = V dc,re f /16V in,min If the DC bus current and d Q1 and d Q2 are given, then the root mean square (rms) currents I Q1,rms and I Q2,rms are obtained in (6) and (7).
From the on/off states of Q 1 , Q 2 , D 1 and D 2 , the voltage ratings of Q 1 and Q 2 are V in,max and V dc , respectively. The average currents I D1 and I D2 are obtained in (8) and (9).
V in,max and V dc are the voltage ratings of D 1 and D 2 respectively. Based on the boost or buck operation, the rms inductor current is calculated as: The half-bridge resonant circuit is controlled with pulse frequency modulation. Since S 1 and S 2 have a 50% duty cycle, a square wave voltage waveform with 0 and V dc is generated on voltage v ab . The rms value of v ab approximates V ab,rms = √ 2V dc /π. According to the conducting states of D o1 and D o2 , a square voltage waveform is generated on the magnetizing voltage v Lm and V Lm,rms = 2 √ 2nV o /π. The fundamental primary-side resistance is calculated as R ac = 8n 2 R o /π 2 , where R o is the DC load resistance. Since the resonant tank (L m , C r , L r and R ac ) is adopted in the rear-stage, in (11) the voltage transfer function of the resonant tank is obtained.
where L B = L m /L r , Q = √ L r /C r /R ac and f n = f sw /f r . Since the DC bus voltage V dc is regulated at V dc,ref by the front-stage buck/boost circuit, the switching frequency f sw depends on I o or R o . The LLC resonant circuit is controlled at an inductive load. Therefore, active devices of the resonant circuit are operated using a soft switching operation.

Experimental Results
The studied circuit is tested and investigated to show the performance of the prototype circuit. The prototype is designed under the following specifications: V in = 288 V~18 V (16:1 ratio), V o = 12 V, P o,rated = 500 W and f r = 60 kHz. When V in = 18 V~65 V, the buck/boost converter is controlled at boost operation. The voltage V dc is maintained at 72 V. If the input voltage V in = 76 V~288 V, then the buck/boost converter is operated at a buck operation and the DC bus voltage V dc = 72 V. However, no voltage step-up or step-down is operated on the buck/boost converter when 65 V < V in < 76 V. Q 1 (Q 2 ) is on (off) under this condition and V dc = V in . Therefore, the resonant circuit is designed under the input of a DC bus voltage V dc = 65 V~76 V. Two Schmitt voltage comparators are used to detect the three input voltage ranges 18 V~65 V, 65 V~76 V and 76 V~288 V. If V in is on a low voltage range (18 V~65 V), Q 2 is controlled by a duty cycle scheme to achieve a boost operation. The duty cycle of Q 2 is calculated in (12) and (13) under continuous conduction mode.
For a high input voltage range of 76 V~288 V, Q 1 is controlled by a duty cycle scheme to achieve a buck operation. The duty cycle of Q 1 is given in (14) and (15) under continuous conduction mode.
It is assumed that the ripple current ∆i Lf is 5% of the maximum input current at 18 V of input voltage. Therefore, inductance L f is given in (16).
The rms switch currents I Q1,rms and the I Q2,rms are expressed in (17) and (18).
The voltage ratings of Q 1 and Q 2 are V in,max = 288 V and V dc,max = 76 V. Switch Q 1 used two MOSFETs STB35N60DM2 (STMicroelectronics, Geneva, Switzerland) with 600 V/28 A ratings, while switch Q 2 adopted MOSFET IRFB4110PbF (Infineon Technologies, Neubiberg, Germany) with 100 V/120 A ratings. The average diode currents of D 1 and D 2 are obtained in (19) and (20).
D 1 has a voltage stress of V in,max = 288 V and D 2 has a voltage stress of V dc,max = 76 V. SF1006G (TSMC, Hsinchu, Taiwan) and STPS20SM100S (STMicroelectronics, Geneva, Switzerland) with 400 V/10 A and 100 V/20 A ratings are used for diodes D 1 and D 2 , respectively.
For the LLC resonant circuit design, the necessary resonant frequency and inductor ratio are selected as f r = 60 kHz and L B = 8. The minimum, nominal and maximum DC bus voltages are 65 V, 72 V and 76 V, respectively. The nominal voltage gain of G nom at V dc,nom = 72 V is designed at unity. Therefore, the turn-ratio n of the transformer is calculated as follows.
Electronics 2021, 10, 1110 10 of 15 The TDK EER42 with n s = 4 and n p = 12 is used for the transformer T. Thus, the voltage gains G LLC,max and G LLC,min at V dc = 65 V and 76 V are calculated in (22) and (23).
For full rated power, the fundamental primary-side resistance R ac is obtained in (24).
The selected quality factor Q is 0.7. From the given Q, R ac and f r , the resonant inductance L r is obtained as: due to L B = 8, L m = L B × L r = 31.2 µH. C r can be calculated as: The voltage ratings of S 1 and S 2 equal V dc,max = 76 V and the voltage rating of diodes D o1 and D o2 equals 2V o = 24 V. Power switches IPP111N15N3 (150 V/83 A) are adopted for active devices S 1 and S 2 and S60SC6M (60 V/60 A) (Shindengen Electric Manufacturing, Tokyo, Japan) switches are selected for D o1 and D o2 . The selected C dc = 680 µF and C o = 1000 µF. UC3843 (Texas Instruments, Dallas, TX, USA) is selected to regulate the buck/boost circuit while the UCC25600 (Texas Instruments, Dallas, TX, USA) is adopted to regulate the LLC resonant circuit. Figure 6 illustrates the experiments of the presented converter at V in = 18 V and the rated power. Since V in = 18 V < V dc = 72 V, the buck/boost converter is operated at a boost operation. Therefore, Q 1 is on and Q 2 is controlled by the duty cycle modulation. Figure 6a shows the experimental waveforms of v Q2,g , i Lf , i Q2 and i D2 . When Q 2 is on or off, the i Lf equals i Q2 or i D2 . Figure 6b provides the test results of the input voltage V in , dc bus voltage V dc , the gate voltage v Q2,g and leg voltage v ab . The duty cycle of Q 2 equals 0.75, V dc > V in (boost operation) and the leg voltage v ab is a square voltage. Figure 6c gives the primary-side experimental waveforms of the LLC resonant circuit at full load. As the switching frequency is close to the resonant frequency, v Cr and i Lr are sinusoidal waveforms and v ab is a square waveform. Since the half-bridge LLC is controlled in the second stage, the v Cr contains a DC voltage value (v Cr,dc = V dc /2). Figure 6d provides the secondary side currents and load voltage at full load. The output voltage is regulated at 12 V and the load current I o = 42 A. No serious reverse recovery current is observed on the rectifier diodes D o1 and D o2 . In the same manner, Figure 7 illustrates the experiments at V in = 65 V and the rated power conditions. Since V in = 65 V < V dc = 72 V, the duty cycle of Q 2 is calculated as 0.1. The measured waveforms v Q2,g , i Lf , i Q2 and i D2 are shown in Figure 7a. The experimental waveforms V in , V dc , v Q2,g and v ab are illustrated in Figure 7b. The experimental waveforms of the resonant converter are provided in Figure 7c,d. Since V dc = 72 V by the buck/boost converter for both V in = 18 V and 65 V, it can be seen that the measured waveforms of the resonant converter under V in = 18 V (Figure 6c,d) and V in = 65 V (Figure 7c,d) are identical. Figures 8 and 9 show the experiments of the proposed circuit for V in = 76 V and 288 V input on the high input voltage range and rated power. When the input voltage ranges between 76 V and 288 V, the buck/boost circuit is controlled at a buck operation and Q 2 is off. The duty cycle of Q 1 equals 0.95 (0.25) at V in = 76 V (288 V). The measured waveforms of v Q1,g , i Lf , i Q1 and i D1 at V in = 76 V and 288 V are illustrated in Figures 8a and 9a. The buck/boost converter is operated at a buck operation and V dc is controlled at 72 V for both V in = 76 V and V in = 288 V. The experiments of the resonant converter for a 76 V (288 V) input are shown in Figure 8c,d (Figure 9c,d). When 65 V < V in < 76 V, Q 1 is on and Q 2 is off. No voltage step-up or step-down is realized on the buck/boost converter so that the DC bus voltage V dc = V in . Under this condition, only the resonant converter is worked to regulate the load voltage. Figures 10 and 11 provide the measured waveforms of the resonant circuit at 67 V and 74 V input and the rated power. When V dc = 67 V, the resonant converter needs more voltage gain compared to V dc = 72 V and f sw < f r . Thus, i Lr likes a quasi-sinusoidal signal in Figure 10a and D o1 and D o2 are turned off at zero current switching in Figure 10b. In the same manner, the switching frequency at V dc = 74 V shown in Figure 11 is greater than the resonant frequency in order to achieve a lower voltage gain. Figure 12 illustrates the experiments of S 1 at V in = 18 V, 67 V, 74 V and 288 V. Figure 12a,b shows the experimental waveforms of S 1 under 20% load and full load at V in = 18 V condition. In the same manner, Figure 12c,d gives the measured results of S 1 at 67 V input. Figure 12e,f provides the test results of S 1 at 74 V input. Likewise, Figure 12g,h shows the experimental waveforms of S 1 at 288 V input (high input voltage range). From the test results in Figure 12, it can be seen that S 1 turns on at ZVS from a 20% load for all input voltage ranges and turns off at hard switching. Since switch S 2 possesses the same switching characteristics as S 1 , it can be expected that S 2 also turns on under zero voltage from a 20% load and turns off at hard switching.
Electronics 2021, 10, x FOR PEER REVIEW 11 of 15 same manner, the switching frequency at Vdc = 74 V shown in Figure 11 is greater than the resonant frequency in order to achieve a lower voltage gain. Figure 12 illustrates the experiments of S1 at Vin = 18 V, 67 V, 74 V and 288 V. Figure 12a,b shows the experimental waveforms of S1 under 20% load and full load at Vin = 18 V condition. In the same manner, Figure 12c,d gives the measured results of S1 at 67 V input. Figure 12e,f provides the test results of S1 at 74 V input. Likewise, Figure 12g,h shows the experimental waveforms of S1 at 288 V input (high input voltage range). From the test results in Figure 12, it can be seen that S1 turns on at ZVS from a 20% load for all input voltage ranges and turns off at hard switching. Since switch S2 possesses the same switching characteristics as S1, it can be expected that S2 also turns on under zero voltage from a 20% load and turns off at hard switching.     (c) (d)