Phase and Neutral Current Ripple Analysis in Three-Phase Four-Wire Split-Capacitor Grid Converter for EV Chargers

: The current switching ripple in a three-phase four-wire split-capacitor converter is analyzed in this paper for all the four ac output wires in relation to both balanced and unbalanced working conditions. Speciﬁcally, analytical formulations of the peak-to-peak and root mean square (RMS) current ripples are originally evaluated as a function of the modulation index, separately for the three phases and the neutral wire. Initially, the single-carrier sinusoidal pulse width modulation (PWM) technique is outlined, as it generally concerns a straightforward and effective modulation. With the aim of mitigating the current ripple in the neutral wire, the interleaved multiple-carrier PWM strategy is adopted, also avoiding any repercussion on the phase one. Numerical simulations and experimental tests were carried out to verify all the analytical developments.

Carrier-based pulse width modulation (PWM) schemes are broadly adopted in most AC-DC converters by virtue of their effectiveness and simplicity in digital and analog implementations, besides the renowned harmonic spectrum property [13]. Additionally, the fixed switching frequency leads to simple control of the switching losses and, hence, a more precise converter design, as well as a more accurate computation of the losses [14].
The AC current ripple is one of the most helpful parameters in designing a power switching converter. If correctly determined, it paves the way for a set of design optimization possibilities ranging from converter weight, volume, and cost to filtering stage complexity and power efficiency. Deep knowledge of the current spectral content results vital in EV charging applications, where grid harmonic pollution is regulated by international standards [8]. Moreover, optimizing converter performance might be especially effective in on-board chargers (OBCs), where strict design constraints are unavoidable.
In [8], the peak-to-peak and root mean square (RMS) values of the AC current ripple were exhaustively analyzed in a three-phase four-leg AC-DC converter, as well as analytically described as a function of the modulation index for both phase and neutral wires, under sinusoidal PWM (SPWM), and space vector PWM (SVPWM). The latter study has been extended in [15] to the three-phase four-leg SPWM converter with neutral line inductor proposing optimal phase to neutral inductor ratio for achieving performance optimization in grid-connected applications. Authors in [14] studied the close relationship between AC current ripple and switching losses under discontinuous PWM (DPWM) in three-phase four-leg inverters. In [16], the AC phase current ripple in three-phase splitcapacitor inverters was preliminarily studied, but no experimental validation has been proposed. Three-phase split-capacitor inverter switching voltage ripple has been studied in [17] under single-phase, two-phase, and three-phase working conditions. Many papers have reported results of the output current ripple analysis in the three-phase three-wire VSIs as well. However, no similar studies other than [16] AC current ripple analysis in three-phase, four-wire, split-capacitor converters. No thorough investigation of the neutral current ripple has been delineated in the literature yet.
A possible way to reduce the current ripple in PWM converters is to interleave the leg carriers. For example, an interleaved control strategy that can guarantee ripple-free operation for any working condition has been introduced in [18] in the case of multi-leg DC-DC converters. A method that relies on carriers interleaving in three-phase, three-wire VSIs was proposed in [19] with a view to achieving a significant reduction of peak-to-peak and RMS values of common-mode voltage. This method has been successfully extended to multiphase inverters in [20]. Similarly, an original technique that suppresses zero-sequence circulating current in modular, interleaved, three-phase, three-wire VSIs has been proposed in [21]. Authors in [22] proposed an interleaved half-bridge submodule-based modular multilevel converter (MMC) capable of reducing current ripple and increasing the number of voltage levels.
This paper is aimed to render an analytical evaluation of the AC current ripple in three-phase, four-wire, split-capacitor converters in the case of balanced and unbalanced working conditions for phase and neutral wires. Outcomes on peak-to-peak and RMS values of phase current ripple only have been preliminarily introduced in [16] (without experimental validation), as functions of the modulation index, enabling a straightforward comparison with the corresponding characteristics of three-phase three-wire VSIs. The analysis is carried out with reference to the sinusoidal PWM since the degree of freedom of the common-mode injection in the modulating signals is missing for this topology. The single-carrier PWM, which has been employed for the three-phase, four-wire, splitcapacitor topology, does not differ from the conventional PWM adopted for the three-phase, three-wire topology since no modulation is required for the neutral leg. On the other hand, the multiple-carrier PWM strategy proposed in [5] has been examined for the neutral current ripple mitigation. This neutral current ripple reduction method takes advantage of carriers interleaving (mentioned above), partially canceling phase current ripples, rather than summing them up. Original analytical developments to determine peak-to-peak and RMS of the neutral current ripple have also been performed in this paper considering interleaved carriers.
The discussion is arranged as follows. In Section 2, the basic assumptions and the PWM principle are introduced. Section 3 shows mathematical formulations of the phase current ripple related to peak-to-peak and RMS values for balanced and unbalanced operating conditions (i.e., three phases with different modulation indices). The neutral current ripple assessments in single-and multiple-carrier PWM cases are given in Sections 4 and 5, respectively. Section 6 reports experimental results to verify the validity of the proposed analytical developments. Lastly, conclusions are drawn in Section 7.

Basic Assumptions and Modulation Principle
The considered circuit scheme is represented in Figure 1. It consists of a three-phase, four-wire, split-capacitor converter. In comparison with a three-phase, three-wire inverter, a 4th wire is inserted to directly connect the midpoint of the DC-link (split) capacitors to the neutral wire of the grid/load. In the case of a grid connection, as in EV applications, the converter can work as an active rectifier: with AC-to-DC power flow when operating in grid-to-vehicle (G2V) operations or DC-to-AC power flow in case of V2G ones (Figure 1). For this reason, words like converter, inverter, and active rectifier are considered interchangeable. The converter presents inherent flexibility that permits topology reconfigurations to enable single-phase, two-phase, and three-phase balanced/unbalanced operations that can be extensively used in innovative services like V2G, V4G, V2H, V2V, and V2L [17]. The three AC-link filter inductors L are here considered to be magnetically independent.

Basic Assumptions and Modulation Principle
The considered circuit scheme is represented in Figure 1. It consists of a three-phase, four-wire, split-capacitor converter. In comparison with a three-phase, three-wire inverter, a 4th wire is inserted to directly connect the midpoint of the DC-link (split) capacitors to the neutral wire of the grid/load. In the case of a grid connection, as in EV applications, the converter can work as an active rectifier: with AC-to-DC power flow when operating in grid-to-vehicle (G2V) operations or DC-to-AC power flow in case of V2G ones ( Figure 1). For this reason, words like converter, inverter, and active rectifier are considered interchangeable. The converter presents inherent flexibility that permits topology reconfigurations to enable single-phase, two-phase, and three-phase balanced/unbalanced operations that can be extensively used in innovative services like V2G, V4G, V2H, V2V, and V2L [17]. The three AC-link filter inductors L are here considered to be magnetically independent. For carrier-based PWM inverters, the three modulating signals are given by the sinusoidal phase reference voltages (normalized by the dc-link voltage Vdc): being x the phase index (a, b, c), ϑx and φx the phase angles, ω the fundamental (grid) angular frequency, and m the modulation index defined as: being * the RMS value of the reference phase voltage. The carrier range is ±0.5, and the corresponding linear modulation span is m = [0, 0.5]. The main PWM signals are summarized in Figure 2. For carrier-based PWM inverters, the three modulating signals are given by the sinusoidal phase reference voltages (normalized by the dc-link voltage V dc ): being x the phase index (a, b, c), ϑ x and ϕ x the phase angles, ω the fundamental (grid) angular frequency, and m the modulation index defined as: being V * x the RMS value of the reference phase voltage. The carrier range is ±0.5, and the corresponding linear modulation span is m = [0, 0.5]. The main PWM signals are summarized in Figure 2. Thanks to the phase independence guaranteed by this topology, it is theoretically possible to drive this converter employing any grade of unbalance freely. For this reason, when possible, analytical derivations are kept general preserving subscript "x" for both modulation index mx and phase angle ϑx. Considering balanced operating conditions, the parameters in Equations (1) and (2) become ma = mb = mc = m and ϑa = ϑ = ωt, ϑb = ϑ − 2π/3, ϑc = ϑ + 2π/3. For simplicity reasons, the unbalanced working condition is depicted only by different modulation indices (e.g., ma = 0.3, mb = 0.4, and mc = 0.5), assuming symmetric phase angles. In such a manner, although grid-connected applications are usually employed with almost symmetric modulation indices (ma ≅ mb ≅ mc = m), three cases with different modulation indices are displayed and validated simultaneously. Since introducing phase angle unbalances would only lead to current ripple shifting in time without interferences between the phases, current ripple illustrations later provided in Section 3 do not lose generality.

Evaluation of the Phase Current Ripple
With reference to Figure 1, for each phase (inductive load/grid), the inverter phase voltage equation can be written as: where depicts the inverter instantaneous phase voltage, is the instantaneous phase current, represents the grid phase voltage, and R is the equivalent series resistance. Both and can be written in terms of harmonic components as: where ̅ and ̅ represent the fundamental (low-frequency) components (i.e., the instantaneous values averaged over the switching period Tsw), and ̂ and ̂ represent the switching ripple components (high-frequency). It must be noted that grid phase voltage is eventually almost sinusoidal, with negligible ripple components. Consequently, by rewriting Equation (3) and focusing solely on the ripple components, one may obtain: Thanks to the phase independence guaranteed by this topology, it is theoretically possible to drive this converter employing any grade of unbalance freely. For this reason, when possible, analytical derivations are kept general preserving subscript "x" for both modulation index m x and phase angle ϑ x . Considering balanced operating conditions, the parameters in Equations (1) and (2) become m a = m b = m c = m and ϑ a = ϑ = ωt, ϑ b = ϑ − 2π/3, ϑ c = ϑ + 2π/3. For simplicity reasons, the unbalanced working condition is depicted only by different modulation indices (e.g., m a = 0.3, m b = 0.4, and m c = 0.5), assuming symmetric phase angles. In such a manner, although grid-connected applications are usually employed with almost symmetric modulation indices (m a ∼ = m b ∼ = m c = m), three cases with different modulation indices are displayed and validated simultaneously. Since introducing phase angle unbalances would only lead to current ripple shifting in time without interferences between the phases, current ripple illustrations later provided in Section 3 do not lose generality.

Evaluation of the Phase Current Ripple
With reference to Figure 1, for each phase (inductive load/grid), the inverter phase voltage equation can be written as: where v x depicts the inverter instantaneous phase voltage, i x is the instantaneous phase current, e x represents the grid phase voltage, and R is the equivalent series resistance.
Both v x and i x can be written in terms of harmonic components as: where v x and i x represent the fundamental (low-frequency) components (i.e., the instantaneous values averaged over the switching period T sw ), andv x andî x represent the switching ripple components (high-frequency). It must be noted that grid phase voltage e x is eventually almost sinusoidal, with negligible ripple components. Consequently, by rewriting Equation (3) and focusing solely on the ripple components, one may obtain: Since the resistive voltage drop due to current rippleî x is negligible in comparison with the voltage ripple componentv x (having an amplitude in the order of V dc ), Equation (5) is simplified as:v Finally, as commonly accepted, the instantaneous current ripple can be computed by replacing Equation (4) in Equation (6) and integrating over any abstract period (t), leading to:î The peak-to-peak current ripple over the switching period T sw (depicted in Figure 2) can be defined as:î

Peak-to-Peak of Phase Current Ripple
Basing on Figure 2, and considering the modulating signals introduced in Equation (1), the application time intervals t x are expressed as follow: In the linear modulation range, the inverter phase voltage averaged over the switching period is given by: To determine the peak-to-peak current ripple, only the intervals t x can be considered. By introducing Equation (10) in Equation (7) and bearing in mind thatî x (0) = 0 ( Figure 2), Equation (7) can be rewritten as follows: By replacing Equation (9) in Equation (11) and simplifying, it becomes: Equation (12) can be normalized by the factor of V dc /(2Lf sw ), obtaining the normalized peak-to-peak current ripple:r Figure 3 displays the distribution of the normalized peak-to-peak current ripple magnitude, given by Equation (13), for a three-phase, four-wire, split-capacitor inverter with modulation range m x = [0, 0.5] and phase angle ϑ x diapason [−π/2, π/2]. . Normalized, peak-to-peak, phase current ripple as a function of the modulation index mx, and phase angle ϑx. On the left-hand side, a comparison of the normalized maximum peak-topeak values in the case of three-phase three-leg ("3leg") and three-phase split-capacitor converters.
To compare the conventional three-wire (3-leg) VSI with the considered four-wire split-capacitor configuration, the maximum peak-to-peak ripple currents for both topologies are depicted in Figure 3, as a function of mx (2D traces on the left-hand side of the 3D axes box). About the three-wire topology, one can observe that the maximum peak-topeak current ripple rises with the modulation index. Nevertheless, considering the fourwire split-capacitor inverter, the normalized maximum peak-to-peak value of the phase current ripple occurs at ϑx = π/2, and it is always constant (equal to 0.5) and independent from the modulation index.
To validate the theoretical developments presented in this and the following sections, some numerical simulations are carried out in MATLAB/Simulink environment. The inverter load consists of an RLC circuit with a unity power factor (at the fundamental frequency) to emulate a typical grid-connected application. In this way, the inverter modulation can be performed without grid current controllers, then an open-loop operation is allowed for the system. The circuit model has been set with the actual setup parameters later used in Section 6 (experimental results).
The simulation results of Figure 4 illustrate the three-phase currents along with the calculated envelopes (Equation (12)) in case of modulation amplitude unbalance ma = 0.3, mb = 0.4, and mc = 0.5.   . Normalized, peak-to-peak, phase current ripple as a function of the modulation index m x , and phase angle ϑ x . On the left-hand side, a comparison of the normalized maximum peak-to-peak values in the case of three-phase three-leg ("3leg") and three-phase split-capacitor converters.
To compare the conventional three-wire (3-leg) VSI with the considered four-wire splitcapacitor configuration, the maximum peak-to-peak ripple currents for both topologies are depicted in Figure 3, as a function of m x (2D traces on the left-hand side of the 3D axes box). About the three-wire topology, one can observe that the maximum peak-to-peak current ripple rises with the modulation index. Nevertheless, considering the four-wire split-capacitor inverter, the normalized maximum peak-to-peak value of the phase current ripple occurs at ϑ x = π/2, and it is always constant (equal to 0.5) and independent from the modulation index.
To validate the theoretical developments presented in this and the following sections, some numerical simulations are carried out in MATLAB/Simulink environment. The inverter load consists of an RLC circuit with a unity power factor (at the fundamental frequency) to emulate a typical grid-connected application. In this way, the inverter modulation can be performed without grid current controllers, then an open-loop operation is allowed for the system. The circuit model has been set with the actual setup parameters later used in Section 6 (experimental results).
The simulation results of Figure 4 illustrate the three-phase currents along with the calculated envelopes (Equation (12)  . Normalized, peak-to-peak, phase current ripple as a function of the modulation index mx, and phase angle ϑx. On the left-hand side, a comparison of the normalized maximum peak-topeak values in the case of three-phase three-leg ("3leg") and three-phase split-capacitor converters.
To compare the conventional three-wire (3-leg) VSI with the considered four-wire split-capacitor configuration, the maximum peak-to-peak ripple currents for both topologies are depicted in Figure 3, as a function of mx (2D traces on the left-hand side of the 3D axes box). About the three-wire topology, one can observe that the maximum peak-topeak current ripple rises with the modulation index. Nevertheless, considering the fourwire split-capacitor inverter, the normalized maximum peak-to-peak value of the phase current ripple occurs at ϑx = π/2, and it is always constant (equal to 0.5) and independent from the modulation index.
To validate the theoretical developments presented in this and the following sections, some numerical simulations are carried out in MATLAB/Simulink environment. The inverter load consists of an RLC circuit with a unity power factor (at the fundamental frequency) to emulate a typical grid-connected application. In this way, the inverter modulation can be performed without grid current controllers, then an open-loop operation is allowed for the system. The circuit model has been set with the actual setup parameters later used in Section 6 (experimental results).
The simulation results of Figure 4 illustrate the three-phase currents along with the calculated envelopes (Equation (12)) in case of modulation amplitude unbalance ma = 0.3, mb = 0.4, and mc = 0.5.    the fundamental current component) and normalization action. Note that the upper/lower envelopes correspond to half of the peak-to-peak values given in Equations (11) and (12). As expected, the simulation results show a very good match with the derived equations.
Electronics 2021, 10, x FOR PEER REVIEW 7 of 20 upper/lower envelopes correspond to half of the peak-to-peak values given in Equations (11) and (12). As expected, the simulation results show a very good match with the derived equations.

RMS of Phase Current Ripple
Basing on the previous analysis, the instantaneous current ripple always has a triangular wave shape with a peak-to-peak amplitude obtained by Equation (12), justifiable for both balanced and unbalanced conditions. Bearing in mind that the crest factor of a triangular waveform is √3, the current ripple RMS over the half of the fundamental period is determined as: By introducing Equation (12) in Equation (14), and integrating, leads to: Similar to Equation (12), the normalization of Equation (15) leads to the normalized RMS of the phase current ripple: Equations (15) and (16) can be effortlessly used for computing harmonic pollution figures of merit like total harmonic distortion (THD), total demand distortion (TDD), and distortion index (DIN). Figure 6 depicts the normalized phase current ripple RMS calculated by Equation (16) (blue line) and the corresponding values obtained by numerical simulations (red squares). A perfect agreement between analytical and numerical results can be observed.

RMS of Phase Current Ripple
Basing on the previous analysis, the instantaneous current ripple always has a triangular wave shape with a peak-to-peak amplitude obtained by Equation (12), justifiable for both balanced and unbalanced conditions. Bearing in mind that the crest factor of a triangular waveform is √ 3, the current ripple RMS over the half of the fundamental period is determined as: By introducing Equation (12) in Equation (14), and integrating, leads to: Similar to Equation (12), the normalization of Equation (15) leads to the normalized RMS of the phase current ripple: Equations (15) and (16) can be effortlessly used for computing harmonic pollution figures of merit like total harmonic distortion (THD), total demand distortion (TDD), and distortion index (DIN). By comparison, the normalized phase current ripple RMS for a three-phase threewire inverter is also depicted in Figure 6 (black dashed line). In this case, the phase current ripple RMS is nearly a linear function of modulation index, starting from 0 (m = 0) up to 0.055 (m = 0.5), whereas a decreasing function of the modulation index in the case of the four-wire, split-capacitor inverter is observed, from 0.144 (m = 0) up to 0.085 (m = 0.5).
As a result, and in the effort to reduce the AC current ripple, it appears opportune to use this four-wire, split-capacitor topology only when there is a real need to handle unbalanced currents (through the neutral wire in either single-phase, two-phase, and threephase conditions), whereas, in case of balanced currents, the conventional three-wire inverter would be a preferable choice (i.e., the neutral wire should be isolated).
Aiming to reduce harmonic pollution, novel techniques might benefit from the presented phase current ripple analysis for fine-tuning variable switching frequency PWM techniques capable of reducing maximum current ripple peak-to-peak at high values of modulation index. Thanks to the phase independence, particularly appreciable results are to be expected.

Evaluation of Neutral Current Ripple
Concerning Figure 1, the instantaneous neutral current in and "virtual" neutral voltage are defined as: note that corresponds to three times the inverter common-mode voltage. Similar to phase quantities, neutral current, and voltage can be specified in terms of low-and highfrequency harmonic components by setting x = n in Equation (4).
To preserve a generic analysis of neutral current ripple, all the parameters mx and ϑx that are describing the phase currents should be considered in Equation (17). However, for practical applicability purposes, the neutral current ripple has been analyzed considering nearly balanced modulating signals (ma ≅ mb ≅ mc = m). In fact, due to the grid voltage symmetry and the small value of the AC-link reactance (usually in the order of 0.05-0.08 p.u.), most of the grid-connected applications (such as EV charging) concern with almost balanced modulating signals even in the presence of unbalanced currents. In this way, neutral current ripple analytical derivations are kept simple and straightforward. However, their validity results to be reduced in load-driving configurations, where strongly unsymmetric voltages would be beneficial for compensating unbalances/faults. As known, unbalanced phase currents introduce a fundamental component also in the neutral current. Figure 7 shows the virtual neutral voltage (top) and neutral current ripple ̂ (bottom) in one switching period. Referring to Figures 2 and 7, in case of balanced working conditions, the time intervals within the phase range 0 ≤ ϑ ≤ π/3 are given by: By comparison, the normalized phase current ripple RMS for a three-phase three-wire inverter is also depicted in Figure 6 (black dashed line). In this case, the phase current ripple RMS is nearly a linear function of modulation index, starting from 0 (m = 0) up to 0.055 (m = 0.5), whereas a decreasing function of the modulation index in the case of the four-wire, split-capacitor inverter is observed, from 0.144 (m = 0) up to 0.085 (m = 0.5).
As a result, and in the effort to reduce the AC current ripple, it appears opportune to use this four-wire, split-capacitor topology only when there is a real need to handle unbalanced currents (through the neutral wire in either single-phase, two-phase, and three-phase conditions), whereas, in case of balanced currents, the conventional three-wire inverter would be a preferable choice (i.e., the neutral wire should be isolated).
Aiming to reduce harmonic pollution, novel techniques might benefit from the presented phase current ripple analysis for fine-tuning variable switching frequency PWM techniques capable of reducing maximum current ripple peak-to-peak at high values of modulation index. Thanks to the phase independence, particularly appreciable results are to be expected.

Evaluation of Neutral Current Ripple
Concerning Figure 1, the instantaneous neutral current i n and "virtual" neutral voltage v n are defined as: note that v n corresponds to three times the inverter common-mode voltage. Similar to phase quantities, neutral current, and voltage can be specified in terms of low-and high-frequency harmonic components by setting x = n in Equation (4).
To preserve a generic analysis of neutral current ripple, all the parameters m x and ϑ x that are describing the phase currents i x should be considered in Equation (17). However, for practical applicability purposes, the neutral current ripple has been analyzed considering nearly balanced modulating signals (m a ∼ = m b ∼ = m c = m). In fact, due to the grid voltage symmetry and the small value of the AC-link reactance (usually in the order of 0.05-0.08 p.u.), most of the grid-connected applications (such as EV charging) concern with almost balanced modulating signals even in the presence of unbalanced currents. In this way, neutral current ripple analytical derivations are kept simple and straightforward. However, their validity results to be reduced in load-driving configurations, where strongly unsymmetric voltages would be beneficial for compensating unbalances/faults. As known, unbalanced phase currents introduce a fundamental component also in the neutral current.  Figure 7 shows the virtual neutral voltage v n (top) and neutral current rippleî n (bottom) in one switching period. Referring to Figures 2 and 7, in case of balanced working conditions, the time intervals within the phase range 0 ≤ ϑ ≤ π/3 are given by:

Peak-to-Peak of Phase Current Ripple
The instantaneous neutral current ripple variation can be calculated similarly to Equation (7). By considering nearly balanced working conditions, ̅ ≈ 0 (̂≈ ), it gives: In the case of single-carrier PWM, one may notice that the neutral current ripple has a periodicity of T/6. Consequently, the analysis can be restricted to a phase angle range of π/3. With reference to the phase angle range 0 ≤ ϑ ≤ π/3, the peak-to-peak neutral current ripple can be evaluated based on Equation (19). Taking into account the time intervals t1 and t2 (Figure 7) and bearing in mind that, due to the symmetry, ̂(0) = 0, Equation (19) gives: By introducing Equation (18) in Equation (20), and simplifying, yields to: A normalization factor Vdc/(2Lfsw) can be considered for Equation (21), leading to the normalized peak-to-peak neutral current ripple: In the considered phase angle range 0 ≤ ϑ ≤ π/3, which is the period of the peak-topeak neutral current ripple, the maximum occurs at the range borders, i.e., for ϑ = 0 and π/3, leading to:

Peak-to-Peak of Phase Current Ripple
The instantaneous neutral current ripple variation can be calculated similarly to Equation (7). By considering nearly balanced working conditions, v n ≈ 0 (v n ≈ v n ), it gives:î In the case of single-carrier PWM, one may notice that the neutral current ripple has a periodicity of T/6. Consequently, the analysis can be restricted to a phase angle range of π/3. With reference to the phase angle range 0 ≤ ϑ ≤ π/3, the peak-to-peak neutral current ripple can be evaluated based on Equation (19). Taking into account the time intervals t 1 and t 2 ( Figure 7) and bearing in mind that, due to the symmetry,î n (0) = 0, Equation (19) gives:î By introducing Equation (18) in Equation (20), and simplifying, yields to: A normalization factor V dc /(2Lf sw ) can be considered for Equation (21), leading to the normalized peak-to-peak neutral current ripple: In the considered phase angle range 0 ≤ ϑ ≤ π/3, which is the period of the peak-topeak neutral current ripple, the maximum occurs at the range borders, i.e., for ϑ = 0 and π/3, leading to:r max n,pp (m) = 3 2 (1 − m) In the next section is presented the normalized peak-to-peak of the neutral current, given by Equation (22), together with its maximum, given by Equation (23), as a function of m.

RMS of Neutral Current Ripple
As shown in Figure 7, the neutral current ripple does not have a triangular-like waveform. For this reason, the calculation of its RMS is not straightforward, unlike the phase current ripple one. The neutral current ripple has a linear piecewise waveform, made of four intervals in one-half of the switching period (here identified with k = 1, 2, . . . , 4). The neutral current ripple can be seen as the composition of DC and AC components over each time interval. The AC component has a sawtooth-like waveform. Given that DC and AC components are for the RMS orthogonal, the RMS valueÎ nk over each interval can be written as:Î Considering that √ 3 is the sawtooth crest factor, and according to Figure 7, Equation (24) can be explicitly rewritten as: For the odd symmetry of the neutral current ripple, its RMS over the whole switching period T sw can be calculated by composing the individual RMS over each time interval k (25) as:Î Finally, the total neutral current ripple RMS is obtained by integrating Equation (26) over the phase angle period [0, π/3]: By normalizing Equation (27), as for Equations (21) and (22), it becomes:

Mitigation of Neutral Current Ripple
In applying the conventional PWM strategy to the four-wire, split-capacitor configuration, a single triangular carrier is adopted for all three phases. As mentioned in the foregoing sections, the three phases of such inverter topology are entirely independent of each other, owing to the shared fourth wire connection. Consequently, an effective way to attenuate the neutral current ripple is to consider three interleaved carriers (cr a , cr b , cr c ) and comparing to the corresponding three modulating signals (u a , u b , u c ) to drive the three inverter legs [5]. Although the line-to-line voltage waveforms slightly degrade in this circumstance, it does not introduce any effects on the line-to-neutral voltages and the corresponding phase currents.
Differently from the single-carrier PWM, levels and pulse durations ofv n within the linear range of m depend on both m, and ϑ. In this context, several subcases are possible. Based on the example of Figure 8, that is valid in the case of balanced sinusoidal modulation and with m < 1/3, the time intervals become: ration, a single triangular carrier is adopted for all three phases. As mentioned in the fore-going sections, the three phases of such inverter topology are entirely independent of each other, owing to the shared fourth wire connection. Consequently, an effective way to attenuate the neutral current ripple is to consider three interleaved carriers (cra, crb, crc) and comparing to the corresponding three modulating signals (ua, ub, uc) to drive the three inverter legs [5]. Although the line-to-line voltage waveforms slightly degrade in this circumstance, it does not introduce any effects on the line-to-neutral voltages and the corresponding phase currents. Differently from the single-carrier PWM, levels and pulse durations of ̂ within the linear range of m depend on both m, and ϑ. In this context, several subcases are possible. Based on the example of Figure 8, that is valid in the case of balanced sinusoidal modulation and with m < 1/3, the time intervals become:

Peak-to-Peak of Neutral Current Ripple (Interleaved)
Unlike in Figures 2 and 7, the envelope of ̂ is not symmetric anymore and ̂(0) ≠ 0. Given that the average of ̂ must be zero over a switching period, the neutral current ripple is determined from Equation (19) as:

Peak-to-Peak of Neutral Current Ripple (Interleaved)
Unlike in Figures 2 and 7, the envelope ofî n is not symmetric anymore andî n (0) = 0. Given that the average ofî n must be zero over a switching period, the neutral current ripple is determined from Equation (19) as: Considering the pulse pattern of Figure 8 and the timings introduced in Equation (29), Equation (30) can be formulated as follows: where t is an equivalent time period depending on the phase pulses disposition at the initial time t = 0, resulting in: It has been noticed that the neutral current ripple has asymmetric positive (upper) and negative (lower) envelope profiles, both having the same shape and the same periodicity 2π/3 (T/3) but displaced by π/3 one from another. Thus, the analysis can be limited to the angle range π/3.
Concerning the phase angle range −π/6 ≤ ϑ ≤ π/6 and to the example shown in Figure 8, the positive (upper) envelope of the neutral current ripple can be evaluated by considering the time intervals t 1 , t 2 , t 3 , leading to: Similarly, the negative (lower) envelope is given by: By the definition given by Equation (8), the peak-to-peak neutral current ripple in case of interleaved carriers (here denoted by an asterisk, "*") becomes: Note that the same result can be obtained by considering the maximum time interval t k to calculate the peak-to-peak ripple: The peak-to-peak neutral current ripple can also be defined over the whole fundamental period and by considering the double of the maximum positive (or minimum negative) ripple amplitude, i.e., by replacing ϑ = −π/6 in Equation (33): It has been numerically verified that practically the same results (33)-(37) can be obtained for higher values of m, i.e., 1/3 < m < 1/2, despite the increased complexity of the derivation process.

RMS of Neutral Current Ripple (Interleaved)
By following the same approach introduced in Section 4.2, it is possible to evaluate the neutral current ripple RMS in interleaved carriers PWM. Results can be distinguished from Section 4.2 ones because denoted with the "*" symbol. In this context,î n (0) should be considered in Equation (24). Thus, the ripple RMSÎ * nk in the six intervals is: By replacing Equation (38) in Equation (26), yields to: Unlike the single-carrier PWM, the RMS of the neutral current ripple over each switching period is invariant from phase angle ϑ. Consequently, Equation (39) also represents the RMS of the neutral current ripple over a fundamental period.
As stated before, voltage levels may change depending on m and ϑ. Thus, Equation (39) is valid for m ≤ 1/3. However, it has been numerically verified that Equation (39) gives an excellent approximation also in case of higher values of m, avoiding cumbersome calculations without additional insights.
Equation (39) can be normalized, leading to: As pointed out for the phase current ripple RMS, Equations (27), (28), (39) and (40) permit the simple computations of common metrics such as THD, TDD, and DIN.

Comparison of Neutral Current Ripple in Case of Single-Carrier and Three Interleaved Carries
By comparison, Figure 9 shows peak-to-peak neutral current ripple (normalized) in the case of single-carrier and three interleaved carriers, given by Equations (21) and (36), respectively, as a function of modulation index m and angle ϑ in a 3D plot.
The maximum peak-to-peak neutral current ripples over one fundamental period are shown in Figure 9 as a function of m (2D plot on the left-hand side of the 3D axes box) for both the modulation cases. The benefit of interleaving carriers is evident, resulting in a relevant decrease of the peak-to-peak neutral current ripple in the whole range of m and ϑ. In the worst case (high values of modulating index), the maximum peak-to-peak results are halved compared to the single carrier counterpart. Figure 10 illustrates the instantaneous neutral current ripple and the calculated envelopes for the two considered cases in the normalized form. For the single-carrier PWM, the neutral current ripple envelopes (±î n,pp /2) are defined by Equation (21), whereas, in the case of interleaved carriers PWM, upper and lower envelopes (î + n,pk andî − n,pk ) are evaluated by Equations (33) and (34), respectively.

Comparison of Neutral Current Ripple in Case of Single-Carrier and Three Interleaved Carries
By comparison, Figure 9 shows peak-to-peak neutral current ripple (normalized) in the case of single-carrier and three interleaved carriers, given by Equations (21) and Equation (36), respectively, as a function of modulation index m and angle ϑ in a 3D plot. Figure 9. Normalized, peak-to-peak, neutral current ripple as a function of the modulation index m and phase angle ϑ in single (top 3D plot) and three interleaved (bottom 3D plot) carriers. On the left-hand side, a comparison of the normalized maximum peak-to-peak values in single carriers and three interleaved ("*") carriers.
Electronics 2021, 10, x FOR PEER REVIEW 14 of 20 Figure 9. Normalized, peak-to-peak, neutral current ripple as a function of the modulation index m and phase angle ϑ in single (top 3D plot) and three interleaved (bottom 3D plot) carriers. On the left-hand side, a comparison of the normalized maximum peak-to-peak values in single carriers and three interleaved ("*") carriers.
The maximum peak-to-peak neutral current ripples over one fundamental period are shown in Figure 9 as a function of m (2D plot on the left-hand side of the 3D axes box) for both the modulation cases. The benefit of interleaving carriers is evident, resulting in a relevant decrease of the peak-to-peak neutral current ripple in the whole range of m and ϑ. In the worst case (high values of modulating index), the maximum peak-to-peak results are halved compared to the single carrier counterpart. Figure 10 illustrates the instantaneous neutral current ripple and the calculated envelopes for the two considered cases in the normalized form. For the single-carrier PWM, the neutral current ripple envelopes (±̂, /2) are defined by Equation (21) Figure 11 illustrates the comparison of the normalized neutral current ripple RMS as a function of m for both modulation techniques. The RMS is calculated by Equation (28) and Equation (40) in single-carrier and interleaved-carriers PWMs, respectively. As shown, the matching between analytically derived values (continuous lines) and numerical simulation results (green squares/diamonds) is more than satisfactory. It worth noticing that the neutral current ripple mitigation technique here studied reduces by at least 50% the neutral current ripple RMS in comparison with the standard single-carrier PWM. Moreover, similarly to the phase current ripple RMS of Figure 6, normalized values range around 0.1 p.u. level. In this way, taking advantage of phase filter sizing, the neutral wire might not need a specific filter design to comply with international standards like IEC 61000-3-2 and IEEE Std 519.  Figure 11 illustrates the comparison of the normalized neutral current ripple RMS as a function of m for both modulation techniques. The RMS is calculated by Equations (28) and (40) in single-carrier and interleaved-carriers PWMs, respectively. As shown, the matching between analytically derived values (continuous lines) and numerical simulation results (green squares/diamonds) is more than satisfactory. It worth noticing that the neutral current ripple mitigation technique here studied reduces by at least 50% the neutral current ripple RMS in comparison with the standard single-carrier PWM. Moreover, similarly to the phase current ripple RMS of Figure 6, normalized values range around 0.1 p.u. level. In this way, taking advantage of phase filter sizing, the neutral wire might not need a specific filter design to comply with international standards like IEC 61000-3-2 and IEEE Std 519. Figure 11. Three-phase split-capacitor converter normalized RMS numerical data points (green squares/diamonds, "sim") and analytical profiles (solid lines) of the neutral current ripple as a function of the modulation index mx in case of single and three interleaved ("*") carriers.
A similar technique has been proposed in [19,20], aimed to mitigate the commonmode output voltage in three-phase, three-wire inverters. However, in the case of three wires, the modulation method with interleaved carriers degrades the harmonic spectrum of the output voltages/currents compared to standard single-carrier PWM methods [19].

Experimental Results
The theoretical developments introduced in the previous sections have been verified by the experimental tests carried out by the setup shown in Figure 12a. As visible in Figure  12b, the circuit scheme corresponds to a unity power-factor three-phase load connected to the four-wire split-capacitor inverter. In this way, it is possible to emulate power flow from the DC to AC side as it would happen in V2G applications without involving any closed-loop control. Test bench main parameters are given in Table 1. The three-phase split-capacitor inverter is made out of one IGBT (insulated-gate bipolar transistor) from Mitsubishi Electric (PS22A76), and it is feed by a TDK-Lambda (GEN100-33) controllable power supply. The inverter is driven using a Texas Instruments (TMS320 F28379D) DSP controlled from MATLAB/Simulink (Mathworks) environment. Currents and voltages are sensed using LEM LA 55-P current sensors and Pico TA057 voltage probes, respectively. Data is acquired employing Rigol (DS1054Z) digital oscilloscopes using a sampling rate of 5MS/s.  A similar technique has been proposed in [19,20], aimed to mitigate the commonmode output voltage in three-phase, three-wire inverters. However, in the case of three wires, the modulation method with interleaved carriers degrades the harmonic spectrum of the output voltages/currents compared to standard single-carrier PWM methods [19].

Experimental Results
The theoretical developments introduced in the previous sections have been verified by the experimental tests carried out by the setup shown in Figure 12a. As visible in Figure 12b, the circuit scheme corresponds to a unity power-factor three-phase load connected to the four-wire split-capacitor inverter. In this way, it is possible to emulate power flow from the DC to AC side as it would happen in V2G applications without involving any closed-loop control. Test bench main parameters are given in Table 1. The three-phase split-capacitor inverter is made out of one IGBT (insulated-gate bipolar transistor) from Mitsubishi Electric (PS22A76), and it is feed by a TDK-Lambda (GEN100-33) controllable power supply. The inverter is driven using a Texas Instruments (TMS320 F28379D) DSP controlled from MATLAB/Simulink (Mathworks) environment. Currents and voltages are sensed using LEM LA 55-P current sensors and Pico TA057 voltage probes, respectively. Data is acquired employing Rigol (DS1054Z) digital oscilloscopes using a sampling rate of 5MS/s.  Figure 13 shows measured phase currents with their calculated envelopes for the corresponding case study presented in Figure 4 (modulation index unbalance ma = 0.3, mb = 0.4, and mc = 0.5). Moreover, having conducted experimental results employing the same switching frequency used in numerical validation of Figure 4, an at-glance comparison between the two pictures is enabled. The bounding envelopes (black lines) described by Equation (12) are exactly the same used in Figure 4.   Figure 13 shows measured phase currents with their calculated envelopes for the corresponding case study presented in Figure 4 (modulation index unbalance m a = 0.3, m b = 0.4, and m c = 0.5). Moreover, having conducted experimental results employing the same switching frequency used in numerical validation of Figure 4, an at-glance comparison between the two pictures is enabled. The bounding envelopes (black lines) described by Equation (12) Figure 13 shows measured phase currents with their calculated envelopes for the corresponding case study presented in Figure 4 (modulation index unbalance ma = 0.3, mb = 0.4, and mc = 0.5). Moreover, having conducted experimental results employing the same switching frequency used in numerical validation of Figure 4, an at-glance comparison between the two pictures is enabled. The bounding envelopes (black lines) described by Equation (12) are exactly the same used in Figure 4.  Figure 14 shows the instantaneous neutral current ripples for single-carrier PWM (upper plot) and three interleaved carriers PWM (bottom plot), along with their theoretical envelopes. The experimental results presented in Figure 14 corresponds to the simulation results presented in Figure 10, considering balanced working conditions (m = 0.4) and switching frequency fsw = 3.6 kHz. Also in this case, the neutral current ripple envelopes have been evaluated by Equation (21) for single-carrier PWM (±̂, /2), and by Equations (33) and (34) for interleaved carriers PWM (̂, + and ̂, − , respectively). Different from Figure 10, traces in Figure 14 are not normalized. A high-pass filter (1 kHz cut-off frequency) has been applied to eliminate the low-frequency noise, due to the small unbalance of the actual setup load. A reasonably good matching between experimental, numerical, and theoretical results can be observed.  Figure 14 shows the instantaneous neutral current ripples for single-carrier PWM (upper plot) and three interleaved carriers PWM (bottom plot), along with their theoretical envelopes. The experimental results presented in Figure 14 corresponds to the simulation results presented in Figure 10, considering balanced working conditions (m = 0.4) and switching frequency f sw = 3.6 kHz. Also in this case, the neutral current ripple envelopes have been evaluated by Equation (21) for single-carrier PWM (±î n,pp /2), and by Equations (33) and (34) for interleaved carriers PWM (î + n,pk andî − n,pk , respectively). Different from Figure 10, traces in Figure 14 are not normalized. A high-pass filter (1 kHz cut-off frequency) has been applied to eliminate the low-frequency noise, due to the small unbalance of the actual setup load. A reasonably good matching between experimental, numerical, and theoretical results can be observed.
The effect of interleaving the carriers is not visible in the phase-to-neutral voltages (and in phase currents), whereas it appears on the line-to-line voltages. In particular, Figure 15 shows the line-to-line voltages measured between phases b and c (v bc ) in the cases of single-carrier PWM (upper plot) and interleaved carriers PWM (bottom plot).
Finally, Figure 16 shows the RMS values of phase and neutral current ripples (in balanced modulation conditions) for single-carrier and interleaved carriers PWM. The theoretical results obtained by Equations (15), (27) and (39) are displayed by continuous lines, whereas circular and triangular markers identify the experimental measurements. Also in this case, a good agreement between experimental and theoretical results can be observed in the whole range of the modulation index m.  Finally, Figure 16 shows the RMS values of phase and neutral current ripples (in balanced modulation conditions) for single-carrier and interleaved carriers PWM. The theoretical results obtained by Equations (15), (27), and (39) are displayed by continuous lines, whereas circular and triangular markers identify the experimental measurements. Also in this case, a good agreement between experimental and theoretical results can be observed in the whole range of the modulation index m.  Finally, Figure 16 shows the RMS values of phase and neutral current ripples (in balanced modulation conditions) for single-carrier and interleaved carriers PWM. The theoretical results obtained by Equations (15), (27), and (39) are displayed by continuous lines, whereas circular and triangular markers identify the experimental measurements. Also in this case, a good agreement between experimental and theoretical results can be observed in the whole range of the modulation index m.

Conclusions
The characterization of instantaneous AC output current ripple for a three-phase, four-wire, split-capacitor PWM converter is provided in this paper. Specifically, the peakto-peak current ripple has been analytically defined over the entire fundamental period as a function of the generic modulation index and phase angle for balanced and unbalanced operating conditions. In this way, presented mathematical tools can be utilized in Figure 16. Experimental (markers) and theoretical (solid lines) current ripple RMS as a function of the modulation index m of phase (x) and neutral currents in case of single and three interleaved ("*") carriers.

Conclusions
The characterization of instantaneous AC output current ripple for a three-phase, fourwire, split-capacitor PWM converter is provided in this paper. Specifically, the peak-to-peak current ripple has been analytically defined over the entire fundamental period as a function of the generic modulation index and phase angle for balanced and unbalanced operating conditions. In this way, presented mathematical tools can be utilized in theoretically any context where a converter capable of morphing into single-phase, two-phase, and threephase is requested. The maximum boundary of the peak-to-peak current ripple has also been obtained, based on analytical functions. The current ripple RMS has been computed as well. It has been shown that the maximum peak-to-peak phase current ripple is constant in the whole modulation index range, and the lower is the modulation index, the higher is the phase current ripple RMS. The results have been compared with the corresponding ones in the case of a three-phase, three-wire PWM inverter.
The analysis of both peak-to-peak and RMS of the current ripple has also been considered for the neutral (4th) wire in case of quasi-balanced operating conditions. This permits to have straightforward and effective formulations useful in grid-connected applications. The study has also been extended to the case of interleaved carriers PWM, implemented to reduce the neutral current ripple without drawbacks on the phase current ripples. In particular, a reduction of at least 50% in the maximum neutral current ripple peak-to-peak and neutral current ripple RMS has been achieved. Moreover, this technique makes neutral ripple magnitude comparable (if not even smaller) to phase one for the benefits of the converter design. From these appreciable results, it is clear that, although a slight degradation of the line-to-line voltage is introduced, four-wire split-capacitor inverters should be driven using a multi-carrier approach.
Numerical and experimental tests have been performed to demonstrate the efficacy of the analytical developments for both peak-to-peak and RMS of both phase and neutral current ripples. A particularly good matching among analytical formulations, numerical simulations, and experimental tests validates the results' efficacy and methodology validity in all the cases.
The presented equations and diagrams can be usefully embraced to determine the AC current ripple parameters with a view to design AC filters, calculate the AC losses, and ensure consistency with the grid/load quality benchmarks. In particular maximum current ripple peak-to-peak can be used for assessing IEC 61000-3-2 and IEEE Std 519 standards compliance. On the other hand, the current ripple RMS makes it particularly effortless to calculate harmonic pollution figures of merit like THD, TDD, and DIN. Future developments might take advantage of the detailed ripple characterization for proposing variable switching frequency PWM modulation techniques capable of optimizing converter harmonic performances. EV charging application appears to be the principal potential beneficiary of this characteristic which could be extensively used for carrying out V2G, V2H, and V2V implementations.