Generalized Circuit Averaging Technique for Two-Switch PWM DC-DC Converters in CCM

: Design of DC-DC converters like Cuk and SEPIC, which are fourth-order converters, play a vital role in the design of electric vehicle (EV) charging systems and drivers for LED. These converters possess a unique feature of input current being continuous due to the presence of an inductor in series with the supply voltage. In the present work, a generalized approach for obtaining the frequency response of the transfer function of the duty cycle to output voltage (G vd ) for converters operating in continuous conduction mode (CCM) having two switches is proposed. A practical Cuk converter and SEPIC operating in CCM were selected and their analyses in open loop were studied using the LTSpice simulation tool. The behavior of the output voltage and inductor currents under variable ESR’s (equivalent series resistance) of inductors was studied. It was observed that G vd of these converters was unstable. Hence, an appropriate controller to stabilize the system and achieve a proper gain margin and phase margin in closed-loop operation is required.


Introduction
The control of DC-DC converters is essential to achieve regulated voltage and current. There are several methods for obtaining the open-loop transfer functions viz., small signal modeling, circuit averaging, and state space averaging. The ideal converters show noticeable deviations from the practical converters in terms of stability due to ESR in the capacitor. In the past, several attempts have been made in determining the transfer functions of G vd and input voltage to output voltage (G vg ) for several complex converters using different methods. Small signal modeling and state space averaging are some of the techniques employed for obtaining the open loop response for converters like Buck, Boost, and Buck-Boost. These methods become laborious when the order of the converter increases. Hence, a simpler method, circuit averaging, was introduced to the Cuk converter and Single Ended Primary Converter (SEPIC) [1]. In [2,3], a mathematical model for Cuk was presented. The importance of selecting a proper step size in MATLAB/Simulink was highlighted. The closed-loop operation for obtaining constant output voltage was simulated. In [4], the circuit averaging for the Cuk converter was carried out using a Saber circuit simulator, and G vd and G vg were found out theoretically and verified using simulation. G vd showed complex pole conjugates and G vg showed a right half plane (RHP) zero. In [5], circuit averaging using LTSpice for basic converters during ideal conditions was analyzed. However, the simulation and analysis for non-ideal higher-order converters was not carried out. In [6], the modeling of switching DC-DC converters was shown using state space modeling including parasitic values considering switching and conduction losses. In [7], a state space modeling approach for a fourth-order converter using MATLAB / Simulink was shown.
Circuit averaging is applied to Buck, Boost, Buck-Boost, and Cuk converters operating in CCM and the non-idealities like inductor and capacitor ESRs are included [8]. However, the non-idealities in the diode and the MOSFET were not considered.
A generalized technique for a non-ideal Cuk and SEPIC converter operating in CCM and DCM is shown in [9]. The model was simulated using LTSpice and the converter selected its operation based on the value of the duty cycle.
In any DC-DC converter, the switching losses are higher than the conduction losses [1]. The switching loss for a two-switch PWM converter is modeled as a resistor. Hence, the switching power loss can be incorporated into existing averaged small-signal dynamic models in basic converters operating in CCM [10]. To determine the value of the switching loss resistor component, an energy balance equation was used. A SEPIC operating in DCM was selected to drive a light-emitting diode (LED) for constant voltage application [11]. An average and a switching model were developed, modeled in MATLAB/Simulink, and validated against the experimental results. The transfer functions G vd and G vg were derived. It was shown that the SEPIC provided lower input current harmonics. An ideal SEPIC and Cuk operating in DCM were selected and used for power factor correction (PFC) [12]. The input to the converters was supplied by a single-phase rectifier. The open-loop transfer function obtained using the small signal model was validated against the hardware results and they were found to be closely correlated. The concept of circuit averaging for converters like Buck, Boost, and Buck-Boost in DCM was discussed [13]. It was shown that the input and output ports of such converters behave like a resistive and power sink, respectively.
In this paper, averaged models for non-ideal fourth-order converters like Cuk and SEPIC operating in CCM is analyzed using the LTSpice simulation tool. In earlier works, the dynamics of the converters considering the non-idealities using the circuit averaging technique were not presented for specific converters like Cuk and SEPIC. The equations required to model the switch network are shown in detail in this paper. The behavior in the output voltage under a variable inductor ESR was also studied. The modeling approach is generic and hence can be applied to a DC-DC converter of any order operating in CCM having MOSFET and diode. Circuit averaging is an advanced technique to determine G vd using an averaged switch network. This technique involves less computation (switch voltages and currents) to determine the frequency response of G vd and is recommended when the converter contains more than one inductor and capacitor. G vd obtained from circuit averaging matches with that obtained from the state space model. Figure 1 shows an ideal SEPIC with MOSFET and a diode. The voltages and currents are denoted as V 1 , V 2 , I 1 , and I 2 , respectively. Figure 2 shows the converter with the switches separated. Circuit averaging is applied to Buck, Boost, Buck-Boost, and Cuk converters operating in CCM and the non-idealities like inductor and capacitor ESRs are included [8]. However, the non-idealities in the diode and the MOSFET were not considered.

Circuit Averaging for an Ideal SEPIC
A generalized technique for a non-ideal Cuk and SEPIC converter operating in CCM and DCM is shown in [9]. The model was simulated using LTSpice and the converter selected its operation based on the value of the duty cycle.
In any DC-DC converter, the switching losses are higher than the conduction losses [1]. The switching loss for a two-switch PWM converter is modeled as a resistor. Hence, the switching power loss can be incorporated into existing averaged small-signal dynamic models in basic converters operating in CCM [10]. To determine the value of the switching loss resistor component, an energy balance equation was used. A SEPIC operating in DCM was selected to drive a light-emitting diode (LED) for constant voltage application [11]. An average and a switching model were developed, modeled in MATLAB/Simulink, and validated against the experimental results. The transfer functions Gvd and Gvg were derived. It was shown that the SEPIC provided lower input current harmonics. An ideal SEPIC and Cuk operating in DCM were selected and used for power factor correction (PFC) [12]. The input to the converters was supplied by a single-phase rectifier. The openloop transfer function obtained using the small signal model was validated against the hardware results and they were found to be closely correlated. The concept of circuit averaging for converters like Buck, Boost, and Buck-Boost in DCM was discussed [13]. It was shown that the input and output ports of such converters behave like a resistive and power sink, respectively.
In this paper, averaged models for non-ideal fourth-order converters like Cuk and SEPIC operating in CCM is analyzed using the LTSpice simulation tool. In earlier works, the dynamics of the converters considering the non-idealities using the circuit averaging technique were not presented for specific converters like Cuk and SEPIC. The equations required to model the switch network are shown in detail in this paper. The behavior in the output voltage under a variable inductor ESR was also studied. The modeling approach is generic and hence can be applied to a DC-DC converter of any order operating in CCM having MOSFET and diode. Circuit averaging is an advanced technique to determine Gvd using an averaged switch network. This technique involves less computation (switch voltages and currents) to determine the frequency response of Gvd and is recommended when the converter contains more than one inductor and capacitor. Gvd obtained from circuit averaging matches with that obtained from the state space model. Figure 1 shows an ideal SEPIC with MOSFET and a diode. The voltages and currents are denoted as V1, V2, I1, and I2, respectively. Figure 2 shows the converter with the switches separated.  Averaging V1, V2, I1, and I2 waveforms:

Small Signal Model
The small signal model provides the AC equivalent circuit in which the non-linear equations are linearized. V1, V2, I1, and I2 derived are now perturbed.
Similarly, perturbing (7): Figure 3 shows the equivalent large signal DC/AC switch model. Circuit averaging of any converter involves three major steps viz.: 1.
Separate the switch network from the converter and define the ports.

2.
Sketch the waveform of the switch current and voltage waveforms and average it.

3.
Simplify the equations and draw the equivalent switch network.

Small Signal Model
The small signal model provides the AC equivalent circuit in which the non-linear equations are linearized. V 1 , V 2 , I 1 , and I 2 derived are now perturbed.
Substituting (16) in (11) and upon simplification: The equivalent circuit for (18) is shown in Figure 5.   Figure 6 shows an ideal Cuk converter operating in CCM. Figure 7 shows the MOSFET and diode separated from the converter.  Figure 6 shows an ideal Cuk converter operating in CCM. Figure 7 shows the MOSFET and diode separated from the converter.     Figure 6 shows an ideal Cuk converter operating in CCM. Figure 7 shows the MOSFET and diode separated from the converter.     Figure 8 shows the waveforms of switch voltages and currents at dT s and (1 − d)T s intervals, which is similar to Figure 9.

Circuit Averaging for a Non-Ideal Cuk
Eliminating Vc1: The turns ratio of the transformer irrespective of the converter would remain the same, i.e.: Eliminating Vc1: The turns ratio of the transformer irrespective of the converter would remain the same, i.e.:

Circuit Averaging for Non-Ideal Cuk Converter
On averaging the voltages and currents across the switches: Eliminating iL1 and iL2: From (25): Substituting (29) in (24): The small signal is generic and provides results for any DC-DC converter having two switches operating in CCM. Table 1 shows the specifications of Non-ideal Cuk converter.  Table 2 shows the specifications of Non-ideal SEPIC.

Results
Simulations were performed using LTSpice software. The equivalent switch network was available as a built-in library under 'average.lib' library. D was varied from 0.3 to 0.6 every 1 ms and the corresponding iL1 and V 0 were analyzed. Figures 10 and 11 show the variation of iL1 and V 0 with respect to the D for Cuk and SEPIC, respectively. It was observed that an increase in D caused an increase in iL1. However, V 0 for Cuk and SEPIC increased in the negative and positive directions, respectively. In Figure 12, RL was varied from 0.1 Ω to 0.3 Ω in steps of 0.1. It was observed that higher RL provided higher iL1 and V0. SEPIC also showed similar features. In Figure 13, RL1 and RL2 were varied. It was found that the lowest value of RL1 and the highest value of RL2 provided higher voltage levels. In Figure 12, R L was varied from 0.1 Ω to 0.3 Ω in steps of 0.1. It was observed that higher R L provided higher iL1 and V 0 . SEPIC also showed similar features. In Figure 13, R L1 and R L2 were varied. It was found that the lowest value of R L1 and the highest value of R L2 provided higher voltage levels.       Figure 16 shows a bode plot of G vd for a fixed value of R. A similar feature in G vd for varying R was seen in the practical Cuk converter shown in Figure 17. G vd was computed in LTSpice software using the AC sweep command.
Electronics 2021, 10, x FOR PEER REVIEW 12 of 15 Similar to that of SEPIC, D was varied from 0.2 to 0.9 in steps of 0.01 for a non-ideal Cuk converter. The cross-over frequency was about 2.92 kHz with a gain margin and phase margin of about −23.85 dB and −160.894°, respectively. Thus, the open-loop system was unstable. Figure 16 shows a bode plot of Gvd for a fixed value of R. A similar feature in Gvd for varying R was seen in the practical Cuk converter shown in Figure 17. Gvd was computed in LTSpice software using the AC sweep command.     The frequency response of G vd obtained from the circuit averaging and small signal model for a non-ideal Cuk converter was compared. The specifications shown in [3] were chosen, simulated, and compared. Figure 18 shows the circuit averaging model for the selected converter using the LTSpice software tool. Figure 19 shows G vd obtained from the circuit averaging technique using the AC sweep command. Figures 20 and 21 show the G vd plots based on [3]. The frequency response of Gvd obtained from the circuit averaging and small signal model for a non-ideal Cuk converter was compared. The specifications shown in [3] were chosen, simulated, and compared. Figure 18 shows the circuit averaging model for the selected converter using the LTSpice software tool. Figure 19 shows Gvd obtained from the circuit averaging technique using the AC sweep command. Figures 20 and 21 show the Gvd plots based on [3].       It can be observed that Gvd obtained from circuit averaging and [4] closely match.

Conclusions
The circuit averaging technique for fourth-order converters like Cuk and SEPIC was carried out using the LTSpice software tool. This generalized approach to predict the frequency response of Gvd can be applied for any two-switch PWM DC-DC converters operating in CCM. This method is comparatively simple and easy to implement compared to the conventional small signal and state space averaged models. The lowest value of RL1 and the highest value of RL2 cause higher voltage levels. Gvd becomes unstable in the openloop configuration for the chosen converters. This technique does not provide the transfer Figure 21. MATLAB-generated G vd for a non-ideal Cuk converter [4].
It can be observed that G vd obtained from circuit averaging and [4] closely match.

Conclusions
The circuit averaging technique for fourth-order converters like Cuk and SEPIC was carried out using the LTSpice software tool. This generalized approach to predict the frequency response of G vd can be applied for any two-switch PWM DC-DC converters operating in CCM. This method is comparatively simple and easy to implement compared to the conventional small signal and state space averaged models. The lowest value of R L1 and the highest value of R L2 cause higher voltage levels. G vd becomes unstable in the open-loop configuration for the chosen converters. This technique does not provide the transfer function equation of G vd . However, the specifications like gain and phase margins and gain and phase cross-over frequencies can be easily found and its stability can be analyzed. The LTSpice model was used for the two-switch configuration in this paper. However, it can be extended to converters having multiple switches.