Single-Shunt Three-Phase Current Measurement for a Three-Level Inverter Using a Modified Space-Vector Modulation

: This article presents a single-shunt measurement of a three-level inverter using a modiﬁed space-vector modulation to reconstruct the three-phase load current. The proposed method was implemented on a digital signal processor (DSP), and the algorithm was veriﬁed in the laboratory experiment. Through the work, it was proven that the single-shunt three-phase current measurement could be performed using the space-vector modulation for three-level inverters in an analogous way to ordinary three-phase inverters. Three-phase current reconstruction for ordinary three-phase inverters was performed using the ordinary space-vector modulation with eight vectors, but for three-level inverters, 21 vectors were available. When the inverter was working on the edges between two vectors, the modulation disturbances appeared as current spikes. This problem was solved using the modiﬁed SVM performed by shifting the SVM signals. Carefully designed signal shifting (vector injection) demonstrated an excellent reconstruction of the three-phase load currents that were single-shunt measured.


Introduction
Inverters are used widely for motor control applications that are based on performance, control principles, motor type, etc. [1][2][3]. Considering control principles, motor drives can be divided into two groups: scalar-and vector-modulated, and controlled motor drives. Scalar modulations are used in applications such as conveyor belts, passenger elevators, grinders, etc. [3]. The main advantage of scalar control is its simplicity [1,2], and it is usually used in low-cost and low-performance drives [1]. Vector control is usually applied for applications in which better dynamic responses and high performances are required [4]. Two-level inverters are usually used, due to their simplicity, price, high reliability, and performance. Introducing the multilevel architecture into the inverter's operation principle reduces the harmonic distortion and switching stress in the inverter circuit. Different topologies have been reported for multilevel inverters, such as diode-clamped (neutral clamped) inverters [5,6], capacitor-clamped (flying capacitors) inverters [7,8], and cascaded multicell inverters with a separate DC source [7,9]. Diode-clamped inverters split the DC-link voltage into n levels by n−1 series-connected bulk capacitors, where the middle point between the two capacitors is called a neutral point. Two additional diodes clamp the switch voltage to n−1, the level of the DC-link voltage. Capacitor-clamped inverters use independent capacitors to clamp the device voltage. Cascaded multicell inverters consist of a series connection of single-phase inverters with separate DC sources. With such topology, the resulting phase voltage is equal to the sum of the voltages generated by the different cells.
To reduce the costs of a device, a single-shunt measurement can be used instead of current measurement using two or three shunts (or hall sensors). In addition, this 2 of 27 measurement principle can be implemented for safety reasons as a second (redundant) measurement system. To achieve this, space-vector modulation must be modified, since the current measurement inside the boundary area (between two vectors) is not accurate enough when ordinary space-vector modulation is used. When using the single-shunt current measurement, it shall be considered that the switching stress, harmonic distortion, DC link voltage utilization, and current measurement accuracy are adequate. Two switch events are desired from a switching stress point of view. Symmetric SVM signals are desired from the harmonic distortion, DC link voltage utilization, and current measurement points of view. In such case, the average current value occurs in the middle of the time interval between the two SVM edges.
Several different methods have been identified to achieve this for three-level inverters [10][11][12][13][14][15][16][17][18][19]. Due to the hardware limitations of the current-measuring circuits, accurate current measurement is not possible while an arbitrary voltage vector is positioned close to the sector boundary [13][14][15] or region boundary inside the vector's diagram of three-level inverters [19,20] by using ordinary space-vector modulation. Current measurement inside a boundary area is solved most often using modification algorithms based on SVM signal shifting [21], which are not often used for multilevel inverters, or additional voltage vector injection [22][23][24]. Paper [20] presents an estimation algorithm in combination with vector injection, used to solve a problem with boundary areas while only one current measurement is possible. A predictive algorithm [25], a hybrid solution combined with space-vector modulation and the SVM method [26], and current reconstruction strategy with online current offset compensation [27] could also be used for a single-shunt current-measurement approach. A tristate pulse-width modulation technique for single-shunt current reconstruction could be used when hardware and software resources are limited [28]. By proper design of the current measurement circuit, DC link voltage utilization could improve drastically. There are several papers that describe different approaches for current-measurement circuit design [29,30]. This paper deals with the development of a modified space-vector modulation (SVM) to reconstruct the three-phase load current by using the single-shunt measurement. The proposed method is based on the algorithms developed for two-level inverter circuits, presented in [13][14][15][16]. To solve a problem with boundary areas, SVM signals have been shifted in order to reduce additional vector injection. Section 2 describes the basic operation of a three-level DC-AC converter, and proposes SVM patterns to achieve space vector modulation. Such organized modulation principle suffers with inaccuracy on the vector's boundaries, so the modified SVM patterns enable the single-shunt current measurements inside the boundary areas. For this reason, the SVM signals were shifted, as is discussed in Section 3. The three-level DC-AC converter's design is described in Section 4. Section 5 deals with experimental verification of the proposed single-shunt space-vector modulation approach.

Three-Level Inverter Basics
A basic schematic of the three-level inverter is shown in Figure 1. Each phase consists of four MOSFETs and two bypass diodes. To avoid a possible short circuit, three switching states are allowed for each phase (leg), as shown in Table 1. With different combinations of switching states in each phase, 27 basic voltage vectors can be produced. Three of them represent the zero vectors.
A vector diagram for the three-level inverter is shown in Figure 2a. Vectors V 1 − V 6 , if drawn with the start point in the reference frame origin, form an inner hexagon with their vector end. Such vectors can be achieved using two different combinations of switching states.

S1x
Sx1 Sx2 S2x Ux0 Notation A vector diagram for the three-level inverter is shown in Figure 2a. Vectors ⃑ 1 − ⃑ 6 , if drawn with the start point in the reference frame origin, form an inner hexagon with their vector end. Such vectors can be achieved using two different combinations of switching states. Vectors ⃑ 7 − ⃑ 18 form an outer hexagon with their vector end. The outer hexagon can be divided into six sectors, which are areas inside the hexagon shifted by 60° and starting from 0°. Each sector inside the vector diagram can be divided into four triangular areas A vector diagram for the three-level inverter is shown in Figure 2a. Vectors ⃑ 1 − ⃑ 6 , if drawn with the start point in the reference frame origin, form an inner hexagon with their vector end. Such vectors can be achieved using two different combinations of switching states. Vectors ⃑ 7 − ⃑ 18 form an outer hexagon with their vector end. The outer hexagon can be divided into six sectors, which are areas inside the hexagon shifted by 60° and starting from 0°. Each sector inside the vector diagram can be divided into four triangular areas Vectors V 7 − V 18 form an outer hexagon with their vector end. The outer hexagon can be divided into six sectors, which are areas inside the hexagon shifted by 60 • and starting from 0 • . Each sector inside the vector diagram can be divided into four triangular areas called regions. Space-vector modulation for a three-level inverter can be achieved by applying a different SVM pattern for each region formed from the three nearest basic voltage vectors. With such an approach, the SVM pattern for each region is symmetric.
The modulation index for the three-level DC-AC converter can be calculated as follows: where θ stands for the reference voltage vector angle transferred to Sector 1. The reference voltage vector positioned in the first sector is shown in Figure 2b. Based on the modulation index components, the region is determined as shown in Table 2. The first sector is divided into four regions, as shown in Figure 3. An arbitrary voltage vector can be generated with linear combination of two or more basic voltage vectors and null vectors. To keep the SVM switching pattern symmetric, two or three nearest basic voltage vectors in combination with or without null vectors are used for each region.
The modulation index for the three-level DC-AC converter can be calculated as follows: where U ref represents the reference voltage vector length and U DC represents the DC link voltage. To determine a region, the modulation index components shall be determined as follows: where θ stands for the reference voltage vector angle transferred to Sector 1. The reference voltage vector positioned in the first sector is shown in Figure 2b. Based on the modulation index components, the region is determined as shown in Table 2. The first sector is divided into four regions, as shown in Figure 3. An arbitrary voltage vector can be generated with linear combination of two or more basic voltage vectors and null vectors. To keep the SVM switching pattern symmetric, two or three nearest basic voltage vectors in combination with or without null vectors are used for each region. The reference voltage vector shown in Figure 3 is positioned inside Region 3. With linear combination of the nearest vectors ⃑ 1 , ⃑ 7 , and ⃑ 13 , the reference voltage vector can be achieved as follows: The reference voltage vector shown in Figure 3 is positioned inside Region 3. With linear combination of the nearest vectors V 1 , V 7 , and V 13 , the reference voltage vector can be achieved as follows: Controlling the duration of the basic voltage vectors V 1 , V 7 , and V 13 , a reference voltage vector can be generated anywhere inside Region 3. Expressions for the basic voltage vector length calculation inside Sector 1 are shown in Table 3.
In an equivalent way, a time calculation can be done for other regions using different linear vector combinations. Table 4 shows the time calculations for all regions inside Sector 1. Transferring the reference voltage vector to the first sector, the same expression from Table 4 can be applied to other sectors. The SVM patterns of all sectors and regions are presented in Figure 4. The vector sequence and current-sampling positions are shown for each SVM pattern. Current-sampling positions are marked with colored arrows in Figure 4, where a red arrow marks the first sampling point, a blue arrow marks the second sampling point, and a green arrow marks the third sampling point only in Region 2, due to the fact that all three phase currents can be measured within a switching period, which will be explained in the next section. The time calculation for Region 3 can be obtained using Expression (4). In an equivalent way, a time calculation can be done for other regions using different linear vector combinations. Table 4 shows the time calculations for all regions inside Sector 1. Table 3. Basic voltage vectors used inside Sector 1.

Voltage Vector Duty Cycle Expression
To take a sample of current measurement during a switching period at the right moment, the active basic voltage vector needs to be known. Based on that, it can be determined which phase current is measured. When the values of two-phase currents are known, we can determine the third phase current easily. Figure 5 presents the described current reconstruction principle shown for Sector 1 and Region 1, where the first current sample is measured during vector V 1 and the second current sample is measured during vector V 2 . At a certain time instant, the instantaneous value of current i v is sampled and multiplied by (−1), and at the next time instant, the instantaneous value of current i u is sampled. Table 5 shows which current is measured for each basic voltage vector. As can be seen, the current measurement is not possible to perform for basic voltage vectors V 13 − V 18 , since the current is not flowing through the shunt resistor, therefore the third current i u is determined using Kirchoff's current law.     vector ⃑ 2 . At a certain time instant, the instantaneous value of current iv is sampled and multiplied by (−1), and at the next time instant, the instantaneous value of current iu is sampled. Table 5 shows which current is measured for each basic voltage vector. As can be seen, the current measurement is not possible to perform for basic voltage vectors ⃑ 13 − ⃑ 18 , since the current is not flowing through the shunt resistor, therefore the third current iu is determined using Kirchoff's current law.

Proposed SVM Pattern-Modification Method
As previously described in Section 2, two current samples are measured inside a switching period between two SVM edges. The problem occurs when the time between the two SVM edges becomes too short for current measurement due to the hardware limitation and measurement signal settling time, described in [4][5][6][7][8]. The time between two SVM edges becomes too short if the arbitrary voltage vector is close to the sector or region boundaries. Such critical areas are shown in Figure 6.

Proposed SVM Pattern-Modification Method
As previously described in Section 2, two current samples are measured inside a switching period between two SVM edges. The problem occurs when the time between the two SVM edges becomes too short for current measurement due to the hardware limitation and measurement signal settling time, described in [4][5][6][7][8]. The time between two SVM edges becomes too short if the arbitrary voltage vector is close to the sector or region boundaries. Such critical areas are shown in Figure 6. In such boundary cases, the conventional method from Section 2 cannot serve for the single-shunt current-measurement approach, since current samples cannot be taken twice within a switching period, and can only be used inside a normal operating area. Different methods are proposed for solving boundary-area problems in the literature [3][4][5][6][7][8][9][10][11][12][13][14][15]. Most of the proposed methods use the vector-injection approach. While injecting additional vectors, asymmetry to the SVM pattern is introduced, which will cause higher current ripple and negative impact to the harmonic distortion at the end. There is also an additional problem with current measurement precision using asymmetric SVM signals, as the average current value may occur in different positions between two SVM edges, which requires a more complex calculation to determine the correct sampling time. Without that, In such boundary cases, the conventional method from Section 2 cannot serve for the single-shunt current-measurement approach, since current samples cannot be taken twice within a switching period, and can only be used inside a normal operating area. Different methods are proposed for solving boundary-area problems in the literature [3][4][5][6][7][8][9][10][11][12][13][14][15]. Most of the proposed methods use the vector-injection approach. While injecting additional vectors, asymmetry to the SVM pattern is introduced, which will cause higher current Electronics 2021, 10, 1734 9 of 27 ripple and negative impact to the harmonic distortion at the end. There is also an additional problem with current measurement precision using asymmetric SVM signals, as the average current value may occur in different positions between two SVM edges, which requires a more complex calculation to determine the correct sampling time. Without that, it could happen that a current ripple is measured instead of the average current. To overcome these problems, the proposed method for boundary areas reduces vector injection to the minimum. This method uses SVM shifting, like the classic method for two-level inverters. The SVM-shifting method differs for different regions, where the basic idea is to shift one or more SVM signals to ensure enough time for current measurement, which will be explained later in this section. Boundary-area design is determined with a minimum time window for current measurement [3][4][5]. With proper boundary-area design, two current samples can be measured inside the whole boundary area. Using the proposed method, all three-phase currents can be measured inside Region 2, which reduces vector injection and avoids SVM shifting. Figure 7a shows Region 1 inside Sector 1, divided into a few characteristics areas: normal operating area, boundary area 1, boundary area 2, and an unreachable area. With the linear combination of the basic voltage vectors V 1 and V 2 , an arbitrary voltage vector is obtained, as also shown in Figure 7a.

SVM Pattern Modification Inside Region 1
Electronics 2021, 10, x FOR PEER REVIEW 9 of 28 will be explained later in this section. Boundary-area design is determined with a minimum time window for current measurement [3][4][5]. With proper boundary-area design, two current samples can be measured inside the whole boundary area. Using the proposed method, all three-phase currents can be measured inside Region 2, which reduces vector injection and avoids SVM shifting. Figure 7a shows Region 1 inside Sector 1, divided into a few characteristics areas: normal operating area, boundary area 1, boundary area 2, and an unreachable area. With the linear combination of the basic voltage vectors ⃑ 1 and ⃑ 2 , an arbitrary voltage vector is obtained, as also shown in Figure 7a. The SVM pattern for a normal operating area is shown in Figure 7b. Inside the normal operating area, time durations t1 and t2 are long enough for accurate current measurement between two SVM edges. The time duration is long enough if it is longer than Tmin, which depends on the hardware design, deadtime, and settling time. Reducing time Tmin, the unreachable area is reduced, and a larger arbitrary voltage vector can be generated. It is The SVM pattern for a normal operating area is shown in Figure 7b. Inside the normal operating area, time durations t 1 and t 2 are long enough for accurate current measurement between two SVM edges. The time duration is long enough if it is longer than T min, which depends on the hardware design, deadtime, and settling time. Reducing time T min , the unreachable area is reduced, and a larger arbitrary voltage vector can be generated. It is desired that T min is as short as possible.

SVM Pattern Modification Inside Region 1
Moving close to the boundary area, the time between two SVM edges becomes shorter than T min . In such a case, there is not enough time for current measurement, due to the hardware limitations. Figure 7c shows the case in which the arbitrary voltage vector is aligned with the basic voltage vector V 1 . In such a case, time t 2 is equal to zero, and current measurement is only possible during vector V 1 , which is not enough for current reconstruction. An analogous situation is shown in Figure 7d, in which the arbitrary voltage vector is aligned with basic voltage vector V 2 . In such case, time t 1 is equal to zero and current measurement is only possible during vector V 2 .
To overcome a problem with current measurement while the arbitrary voltage vector is inside the boundary area 1 in Region 1, the SVM modification pattern is proposed, as shown in Figure 8a,b.
Electronics 2021, 10, x FOR PEER REVIEW 10 of 28 is aligned with the basic voltage vector ⃑ 1 . In such a case, time t2 is equal to zero, and current measurement is only possible during vector ⃑ 1 , which is not enough for current reconstruction. An analogous situation is shown in Figure 7d, in which the arbitrary voltage vector is aligned with basic voltage vector ⃑ 2 . In such case, time t1 is equal to zero and current measurement is only possible during vector ⃑ 2 .
To overcome a problem with current measurement while the arbitrary voltage vector is inside the boundary area 1 in Region 1, the SVM modification pattern is proposed, as shown in Figure 8a If time t2 is shorter than Tmin, the SVM signal with the smallest duty cycle is shifted to the right to ensure enough time for current measurement during vector ⃑ 2 , as shown in Figure 8a. In case t1 is shorter than Tmin, the SVM signal with the largest duty cycle is shifted to the left to ensure enough time for current measurement during vector ⃑ 1 , as shown in Figure 8b.
The proposed SVM modification method does not solve a problem with an unreachable area and boundary area 2. Inside an unreachable area, the SVM duty cycle is large and similar for all three phases. Inside the boundary area 2, the SVM duty cycle is short and similar for all three phases. The SVM shift approach is not useful inside an unreachable area and boundary area 2, since the SVM signal cannot be shifted with values lower than 0% and higher than 100%. Using similar SVM patterns, shown in Section 2 for Regions 2, 3, and 4, a problem with an unreachable area can be solved. Boundary area 2 inside Region 1 is not covered with this method. Figure 9b shows the proposed SVM pattern modification that allows us to generate an arbitrary voltage vector inside an unreachable area using the same vector combination as used for Region 2. Table 6 shows the formulas used for the proposed SVM pattern modification shown in Figure 9b.

Parameter
Formula t0 If time t 2 is shorter than T min , the SVM signal with the smallest duty cycle is shifted to the right to ensure enough time for current measurement during vector V 2 , as shown in Figure 8a. In case t 1 is shorter than T min , the SVM signal with the largest duty cycle is shifted to the left to ensure enough time for current measurement during vector V 1 , as shown in Figure 8b. The proposed SVM modification method does not solve a problem with an unreachable area and boundary area 2. Inside an unreachable area, the SVM duty cycle is large and similar for all three phases. Inside the boundary area 2, the SVM duty cycle is short and similar for all three phases. The SVM shift approach is not useful inside an unreachable area and boundary area 2, since the SVM signal cannot be shifted with values lower than 0% and higher than 100%. Using similar SVM patterns, shown in Section 2 for Regions 2, 3, and 4, a problem with an unreachable area can be solved. Boundary area 2 inside Region 1 is not covered with this method. Figure 9b shows the proposed SVM pattern modification that allows us to generate an arbitrary voltage vector inside an unreachable area using the same vector combination as used for Region 2. Table 6 shows the formulas used for the proposed SVM pattern modification shown in Figure 9b. Electronics 2021, 10, x FOR PEER REVIEW 11 of 28 Setting time t0 to a fixed value that is longer than Tmin allows us to measure current during vector ⃑ 7 the whole time. If t1 is longer than t2, a second current measurement is done during vector ⃑ 1 , otherwise the current measurement is done during vector ⃑ 2 . Setting time t0 to a fixed value has a negative side effect, which is limiting the minimum and maximum reachable arbitrary voltage vector angles. In other words, the proposed SVM pattern and usage of the same vector combination as for Region 2 does not solve the problem with the whole unreachable area inside Region 1. Figure 9a shows the area that still cannot be reached despite the proposed SVM pattern shown in Figure 9b. Such areas are marked with yellow and orange colors. The proposed SVM patterns shown in Figure 9c,d can be used to cover these areas as well. The orange area can be covered with the SVM pattern shown in Figure 9c, and the yellow area can be covered with the SVM pattern shown in Figure 9d. The linear vector combinations used to cover the orange and yellow areas are also presented in Figure 9a, where injected vectors can be seen. The expressions of the proposed SVM pattern modification in Figure 9c are presented in Table 7. Table 8 shows the formulas used for the proposed SVM pattern modification shown in Figure 9d.  Table 6. Time calculation for the proposed SVM pattern for Region 2 applied inside the inner hexagon.

Parameter
Formula Setting time t 0 to a fixed value that is longer than T min allows us to measure current during vector V 7 the whole time. If t 1 is longer than t 2 , a second current measurement is done during vector V 1 , otherwise the current measurement is done during vector V 2 . Setting time t 0 to a fixed value has a negative side effect, which is limiting the minimum and maximum reachable arbitrary voltage vector angles. In other words, the proposed SVM pattern and usage of the same vector combination as for Region 2 does not solve the problem with the whole unreachable area inside Region 1. Figure 9a shows the area that still cannot be reached despite the proposed SVM pattern shown in Figure 9b. Such areas are marked with yellow and orange colors. The proposed SVM patterns shown in Figure 9c,d can be used to cover these areas as well. The orange area can be covered with the SVM pattern shown in Figure 9c, and the yellow area can be covered with the SVM pattern shown in Figure 9d. The linear vector combinations used to cover the orange and yellow areas are also presented in Figure 9a, where injected vectors can be seen. The expressions of the proposed SVM pattern modification in Figure 9c are presented in Table 7. Table 8 shows the formulas used for the proposed SVM pattern modification shown in Figure 9d. Table 7. Time calculation for the proposed SVM pattern for Region 3 applied inside the inner hexagon.

Parameter
Formula  V 2 , and V 7 , an arbitrary voltage vector is obtained, as also shown in Figure 10a. The SVM pattern for the normal operating area inside Region 2 is shown in Figure 10b. Region 2 differs from other regions, since all three-phase currents can be measured within a switching period, which gives us more flexibility for current measurement. Figure 10c shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 3. In such a case, time t 2 is shorter than T min . The current can still be measured twice within a switching period, during vectors V 1 and V 7 , even when time t 2 is shorter than T min . Figure 10d shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 4. In such a case, time t 1 is shorter than T min .

Parameter Formula
In addition, the current can be measured twice within a switching period during vectors V 7 and V 2 . Figure 10e shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 1. In such a case, time t 0 is shorter than T min . The current also can be measured twice within a switching period, during vectors V 1 and V 2 . Based on the time window between the SVM edges, the current sampling position can simply be changed to a position where current measurement is possible, and with such an approach, SVM modification can be avoided. Such an approach is not possible in some parts of the boundary area. These parts are marked with the orange area in Figure 10a. In such areas, only one current measurement is possible. The previously described method for Region 1 can be used to solve a problem within the orange area. Figure 10a shows Region 2 inside Sector 1, divided into a few areas in an equivalent way as described for Region 1. With the linear combination of basic voltage vectors ⃑ 1 , ⃑ 2 , and ⃑ 7 , an arbitrary voltage vector is obtained, as also shown in Figure 10a. The SVM pattern for the normal operating area inside Region 2 is shown in Figure 10b. Region 2 differs from other regions, since all three-phase currents can be measured within a switching period, which gives us more flexibility for current measurement. Figure 10c shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 3. In such a case, time t2 is shorter than Tmin. The current can still be measured twice within a switching period, during vectors ⃑ 1 and ⃑ 7 , even when time t2 is shorter than Tmin. Figure 10d shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 4. In such a case, time t1 is shorter than Tmin.

SVM Pattern Modification Inside Region 2
In addition, the current can be measured twice within a switching period during vectors ⃑ 7 and ⃑ 2 . Figure 10e shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 1. In such a case, time t0 is shorter than Tmin. The current also can be measured twice within a switching period, during vectors ⃑ 1 and ⃑ 2 . Based on the time window between the SVM edges, the current sampling position can simply be changed to a position where current measurement is possible, and with  Figure 11a shows Region 3 inside Sector 1, divided into areas like those described for Regions 1 and 2. With the linear combination of basic voltage vectors V 1 , V 7 , and V 13 , an arbitrary voltage vector is obtained, as also shown in Figure 11a. The SVM pattern for the normal operating area inside Region 3 is shown in Figure 11b. Figure 11c shows the case in which the arbitrary voltage vector is aligned with the basic voltage vectors V 1 and V 13 .

SVM Pattern Modification Inside Region 3
Since current does not flow through the shunt during vector V 13 , current measurement is possible only during vector V 1 , which is not enough for current reconstruction. Figure 11d shows the case where the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 2. In such a case, time duration t 2 is shorter than T min . The current through the shunt can be measured twice within a switching period during vectors V 7 and V 1 . in which the arbitrary voltage vector is aligned with the basic voltage vectors ⃑ 1 and ⃑ 13 . Since current does not flow through the shunt during vector ⃑ 13 , current measurement is possible only during vector ⃑ 1 , which is not enough for current reconstruction. Figure 11d shows the case where the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 2. In such a case, time duration t2 is shorter than Tmin. The current through the shunt can be measured twice within a switching period during vectors ⃑ 7 and ⃑ 1 .  As can be seen, the problem inside Region 3 occurs while the arbitrary voltage vector is aligned or close to vectors V 1 and V 13 . The SVM-shift approach, like that described for Region 1, can be used, which will cause injection of the new basic voltage vector. Figure 11e shows the SVM shifting approach for Region 3. The idea is to shift the SVM signals in such a way that the arbitrary voltage vector stays unchanged, and at the same time, enough time shall be ensured for current measurement. This is possible when two SVM signals are shifted at the same time: The SVM signal for phase W needs to be shifted to the right, and the SVM signal for phase V needs to be shifted to the left. SVM shifting causes injection of vector V 12 like that shown in Figure 11e. The equations used for time calculation are shown in Table 9. Table 9. Time calculation for the proposed SVM pattern for Region 3 applied inside the outer hexagon.

Parameter Formula
When the arbitrary voltage vector is positioned close to Regions 2 and 3, which is shown with the orange area inside Figure 11a, the previously proposed SVM-shift method cannot be used, since time durations t 0 and t 2 are shorter than T min . In such a case, the SVM pattern described for Region 1 is used, shown in Figure 9c. Using the proposed SVM-shift method for Region 3, the unreachable area could not be reached, which will reduce the maximum available modulation index. Figure 12a shows Region 4 inside Sector 1 divided into areas like those described for Regions 1-3. With the linear combination of basic voltage vectors V 2 , V 7 , and V 14 , an arbitrary voltage vector is obtained, as also shown in Figure 12a. The SVM pattern for the normal operating area inside Region 4 is shown in Figure 12b. Figure 12c shows the case in which the arbitrary voltage vector is positioned inside the boundary area 1, close to Region 2. In such a case, time duration t 1 is shorter than T min . The current can be measured twice within a switching period, during vectors V 7 and V 2 . The case in which the arbitrary voltage vector is aligned with the basic voltage vectors V 2 and V 14 is shown in Figure 12d.

SVM Pattern Modification Inside Region 4
Since current does not flow through the shunt during vector V 14 , current measurement is possible only during vector V 2 , which is not enough for current reconstruction.
The problem inside Region 4 occurs while the arbitrary voltage vector is aligned or close to vectors V 2 and V 14 . A similar SVM shift approach like that described for Region 3 is used and shown in Figure 12e. The SVM signal for phase V needs to be shifted to the left, and the SVM signal for phase U needs to be shifted to the right. SVM shifting causes injection of vector V 8 , as shown in Figure 12e. The equations used for the time calculation are shown in Table 10.

Parameter Formula
If the arbitrary voltage vector is positioned close to Regions 2 and 4, which is shown with an orange area inside Figure 12a, the previously proposed SVM-shift method cannot be used, since time durations t 0 and t 1 are smaller than T min . In such a case, the SVM pattern described for Region 1 is used, as shown in Figure 9d. Using the proposed SVM shift method for Region 4, the unreachable area could not be reached, which will reduce the maximum available modulation index. The problem inside Region 4 occurs while the arbitrary voltage vector is aligned or close to vectors ⃑ 2 and ⃑ 14 . A similar SVM shift approach like that described for Region 3 is used and shown in Figure 12e.
The SVM signal for phase V needs to be shifted to the left, and the SVM signal for phase U needs to be shifted to the right. SVM shifting causes injection of vector ⃑ 8 , as shown in Figure 12e. The equations used for the time calculation are shown in Table 10.

Hardware Implementation
A digital signal processor is used for SVM signal generation, ADC current measurement, space-vector modulator calculation, single-shunt current-measurement reconstruction, and communication with a PC. Figure 13 shows a block scheme of all the proposed tasks for control of the three-level inverter. The voltage reference vector length and frequency are obtained through serial communication from the PC. described for Region 1 is used, as shown in Figure 9d. Using the proposed SVM shift method for Region 4, the unreachable area could not be reached, which will reduce the maximum available modulation index.

Hardware Implementation
A digital signal processor is used for SVM signal generation, ADC current measurement, space-vector modulator calculation, single-shunt current-measurement reconstruction, and communication with a PC. Figure 13 shows a block scheme of all the proposed tasks for control of the three-level inverter. The voltage reference vector length and frequency are obtained through serial communication from the PC. After calculation of the space-vector modulation, the SVM signals are set and voltage is applied to the load. Based on the calculated space-vector-modulation parameters, two current measurements are taken using the current-measurement circuit and the current reconstruction is then executed, and the results are sent to the PC. Results are shown graphically in a runtime using the software X2C Scope. After calculation of the space-vector modulation, the SVM signals are set and voltage is applied to the load. Based on the calculated space-vector-modulation parameters, two current measurements are taken using the current-measurement circuit and the current reconstruction is then executed, and the results are sent to the PC. Results are shown graphically in a runtime using the software X2C Scope.

Electronic Circuits
The three-level inverter was designed for a power range up to 100 W. It is switched with the frequency of 16 kHz. The shunt resistor and current measurement circuit ensure a current-measurement range up to 16 A, with the minimum settling time window equal to 3.2 µs. The three-level inverter is loaded with a symmetric RL load (L U = L V = L W = 560 µH, R U = R V = R W = 5.1 Ω). Based on the proposed block diagram in Figure 12, the power stage was designed and built as shown in Figure 13.

Power Stage Circuit
The three-level inverter was supplied from two 12 V power supplies connected to DC link capacitors. The power stage consisted of four MOSFETs (IPB120N08S4-03) and two bypass diodes (V30DM120HM3) per phase as a basic part of a three-level inverter, and dual isolated gate drivers were used for MOSFET driving. The shunt resistor was connected to the neutral point of the three-level inverter (R Sh = 5 mΩ) for current measurement.

Current-Measurement Circuit
One of the crucial parts dealing with single-shunt measurement is the current-measurement circuit. With the quality of current-measurement circuit design, utilization of the DC link voltage can be influenced by reducing the minimum settling time T min needed for measurement. Figure 14 shows the implemented current-measurement circuit. The currentmeasurement circuit must fulfill the following requirements:

•
The output signal is a DC signal with maximum range up to 3 V.

•
The current-measurement range is 20% greater than the maximum expected, to ensure current measurement for the whole current range with enough assurance.

•
The bandwidth is greater than 1 MHz.

Current-Measurement Circuit
One of the crucial parts dealing with single-shunt measurement is the current-measurement circuit. With the quality of current-measurement circuit design, utilization of the DC link voltage can be influenced by reducing the minimum settling time Tmin needed for measurement. Figure 14 shows the implemented current-measurement circuit. The current-measurement circuit must fulfill the following requirements:


The output signal is a DC signal with maximum range up to 3 V.  The current-measurement range is 20% greater than the maximum expected, to ensure current measurement for the whole current range with enough assurance.  The bandwidth is greater than 1 MHz. Figure 14. Current-measurement circuit.
The current-measurement circuit used is a differential amplifier. The DC offset for the current-measurement circuit shown in Figure 14 is determined with the following expression: and the operational amplifier gain can be calculated as follows: The current-measurement circuit used is a differential amplifier. The DC offset for the current-measurement circuit shown in Figure 14 is determined with the following expression: and the operational amplifier gain can be calculated as follows: The operational amplifier DC offset was set to 1.7 V, and the gain to 16.69 (R 0 = R 1 = 510 Ω, R 2 = 32 kΩ, R 3 = 16 kΩ, U p = 3.3 V). The selected operational amplifier (OPA365AIDBVR) had a gain bandwidth of 50 MHz, which gave us a bandwidth for current measurement greater than 1 MHz. The output filter time constant was set to 10 ns (R f = 100 Ω, C f = 100 pF).

Digital Signal Processor
A control board (F28335 control card, Texas Instruments) with a digital signal processor (TMS320F28335ZJZA) was used for three-level inverter control. The DSP was equipped with:   High-performance 32-bit CPU (TMS320C28x);  12-bit Analog-digital converter (ADC);  Six-channel DMA controller (for ADC, ePWM, etc.);  Up to 18 PWM outputs;  Serial port peripherals, etc. Figure 15 shows the docking station with control board and DSP. The DSP unit can achieve ADC measurement with an 80 ns conversion rate. The control board with docking station is capable of communicating with the PC through serial communication.
The key features of this module are fast ADC conversion, a high enough number of SVM channels, flexible ADC triggering, and the possibility to achieve different communication protocols very easily.

Power Supplies
DC-DC power supplies with galvanic isolation were used for safety reasons. MOSFET drivers were supplied with a double-output 12 V isolated power supply (R1DA-121212/P, RECOM Power). The docking station with control board and DSP was supplied with external 5 V (TES 5-1212, TRACO Power). The docking station was equipped with a voltage regulator that supplied the DSP with 3.3 V.

Experimental Results
The described single-shunt current-measurement algorithm was verified using the test-bench system shown in Figure 16. The current through the shunt was measured twice inside the switching period, as described in Sections 2 and 3, using DSP. Then, the DSP reconstructed the phase currents and forwarded the results to the PC through serial communication. Using an X2C Scope, results were shown graphically in runtime.

Experimental Results
The described single-shunt current-measurement algorithm was verified using the test-bench system shown in Figure 16. The current through the shunt was measured twice inside the switching period, as described in Sections 2 and 3, using DSP. Then, the DSP reconstructed the phase currents and forwarded the results to the PC through serial communication. Using an X2C Scope, results were shown graphically in runtime.

Experimental Test-Bench
The proposed algorithm was verified using the test-bench system shown in Figure 16. For verification purposes, the phase currents were measured using oscilloscope measurement (as a reference system), and compared to the reconstructed currents obtained through the serial communication, as described in Section 4. Measurements for the proposed algorithms with and without modification were performed at the same operating points.

Measurement Results
The designed three-level inverter was tested under laboratory conditions. To verify the single-shunt current-reconstructions' measurement results, these were compared with the reference currents measured with the oscilloscope. Measurements were done for different values of modulation index as a function of the load frequency (at 25, 50, and 75 Hz). Test cases were chosen to cover the critical cases in the vicinity of the sector and region of vector's boundaries as described in previous sections.
The results obtained when ordinary space-vector modulation (SVM) was used showed the expected current spikes close to the sector and region boundaries. Figures 17 Figure 16. Measurement test-bench used for verification of the proposed SVM algorithm.

Experimental Test-Bench
The proposed algorithm was verified using the test-bench system shown in Figure 16. For verification purposes, the phase currents were measured using oscilloscope measurement (as a reference system), and compared to the reconstructed currents obtained through the serial communication, as described in Section 4. Measurements for the proposed algorithms with and without modification were performed at the same operating points.

Measurement Results
The designed three-level inverter was tested under laboratory conditions. To verify the single-shunt current-reconstructions' measurement results, these were compared with the reference currents measured with the oscilloscope. Measurements were done for different values of modulation index as a function of the load frequency (at 25, 50, and 75 Hz). Test cases were chosen to cover the critical cases in the vicinity of the sector and region of vector's boundaries as described in previous sections.
The results obtained when ordinary space-vector modulation (SVM) was used showed the expected current spikes close to the sector and region boundaries. Figures 17 and 18 show the current-reconstruction results and current measured by current sensors on the scope. Figure 17a-f show the measurement results when the load frequency of 25 Hz was applied. The maximum absolute current spike appeared when the modulation index was designated to m i = 0.6 ( Figure 17e) and it was measured at i u,v,w,spike = 3.4 A.
the serial communication, as described in Section 4. Measurements for the proposed algorithms with and without modification were performed at the same operating points.

Measurement Results
The designed three-level inverter was tested under laboratory conditions. To verify the single-shunt current-reconstructions' measurement results, these were compared with the reference currents measured with the oscilloscope. Measurements were done for different values of modulation index as a function of the load frequency (at 25, 50, and 75 Hz). Test cases were chosen to cover the critical cases in the vicinity of the sector and region of vector's boundaries as described in previous sections.
The results obtained when ordinary space-vector modulation (SVM) was used showed the expected current spikes close to the sector and region boundaries. Figures 17  and 18 show the current-reconstruction results and current measured by current sensors on the scope. Figure 17a-f show the measurement results when the load frequency of 25 Hz was applied. The maximum absolute current spike appeared when the modulation index was designated to mi = 0.6 ( Figure 17e) and it was measured at iu,v,w,spike = 3.4 A. Figure 18a-f show the measured results when modified SVM was applied (Section 3). In this case, the current reconstruction was also feasible in the boundary region using the single-shunt current-measurement signal, as was described in the previous sections. The current spikes almost disappeared, as can be seen in Figure 18c, and the signal was measured at iu,v,w,spike = 0.17 A. In addition, as was mentioned previously, the modified SVM caused an increase in the load current ripple. In the case of ordinary SVM, the current ripple was measured at Δiu = 0.16 A peak-to-peak (pp) (Figure 17d), when the modulation index was set to mi = 0.6 (worst case). Due to the vector injection in the case of modified SVM, the current ripple increased to Δiu = 0.16 A peak-to-peak (pp) (Figure 18d). Rather than comparison of the absolute values of the current ripple, which was also dependent of the load inductance, it can be concluded that modified SVM caused the double current ripple in the vicinity of the sector and region boundaries when modified SVM was applied. Figures 19 and 20 show the current reconstruction when the load frequency of 50 Hz was required. The results when ordinary SVM was applied are shown in Figure 19a-f, and when modified SVM was applied, are presented in Figure 20a-f. In a similar way to a load frequency of 25 Hz, the results obtained for a load frequency of 50 Hz also had an expected current spike close to the sector and region boundaries, with the measured maximum absolute current spike at iu,v,w,spike = 3.4 A (Figure 19e); and when modified SVM was used, the current spike was practically unmeasurable (iu,v,w,spike = 0.18 A, Figure 20e). These  In this case, the current reconstruction was also feasible in the boundary region using the single-shunt current-measurement signal, as was described in the previous sections. The current spikes almost disappeared, as can be seen in Figure 18c, and the signal was measured at i u,v,w,spike = 0.17 A. In addition, as was mentioned previously, the modified SVM caused an increase in the load current ripple. In the case of ordinary SVM, the current ripple was measured at ∆i u = 0.16 A peak-to-peak (pp) (Figure 17d), when the modulation index was set to m i = 0.6 (worst case). Due to the vector injection in the case of modified SVM, the current ripple increased to ∆i u = 0.16 A peak-to-peak (pp) (Figure 18d). Rather than comparison of the absolute values of the current ripple, which was also dependent of the load inductance, it can be concluded that modified SVM caused the double current ripple in the vicinity of the sector and region boundaries when modified SVM was applied. Figures 19 and 20 show the current reconstruction when the load frequency of 50 Hz was required. The results when ordinary SVM was applied are shown in Figure 19a-f, and when modified SVM was applied, are presented in Figure 20a-f. In a similar way to a load frequency of 25 Hz, the results obtained for a load frequency of 50 Hz also had an expected current spike close to the sector and region boundaries, with the measured maximum absolute current spike at i u,v,w,spike = 3.4 A (Figure 19e); and when modified SVM was used, the current spike was practically unmeasurable (i u,v,w,spike = 0.18 A, Figure 20e). These performance parameters are indicated in Table 11. than comparison of the absolute values of the current ripple, which was also dependent of the load inductance, it can be concluded that modified SVM caused the double current ripple in the vicinity of the sector and region boundaries when modified SVM was applied. Figures 19 and 20 show the current reconstruction when the load frequency of 50 Hz was required. The results when ordinary SVM was applied are shown in Figure 19a-f, and when modified SVM was applied, are presented in Figure 20a-f. In a similar way to a load frequency of 25 Hz, the results obtained for a load frequency of 50 Hz also had an expected current spike close to the sector and region boundaries, with the measured maximum absolute current spike at iu,v,w,spike = 3.4 A (Figure 19e); and when modified SVM was used, the current spike was practically unmeasurable (iu,v,w,spike = 0.18 A, Figure 20e). These performance parameters are indicated in Table 11.   Figures 21 and 22 show the results of current reconstruction when the load frequency of 75 Hz was applied. Figure 21a-f show the three-phase currents' reconstruction results when the ordinary SVM was used (Section 2). The modulation index was chosen so that the current reconstruction is visible on the boundary areas of the sectors and regions. The current spike was measured at iu,v,w,spike = 3.15 A (Figure 21e). Figure 22a-f show the results obtained when the modified SVM algorithm was applied as described in Section 3. The current spike was negligible, and it was measured at iu,v,w,spike = 0.15 A (Figure 22e).  Figures 21 and 22 show the results of current reconstruction when the load frequency of 75 Hz was applied. Figure 21a-f show the three-phase currents' reconstruction results when the ordinary SVM was used (Section 2). The modulation index was chosen so that the current reconstruction is visible on the boundary areas of the sectors and regions. The current spike was measured at i u,v,w,spike = 3.15 A (Figure 21e). Figure 22a-f show the results obtained when the modified SVM algorithm was applied as described in Section 3. The current spike was negligible, and it was measured at i u,v,w,spike = 0.15 A (Figure 22e).    Figures 21 and 22 show the results of current reconstruction when the load frequency of 75 Hz was applied. Figure 21a-f show the three-phase currents' reconstruction results when the ordinary SVM was used (Section 2). The modulation index was chosen so that the current reconstruction is visible on the boundary areas of the sectors and regions. The current spike was measured at iu,v,w,spike = 3.15 A (Figure 21e). Figure 22a-f show the results obtained when the modified SVM algorithm was applied as described in Section 3. The current spike was negligible, and it was measured at iu,v,w,spike = 0.15 A (Figure 22e).   The obtained results (Figures 17-22) showed that the proposed modification algorithm solved the problem with current measurement inside critical areas, and removed current spikes' occurrence, so the proposed modification algorithm can be used for singleshunt current-reconstructions' measurement.
The relative error was calculated as follows: ,, where f rms I  is the phase current measured by the scope, and ,, f rms PWM modified I  represents the single-shunt-measured phase current when the SVM modified algorithm was used.

Discussion
The method presented here enabled the single-shunt current measurement for reconstructing the three-phase load current using a modified SVM approach. The method reduced vector injection to the minimum, and using the property of Region 2, even avoided SVM shifting by switching between current-sampling positions, while the vector was still in Region 2. The method used the symmetric SVM patterns to avoid the harmonic distortion. While using vector injection to solve problems close to the boundary between the inner and outer hexagons, the measurement had an effect on the current ripple due to the The obtained results (Figures 17-22) showed that the proposed modification algorithm solved the problem with current measurement inside critical areas, and removed current spikes' occurrence, so the proposed modification algorithm can be used for single-shunt current-reconstructions' measurement.
The relative error was calculated as follows: ε = I f −rms − I f −rms,PW M,modi f ied I f −rms × 100 where I f −rms is the phase current measured by the scope, and I f −rms,PW M,modi f ied represents the single-shunt-measured phase current when the SVM modified algorithm was used.

Discussion
The method presented here enabled the single-shunt current measurement for reconstructing the three-phase load current using a modified SVM approach. The method reduced vector injection to the minimum, and using the property of Region 2, even avoided SVM shifting by switching between current-sampling positions, while the vector was still in Region 2. The method used the symmetric SVM patterns to avoid the harmonic distortion. While using vector injection to solve problems close to the boundary between the inner and outer hexagons, the measurement had an effect on the current ripple due to the introduced asymmetry. Since the current was measured in the middle of two SVM edges while using asymmetric SVM patterns, a measurement error was introduced, which can be seen in the measurement results where smaller spikes appeared. This happened because the measured current was not equal to the average current in the sampling period. To decrease the measurement error, exact expressions for the sampling position could be investigated, and reconstructed currents could be improved even further.

Conclusions
The goal of the presented control method was to develop a measurement system for single-shunt three-phase current reconstruction using SVM for a three-level inverter. Due to the current spikes appearing on the sector and region boundaries, a modified SVM was proposed to extract these. Using the described principle, a three-shunt or three-Hall-sensor measurement circuit for three-level inverters could be replaced with a single-shunt current-measurement circuit without negatively affecting the inverter's performance. The functional laboratory test-bench system of a three-level inverter was designed, and the proposed method was verified for different modulation indices, and also at different load-frequency requirements. The results obtained using the proposed singleshunt measurement method were similar to the real current, comparing the measured and reconstructed current shape and RMS value, with maximum relative error for the RMS phase current around 5%. Smaller current spikes occurred around the boundary area between the inner and outer hexagons on the reconstructed phase currents, with maximum absolute current error up to 0.4 A peak-to peak caused by measurement inaccuracy due to the vector injection. The proposed modified space-vector modulation was verified for modulation index values from 0.15 to up to 0.92. Current-measurement precision could be improved by adjusting the position when current-measurement samples are taken, which should reduce the maximum absolute current error.