Study on Annealing Process of Aluminum Oxide Passivation Layer for PERC Solar Cells

In this study, Atomic Layer Deposition (ALD) equipment was used to deposit Al2O3 film on a p-type silicon wafer, trimethylaluminum (TMA) and H2O were used as precursor materials, and then the post-annealing process was conducted under atmospheric pressure. The Al2O3 films annealed at different temperatures between 200–500 °C were compared to ascertain the effect of passivation films and to confirm the changes in film structure and thickness before and after annealing through TEM images. Furthermore, the negative fixed charge and interface defect density were analyzed using the C-V measurement method. Photo-induced carrier generation was used to measure the effective minority carrier lifetime, the implied open-circuit voltage, and the effective surface recombination velocity of the film. The carrier lifetime was found to be the longest (2181.7 μs) for Al2O3/Si post-annealed at 400 °C. Finally, with the use of VHF (40.68 MHz) plasma-enhanced chemical vapor deposition (PECVD) equipment, a silicon nitride (SiNx) film was plated as an anti-reflection layer over the front side of the wafer and as a capping layer on the back to realize a passivated emitter and rear contact (PERC) solar cell with optimal efficiency up to 21.54%.


Introduction
In recent years, passivated emitter and rear contact (PERC) solar cells have become a mainstream technology with improved efficiency. The most significant feature of PERC solar cells is the back passivation structure, which greatly reduces the dangling bond and surface recombination problems on the back of the silicon wafer [1].
The International Technology Roadmap for Photovoltaic (ITRPV) report shows that the efficiency of PERC solar cells continues to rise, and is expected to reach 23.5% by 2028, indicating the market share of PERC cells will continue to grow positively. It is also discussed that the market share of the process using ALD equipment to deposit AlOx films as the capping layer will exceed 10% in the future. The main reason is that Al 2 O 3 films can effectively reduce the recombination current factor in the solar cells [2]. Therefore, reducing this surface recombination by surface passivation is very important for improving the performance of both solar cells with high stability for extreme applications [3] and low-cost and high-efficiency c-Si solar cells [4].
In the ALD process, two different chemical precursors are usually introduced into the reaction chamber at different times to form two half-cycle reactions while all chemical reactions are restricted by surface chemisorptions on the surface. These two half-cycle reactions constitute an ALD cycle so that a monolayer film can be deposited. The two half-cycle reactions can be repeated under the conditions of self-limiting reaction, which is the ALD process window, to grow the film layer-by-layer. Two half-cycle reactions are used to deposit the film to avoid the simultaneous presence of two chemical precursors. Inside the reaction chamber, ALD technology can control the film thickness and uniformity with high precision [19][20][21].
So far, there have been many reports on how to optimize the deposition of Al 2 O 3 thin films, such as using trimethylaluminum (TMA, Al 2 (CH 3 ) 6 ) and O 3 to deposit Al 2 O 3 thin films [22,23]. Dueñas et al. reported the electrical properties of Al 2 O 3 -metal-insulator semiconductor structures prepared by ALD using AlCl 3 and H 2 O [24]. The most commonly used precursors of ALD are TMA and H 2 O because they are volatile liquids that are easy to control during the manufacturing process and are inexpensive for cost-reduction in mass production [25].
Studies have found that most of the ALD processes using H 2 O grow a layer of SiO x on the Al 2 O 3 /Si interface, and this interface layer is usually produced after the annealing process [26]. This interface layer plays a very important role in the chemical passivation of Al 2 O 3 /Si. Therefore, post-annealing is a significant step for Al 2 O 3 . The energy provided by annealing can reorganize the structure of the Al 2 O 3 /Si interface, thereby increasing the negative fixed oxide charge and reducing the interface trap density [27]. The remarkable characteristics of Al 2 O 3 are caused by the field-effect passivation due to the negative fixed charge formation at the interface [26,28].
In this study, the Al 2 O 3 films were deposited through the self-developed ALD equipment, using trimethylaluminum (TMA, Al 2 (CH 3 ) 6 ) and water vapor (H 2 O) as precursors. The deposition wafer size of the PEALD equipment developed by our team was scaled up to 400 mm × 400 mm to meet the R&D and commercial demands. With the self-limiting reaction characteristics of ALD, which has an excellent uniform coverage, its film nonuniformity can reach ≤ ±3.88%, while the nonuniformity at the middle of the 200 mm × 200 mm substrate can be brought down to ≤ ±3%.
The scale of our pilot production equipment with high uniformity and large area thin film deposition would undoubtedly improve the cost performance of solar cells. The selfmade equipment is highly autonomous while the distance between the substrate and the showerhead can be comfortably adjusted. The foregoing merits unequivocally demonstrate our self-made equipment is poised to be an indispensable tool for delivering high-quality works for research and development, including the PERC solar cells investigated in the present study.
The Al 2 O 3 films thus prepared were then subjected to a post-annealing process in the atmosphere, and the temperature is controlled between 200-500 • C. A systematic study of the effects of temperature on silicon wafer performance in the atmosphere (ATM) was then conducted. The comparison of the electrical properties and structural characteristics of the Al 2 O 3 /Si interface caused by the adjustment of the annealing process temperature are also discussed. Finally, quasi-steady-state photo-conduction (QSSPC) and solar cell efficiency were compared to verify the characteristics of PERC solar cells under different annealing parameters.

Thin Film Deposition Process
The substrate adopted in this study was a p-type (boron-doped) Si (100) grown by the Czochralski (CZ) method, with a resistance of 1 Ω-cm and a thickness of 200 µm. Then we used the RCA (Radio Corporation of America, New York, NY, USA) cleaning standard cleaning process to clean the surface of the silicon wafer. Before the deposition process, a hydrofluoric acid infiltration was required to remove the native oxide layer on the surface of the wafer. Figures 1 and 2 show the schematic diagrams of the film structure for the experimental samples and the coating process. The passivation Al 2 O 3 film is deposited on the back of the wafer using the atomic layer deposition system (ALD) equipment. This ALD equipment was developed and manufactured by our research group as illustrated in Figure 3. The silicon nitride (SiN x ) film located on the front side of the wafer behaves as the anti-reflection layer while the SiN x film on the back acts as the capping layer, all of which are deposited using the VHF (40.68 MHz) plasma-enhanced chemical vapor deposition (PECVD) system. This VHF PECVD equipment was also developed and manufactured by our research group. The advantage of the VHF plasma source is that it can simultaneously increase the electron density and reduce the ion bombardment energy; the former can increase the coating rate while the latter can avoid film damage and ensure film quality [29].
hydrofluoric acid infiltration was required to remove the native oxide layer on the surfac of the wafer. Figures 1 and 2 show the schematic diagrams of the film structure for the experi mental samples and the coating process. The passivation Al2O3 film is deposited on th back of the wafer using the atomic layer deposition system (ALD) equipment. This ALD equipment was developed and manufactured by our research group as illustrated in Fig  ure 3. The silicon nitride (SiNx) film located on the front side of the wafer behaves as th anti-reflection layer while the SiNx film on the back acts as the capping layer, all of which are deposited using the VHF (40.68 MHz) plasma-enhanced chemical vapor deposition (PECVD) system. This VHF PECVD equipment was also developed and manufactured by our research group. The advantage of the VHF plasma source is that it can simultaneously increase the electron density and reduce the ion bombardment energy; the former can increase the coating rate while the latter can avoid film damage and ensure film quality [29].    hydrofluoric acid infiltration was required to remove the native oxide layer on the surface of the wafer. Figures 1 and 2 show the schematic diagrams of the film structure for the experimental samples and the coating process. The passivation Al2O3 film is deposited on the back of the wafer using the atomic layer deposition system (ALD) equipment. This ALD equipment was developed and manufactured by our research group as illustrated in Figure 3. The silicon nitride (SiNx) film located on the front side of the wafer behaves as the anti-reflection layer while the SiNx film on the back acts as the capping layer, all of which are deposited using the VHF (40.68 MHz) plasma-enhanced chemical vapor deposition (PECVD) system. This VHF PECVD equipment was also developed and manufactured by our research group. The advantage of the VHF plasma source is that it can simultaneously increase the electron density and reduce the ion bombardment energy; the former can increase the coating rate while the latter can avoid film damage and ensure film quality [29].     The measurement of the effective minority carrier lifetime is made with a doublesided Al2O3 film structure. The Al2O3 film is deposited with trimethylaluminum (TMA, Al2(CH3)6) with water vapor (H2O) used as precursors and the deposition is carried out for 24 cycles. The deposition thickness is about 4 nm. The process parameters of Al2O3 thin films deposited by ALD equipment are shown in Table 1. In the choice of passivation film material, Al2O3 film was selected because of its high charge density, which can provide good passivation over the surface of p-type wafers, while it is also common to coat it on the back surface of PERC solar cells for mass production. There are two main mechanisms for the Al2O3 passivation, namely, the chemical passivation and field-effect passivation, both of which are relied upon to improve the effective minority carrier lifetime. The chemical passivation produced by Al2O3 films can reduce the dangling bonds on the wafer surface. The field-effect passivation produced by Al2O3 films is related to the Qf (the negative fixed charge) in the Al2O3 layer, while the negative fixed charge causes band bending. An SiNx film is deposited on the front side of the wafer as an anti-reflection layer and an SiNx film is coated on the back as a cover layer. The process parameters of SiNx film deposition using PECVD equipment are shown in Table 2. The gas flow ratio of N2 to SiH4 is 10, the substrate temperature is 150 °C, the RF power is 70 mW/cm 2 , the pressure is 400 mTorr, and the deposition thickness is 30 nm. Since the extinction coefficient of SiNx films is very low, even for high absorption typically occurring in the short wavelength range, it falls between 10 −4 and 10 −5 . Hence, as a passivation film, it would not affect the absorption efficiency of silicon wafers [30]. The measurement of the effective minority carrier lifetime is made with a doublesided Al 2 O 3 film structure. The Al 2 O 3 film is deposited with trimethylaluminum (TMA, Al 2 (CH 3 ) 6 ) with water vapor (H 2 O) used as precursors and the deposition is carried out for 24 cycles. The deposition thickness is about 4 nm. The process parameters of Al 2 O 3 thin films deposited by ALD equipment are shown in Table 1. In the choice of passivation film material, Al 2 O 3 film was selected because of its high charge density, which can provide good passivation over the surface of p-type wafers, while it is also common to coat it on the back surface of PERC solar cells for mass production. There are two main mechanisms for the Al 2 O 3 passivation, namely, the chemical passivation and field-effect passivation, both of which are relied upon to improve the effective minority carrier lifetime. The chemical passivation produced by Al 2 O 3 films can reduce the dangling bonds on the wafer surface. The field-effect passivation produced by Al 2 O 3 films is related to the Q f (the negative fixed charge) in the Al 2 O 3 layer, while the negative fixed charge causes band bending. An SiN x film is deposited on the front side of the wafer as an anti-reflection layer and an SiN x film is coated on the back as a cover layer. The process parameters of SiN x film deposition using PECVD equipment are shown in Table 2. The gas flow ratio of N 2 to SiH 4 is 10, the substrate temperature is 150 • C, the RF power is 70 mW/cm 2 , the pressure is 400 mTorr, and the deposition thickness is 30 nm. Since the extinction coefficient of SiN x films is very low, even for high absorption typically occurring in the short wavelength range, it falls between 10 −4 and 10 −5 . Hence, as a passivation film, it would not affect the absorption efficiency of silicon wafers [30].

Annealing Process
With the use of the high-temperature furnace for the post-annealing process, the passivation quality could be improved accordingly to achieve a high-performance PERC solar cell. Since high-temperature annealing can increase the negative fixed charge and reduce the interface defect density, the post-annealing process is operated by adjusting the process temperature, process time, and the type of forming gas. In this study, the passivation annealing process was performed by adjusting different process temperatures in the atmosphere (ATM) to explore the structural and electrical properties of the Al 2 O 3 /c-Si interface. For the SiN x /c-Si/Al 2 O 3 /SiN x passivation structure undergoing annealing, the process temperature was adjusted between 200 and 500 • C, the heating rate to 5 • C per minute, and the annealing process maintained at the set temperature for 10 min. The annealing temperature profile is shown in Figure 4.

Annealing Process
With the use of the high-temperature furnace for the post-annealing process, the passivation quality could be improved accordingly to achieve a high-performance PERC solar cell. Since high-temperature annealing can increase the negative fixed charge and reduce the interface defect density, the post-annealing process is operated by adjusting the process temperature, process time, and the type of forming gas. In this study, the passivation annealing process was performed by adjusting different process temperatures in the atmosphere (ATM) to explore the structural and electrical properties of the Al2O3/c-Si interface. For the SiNx/c-Si/Al2O3/SiNx passivation structure undergoing annealing, the process temperature was adjusted between 200 and 500 °C, the heating rate to 5 °C per minute, and the annealing process maintained at the set temperature for 10 min. The annealing temperature profile is shown in Figure 4. A field emission gun transmission electron microscope (FEGTEM, Philips, Amsterdam, Netherlands) was used to observe the Al2O3/Si interface. At 200 kV, its point-to-point resolution in TEM mode is 0.23 nm. The capacitance-voltage (C-V) measurement was performed via the Keithly 4200 system (Solon, OH, USA) on the sample incorporating a thermally-evaporated Al point electrode with a diameter of 100 μm on the Al2O3 film. The C-V experiment bias voltage range was set between −3 and +3 V to obtain 50 mV signal parameters at 1, 100, and 1000 kHz. Therefore, due to the standard planar capacitor equation, the dielectric constant of alumina was calculated based on the accumulated capacitance value, and the accuracy of the entire technique estimated to be ±5%. We used WCT-120 equipment (Sinton Consulting Inc. Boulder, CO, USA) to determine the minority carrier lifetime and the accompanied open-circuit voltage of the wafer, using the quasisteady-state photoconductance (QSSPC) method. The main principle is that the optical excitation flash produces carriers in the chip and electron-hole pairs are generated. The more carriers that are generated the better it is for the conductivity, knowing that the conductivity increase is proportional to the increase of carriers. The current density and A field emission gun transmission electron microscope (FEGTEM, Philips, Amsterdam, Netherlands) was used to observe the Al 2 O 3 /Si interface. At 200 kV, its point-to-point resolution in TEM mode is 0.23 nm. The capacitance-voltage (C-V) measurement was performed via the Keithly 4200 system (Solon, OH, USA) on the sample incorporating a thermally-evaporated Al point electrode with a diameter of 100 µm on the Al 2 O 3 film. The C-V experiment bias voltage range was set between −3 and +3 V to obtain 50 mV signal parameters at 1, 100, and 1000 kHz. Therefore, due to the standard planar capacitor equation, the dielectric constant of alumina was calculated based on the accumulated capacitance value, and the accuracy of the entire technique estimated to be ±5%. We used WCT-120 equipment (Sinton Consulting Inc. Boulder, CO, USA) to determine the minority carrier lifetime and the accompanied open-circuit voltage of the wafer, using the quasi-steady-state photoconductance (QSSPC) method. The main principle is that the optical excitation flash produces carriers in the chip and electron-hole pairs are generated. The more carriers that are generated the better it is for the conductivity, knowing that the conductivity increase is proportional to the increase of carriers. The current density and voltage relationship (J-V) measurement was performed by a dual-light source solar simulator (Wacom Co., Kazo, Japan) using Xenon lamps and halogen lamps as the calibration for the AM 1.5G solar simulation spectrum.

Microstructure
A field emission gun transmission electron microscope (FEGTEM) was used to observe the Al 2 O 3 /Si interface. Figure 5 shows a transmission electron microscope (TEM) image of Al 2 O 3 and SiN x deposited on a silicon substrate to confirm the state of the Al 2 O 3 /c-Si interface before annealing ( Figure 5a) and under different annealing temperatures (Figure 5b-e) for measuring the corresponding SiO 2 film thicknesses. Based on Figure 5a, the SiN x film deposited by PECVD is about 33 nm, meanwhile, the Al 2 O 3 film deposited by ALD is about 3.5 nm. No SiO 2 layer is formed without annealing. Figure 5b shows annealing at 200 • C for 10 min when a very thin SiO 2 layer is formed with a film thickness of about 0.7 nm. Figure 5c shows annealing at 300 • C when a SiO 2 layer thickness of about 1 nm is formed. Figure 5d shows annealing at 400 • C when a SiO 2 layer thickness of about 2 nm is formed. Finally, Figure 5e shows annealing at 500 • C when an SiO 2 layer thickness of about 3.4 nm is formed. The thickness of the SiO 2 layer increases as the annealing temperature increases. This phenomenon is due to the substrate surface oxidation caused by the post-annealing process to form Si-O bonding [1] where the oxygen composition is provided from the atmosphere during the annealing process. The oxygen in the atmosphere penetrates the surface of the silicon substrate with the energy provided by the annealing to exchange with the Al 2 O 3 film to develop a SiO 2 layer. voltage relationship (J-V) measurement was performed by a dual-light source solar simulator (Wacom Co., Kazo, Japan) using Xenon lamps and halogen lamps as the calibration for the AM 1.5G solar simulation spectrum.

Microstructure
A field emission gun transmission electron microscope (FEGTEM) was used to observe the Al2O3/Si interface. Figure 5 shows a transmission electron microscope (TEM) image of Al2O3 and SiNx deposited on a silicon substrate to confirm the state of the Al2O3/c-Si interface before annealing (Figure 5a) and under different annealing temperatures (Figure 5b-e) for measuring the corresponding SiO2 film thicknesses. Based on Figure 5a, the SiNx film deposited by PECVD is about 33 nm, meanwhile, the Al2O3 film deposited by ALD is about 3.5 nm. No SiO2 layer is formed without annealing. Figure 5b shows annealing at 200 °C for 10 min when a very thin SiO2 layer is formed with a film thickness of about 0.7 nm. Figure 5c shows annealing at 300 °C when a SiO2 layer thickness of about 1 nm is formed. Figure 5d shows annealing at 400 °C when a SiO2 layer thickness of about 2 nm is formed. Finally, Figure 5e shows annealing at 500 °C when an SiO2 layer thickness of about 3.4 nm is formed. The thickness of the SiO2 layer increases as the annealing temperature increases. This phenomenon is due to the substrate surface oxidation caused by the post-annealing process to form Si-O bonding [1] where the oxygen composition is provided from the atmosphere during the annealing process. The oxygen in the atmosphere penetrates the surface of the silicon substrate with the energy provided by the annealing to exchange with the Al2O3 film to develop a SiO2 layer. The result as shown in Figure 6 indicates that the thickness of the SiO2 layer increases as the annealing temperature increases. The relationship between the thickness of the SiO2 layer and the negative fixed charge and effective minority carrier lifetime are discussed later. The result as shown in Figure 6 indicates that the thickness of the SiO 2 layer increases as the annealing temperature increases. The relationship between the thickness of the SiO 2 layer and the negative fixed charge and effective minority carrier lifetime are discussed later.

C-V Measurement
The capacitance-voltage (C-V) measurement was performed on Al/Al2O3/Si MOS samples annealed at 200-500 °C using a high-temperature furnace in the atmosphere (ATM). The negative fixed charge (−Qf) density at the sample interface corresponding to the different annealing temperatures is illustrated In Figure 7a. These values were measured by the C-V technique and the density of the negative charge is calculated by Equation (4) [31]. The capacitance of the accumulated layer Cox is first determined to evaluate the relative permittivity εoxide of the oxide layer according to Equation (1): (1) where tox is the thickness of the oxide layer, ε0 is the vacuum dielectric constant, and A is the electrode area of the MOS structure. Then Equation (2) is used to calculate the LD (Debye length): (2) where εsi is the relative permittivity of the silicon substrate, K is the Boltzmann constant, T is the absolute temperature, q is the unit charge, and Na is the concentration of the silicon substrate, and then the flat band capacitance CFB (F/cm 2 ) can be calculated using Equation where tox is the thickness of the oxide layer, ε0 is the vacuum permittivity, εoxide is the relative permittivity of the oxide layer, and εsi is the relative permittivity of the silicon substrate. Thus, with the help of the C-V curve corresponding to the flat band voltage VFB and Equation (4), the fixed charge Qf (cm −2 ) can be determined as: (4) where q is the unit charge, A is the electrode area of the MOS structure, φms is the work function difference between the metal and the semiconductor, and VFB is the flat band voltage.

C-V Measurement
The capacitance-voltage (C-V) measurement was performed on Al/Al 2 O 3 /Si MOS samples annealed at 200-500 • C using a high-temperature furnace in the atmosphere (ATM). The negative fixed charge (−Q f ) density at the sample interface corresponding to the different annealing temperatures is illustrated In Figure 7a. These values were measured by the C-V technique and the density of the negative charge is calculated by Equation (4) [31]. The capacitance of the accumulated layer C ox is first determined to evaluate the relative permittivity ε oxide of the oxide layer according to Equation (1): where t ox is the thickness of the oxide layer, ε 0 is the vacuum dielectric constant, and A is the electrode area of the MOS structure. Then Equation (2) is used to calculate the L D (Debye length): where ε si is the relative permittivity of the silicon substrate, K is the Boltzmann constant, T is the absolute temperature, q is the unit charge, and N a is the concentration of the silicon substrate, and then the flat band capacitance C FB (F/cm 2 ) can be calculated using Equation (3): where t ox is the thickness of the oxide layer, ε 0 is the vacuum permittivity, ε oxide is the relative permittivity of the oxide layer, and ε si is the relative permittivity of the silicon substrate. Thus, with the help of the C-V curve corresponding to the flat band voltage V FB and Equation (4), the fixed charge Q f (cm −2 ) can be determined as: where q is the unit charge, A is the electrode area of the MOS structure, ϕ ms is the work function difference between the metal and the semiconductor, and V FB is the flat band voltage.  Figure 7a shows that as the annealing process temperature increases from 200 to 500 °C the negative Qf value increases. The measured Qf are −1.21 × 10 12 , −1.20 × 10 12 , −1.79 × 10 12 , and −4.58 × 10 12 cm −2 at annealing temperature of 200, 300, 400, and 500 °C respectively. The result of high Qf reflects the high charge density of the Al2O3 films deposited by the ALD equipment, successfully developed by our research group. In this study, the negative charge of Al2O3 was attributed to the excess oxygen in the Al2O3 films. The maintenance of ambient atmosphere (ATM) for annealing provides more oxygen than the post-annealing using N2, while a higher annealing temperature results in a higher negative charge density at the interface. The increase in charge density can be attributed to the chemical composition of the AlOx layer at the c-Si/Al2O3 interface. By comparing the thickness trend of the SiO2 layer in Figures 6 and 7a, it can be shown that the increase in the thickness of the oxide layer has a positive effect on the negative charge density.
The defect density, Dit, is estimated from the same C-V measurement and can be calculated using the following Equation (5) [31]: As shown in Figure 7b, the lowest value of Dit is 7.51 × 10 10 cm −2 ·eV −1 at annealing temperature 400 °C . The other Dit values are 7.25 × 10 10 , 7.02 × 10 10 , and 1.47 × 10 10 cm −2 ·eV −1 at annealing temperature at 200, 300, and 500 °C respectively. Lattice defects on the surface of the silicon wafer substrate are considered to be very detrimental, and these defects are expected to introduce carrier trapping to prevent the effectiveness of surface passivation. The analysis of Dit shows oxygen in the ATM interacting with the dangling bond in the silicon substrate which is responsible for the chemical passivation process. In addition to the control temperature that dictates the annealing process, the high quality of the ALD coating process is also a key control factor.

QSSPC Method
The effective minority carrier lifetime (τeff) of photo-generated carriers is an important parameter dictating the quality of ALD-deposited Al2O3 films as the passivation layer of the p-Si wafer. The WCT-120 Silicon Wafer Lifetime Tester (manufactured by Sinton Consulting Inc., Boulder, CO, USA) was used with the adoption  Figure 7a shows that as the annealing process temperature increases from 200 to 500 • C the negative Q f value increases. The measured Q f are −1.21 × 10 12 , −1.20 × 10 12 , −1.79 × 10 12 , and −4.58 × 10 12 cm −2 at annealing temperature of 200, 300, 400, and 500 • C respectively. The result of high Q f reflects the high charge density of the Al 2 O 3 films deposited by the ALD equipment, successfully developed by our research group. In this study, the negative charge of Al 2 O 3 was attributed to the excess oxygen in the Al 2 O 3 films. The maintenance of ambient atmosphere (ATM) for annealing provides more oxygen than the post-annealing using N 2 , while a higher annealing temperature results in a higher negative charge density at the interface. The increase in charge density can be attributed to the chemical composition of the AlO x layer at the c-Si/Al 2 O 3 interface. By comparing the thickness trend of the SiO 2 layer in Figures 6 and 7a, it can be shown that the increase in the thickness of the oxide layer has a positive effect on the negative charge density.
The defect density, D it , is estimated from the same C-V measurement and can be calculated using the following Equation (5) [31]: As shown in Figure 7b, the lowest value of D it is 7.51 × 10 10 cm −2 ·eV −1 at annealing temperature 400 • C. The other D it values are 7.25 × 10 10 , 7.02 × 10 10 , and 1.47 × 10 10 cm −2 ·eV −1 at annealing temperature at 200, 300, and 500 • C respectively. Lattice defects on the surface of the silicon wafer substrate are considered to be very detrimental, and these defects are expected to introduce carrier trapping to prevent the effectiveness of surface passivation. The analysis of D it shows oxygen in the ATM interacting with the dangling bond in the silicon substrate which is responsible for the chemical passivation process. In addition to the control temperature that dictates the annealing process, the high quality of the ALD coating process is also a key control factor.

QSSPC Method
The effective minority carrier lifetime (τ eff ) of photo-generated carriers is an important parameter dictating the quality of ALD-deposited Al 2 O 3 films as the passivation layer of the p-Si wafer. The WCT-120 Silicon Wafer Lifetime Tester (manufactured by Sinton Consulting Inc., Boulder, CO, USA) was used with the adoption of the quasi-steadystate photoconductance (QSSPC) method for the τ eff measurement. Figure 8 shows the effective minority carrier lifetime (τ eff ) data for Al 2 O 3 /Si samples at different annealing temperatures. The annealing temperature was set between 200 and 500 • C to quantify and compare the τ eff before and after annealing. Figure 9 shows the value of τ eff obtained at the injection level of 5 × 10 15 cm −3 . The results show that τ eff is only 54.60 µs before annealing, while τ eff reaches 2181.72 µs at 400 • C, which is the best performance yet among all parameters. The measurements of other τ eff are as follows: 392.90, 906.30, and 1450.30 µs at annealing temperature 200, 300, and 500 • C, respectively. The effective carrier lifetime (τ eff ) can be estimated by considering the carrier interactions that occur at the bulk and surface levels by following Equation (6) [4,26,32]: 1 where τ bulk is the lifetime within the bulk sample. The value of the p-Si wafer used was more than 4 ms (data provided by the wafer supplier), W refers to the thickness of the wafer (200µm), and S eff is the effective surface recombination velocity (SRV). It can be assumed that the two sides are equal for a symmetrical structure. Since the substrate used in this experiment was a high-quality silicon wafer with a very long τ bulk , it is reasonable to expect τ eff to be mainly affected by surface recombination. Under this approximation, we can simplify Equation (6) as Coatings 2021, 11, x FOR PEER REVIEW 9 of 14 photoconductance (QSSPC) method for the τeff measurement. Figure 8 shows the effective minority carrier lifetime (τeff) data for Al2O3/Si samples at different annealing temperatures. The annealing temperature was set between 200 and 500 °C to quantify and compare the τeff before and after annealing. Figure 9 shows the value of τeff obtained at the injection level of 5 × 10 15 cm −3 . The results show that τeff is only 54.60 μs before annealing, while τeff reaches 2181.72 μs at 400 °C, which is the best performance yet among all parameters. The measurements of other τeff are as follows: 392.90, 906.30, and 1450.30 μs at annealing temperature 200, 300, and 500 °C, respectively. The effective carrier lifetime (τeff) can be estimated by considering the carrier interactions that occur at the bulk and surface levels by following Equation (6) where τbulk is the lifetime within the bulk sample. The value of the p-Si wafer used was more than 4 ms (data provided by the wafer supplier), W refers to the thickness of the wafer (200μm), and Seff is the effective surface recombination velocity (SRV). It can be assumed that the two sides are equal for a symmetrical structure. Since the substrate used in this experiment was a high-quality silicon wafer with a very long τbulk, it is reasonable to expect τeff to be mainly affected by surface recombination. Under this approximation, we can simplify Equation (6) as (7)   The other values of Seff are 25.45, 11.03, and 6.90 cm/s for annealing at 200, 300, and 500 °C, respectively. From a component point of view, the lower the SRV, the better the passivation effect of the surface and the less the number of carriers lost during the recombination process. Therefore, to minimize the surface recombination phenomenon, the appropriate chemical passivation is necessary. On the other hand, to sizably reduce the interface defects, the extremely low SRV achieved at 400 °C using ATM in this study signifies that the Al2O3 passivation film deposited by ALD has effectively reduced the dangling bonds on the surface of the silicon substrate. The implied open-circuit voltage (Voc) measurement is used here as another parameter to qualify different dielectrics and deposition techniques when passivating the silicon surface [30]. It is calculated from the τeff (Δn) measured by QSSPC, and the calculation Equation (8) is as follows [33]:  The other values of S eff are 25.45, 11.03, and 6.90 cm/s for annealing at 200, 300, and 500 • C, respectively. From a component point of view, the lower the SRV, the better the passivation effect of the surface and the less the number of carriers lost during the recombination process. Therefore, to minimize the surface recombination phenomenon, the appropriate chemical passivation is necessary. On the other hand, to sizably reduce the interface defects, the extremely low SRV achieved at 400 • C using ATM in this study signifies that the Al 2 O 3 passivation film deposited by ALD has effectively reduced the dangling bonds on the surface of the silicon substrate.  The other values of Seff are 25.45, 11.03, and 6.90 cm/s for annealing at 200, 300, and 500 °C, respectively. From a component point of view, the lower the SRV, the better the passivation effect of the surface and the less the number of carriers lost during the recombination process. Therefore, to minimize the surface recombination phenomenon, the appropriate chemical passivation is necessary. On the other hand, to sizably reduce the interface defects, the extremely low SRV achieved at 400 °C using ATM in this study signifies that the Al2O3 passivation film deposited by ALD has effectively reduced the dangling bonds on the surface of the silicon substrate. The implied open-circuit voltage (Voc) measurement is used here as another parameter to qualify different dielectrics and deposition techniques when passivating the silicon surface [30]. It is calculated from the τeff (Δn) measured by QSSPC, and the calculation Equation (8) is as follows [33]: The implied open-circuit voltage (V oc ) measurement is used here as another parameter to qualify different dielectrics and deposition techniques when passivating the silicon surface [30]. It is calculated from the τ eff (∆n) measured by QSSPC, and the calculation Equation (8) is as follows [33]: where ∆n is the minority carrier concentration measured by WCT-120 under one solar condition, p is the hole concentration, and n i,eff is the intrinsic concentration. Since this measurement is performed before the screen-printed electrode, this value is assumed to reflect the maximum V oc that can be achieved based on the internal material quality without the contributions of optical loss or imperfect contact loss.
From Figure 11, it can be observed that the IV oc value has the same trend as the τ eff depicted in Figure 10. The best IV oc value is 727 mV at 400 • C. IV oc values are 680, 707, and 718 mV, which correspond to the annealing temperature set at 200, 300, and 500 • C, respectively. Compared with 627 mV realized before annealing, the importance of annealing can be highlighted as an essential and critical step for a high-efficiency solar cell process.
where Δn is the minority carrier concentration measured by WCT-120 under one solar condition, p is the hole concentration, and ni, eff is the intrinsic concentration. Since this measurement is performed before the screen-printed electrode, this value is assumed to reflect the maximum Voc that can be achieved based on the internal material quality without the contributions of optical loss or imperfect contact loss.
From Figure 11, it can be observed that the IVoc value has the same trend as the τeff depicted in Figure 10. The best IVoc value is 727 mV at 400 °C. IVoc values are 680, 707, and 718 mV, which correspond to the annealing temperature set at 200, 300, and 500 °C, respectively. Compared with 627 mV realized before annealing, the importance of annealing can be highlighted as an essential and critical step for a high-efficiency solar cell process. In this study, the Al2O3 films deposited by ALD were used as the passivation layer of the PERC solar cell. As illustrated in Figure 12, two major factors dominate the passivation mechanisms: chemical passivation and field-effect passivation. The chemical passivation effect is to reduce the generation of dangling bonds on the wafer surface and is responsible for Dit and SRV from the above analysis and discussion. On the other hand, the field-effect passivation is dominated by the characteristics of Qf. The effective minority carrier lifetime (τeff) is determined by the chemical passivation effect. As the trends of τeff, Seff, and IVoc at 400 °C obtained due to ATM annealing have revealed, the chemical passivation effect that affects dangling bonds plays by far a dominant role.  In this study, the Al 2 O 3 films deposited by ALD were used as the passivation layer of the PERC solar cell. As illustrated in Figure 12, two major factors dominate the passivation mechanisms: chemical passivation and field-effect passivation. The chemical passivation effect is to reduce the generation of dangling bonds on the wafer surface and is responsible for D it and SRV from the above analysis and discussion. On the other hand, the field-effect passivation is dominated by the characteristics of Q f . The effective minority carrier lifetime (τ eff ) is determined by the chemical passivation effect. As the trends of τ eff , S eff , and IV oc at 400 • C obtained due to ATM annealing have revealed, the chemical passivation effect that affects dangling bonds plays by far a dominant role. mechanisms: chemical passivation and field-effect passivation. The chemical passivation effect is to reduce the generation of dangling bonds on the wafer surface and is responsible for Dit and SRV from the above analysis and discussion. On the other hand, the field-effect passivation is dominated by the characteristics of Qf. The effective minority carrier lifetime (τeff) is determined by the chemical passivation effect. As the trends of τeff, Seff, and IVoc at 400 °C obtained due to ATM annealing have revealed, the chemical passivation effect that affects dangling bonds plays by far a dominant role.

J-V Measurement
Finally, in this study, a PERC solar cell with a size of 156.75 mm × 156.75 mm was produced. The current density-voltage (J-V) measurement results of PERC solar cells passivated with ALD Al 2 O 3 films of different parameters and the efficiency corresponding to various annealing temperatures are listed in Table 3. All the PERC solar cells have high conversion efficiency between 20.67% and 21.54%. Among them, the best efficiency value is 21.54% under 400 • C in ATM annealing. At 400 • C annealing temperature, the open-circuit voltage (V oc ) is 673 mV, which is very high and rightfully demonstrates that both front and back surfaces are effectively passivated. Due to the effective internal reflectivity at all interfaces between the silicon and the dielectric layer, the highest short-circuit current density (Jsc = 40.06 mA/cm 2 ) is achieved under 400 • C annealing temperature. Table 3. PERC cell efficiency corresponding to different annealing parameters.

Conclusions
In this study, ALD was used to deposit Al 2 O 3 films on p-type silicon wafers annealed at 200-500 • C in the atmosphere (ATM), and the Al 2 O 3 /Si system was then analyzed. First, the negative fixed charge (Q f ) was measured to find its correlation with the thickness of SiO 2 . The value of Q f rises with the increase of the thickness of SiO 2 , and reaches the maximum value, or −4.58 × 10 12 cm −2 at an annealing temperature of 500 • C. Second, the defect density (D it ) of value 7.51 × 10 10 cm −2 ·eV −1 was extracted at an annealing temperature of 400 • C, which also matches the optimal annealing temperature for the effective minority carrier lifetime. Third, the slowest effective surface recombination velocity (SRV), S eff , of 4.58 cm/s was observed for the Al 2 O 3 subjected to ATM annealing at 400 • C, unequivocally demonstrating that the dangling bonds situated at the silicon substrate had been properly repaired. Fourth, the longest effective minority carrier lifetime (τ eff = 2181.72 µs) was recorded which was believably caused by both the chemical passivation effect and the field passivation effect. Finally, a maximum V oc of 727 mV at annealing temperature of 400 • C was realized. From the perspective of the overall trends of τ eff , S eff , and IV oc , the chemical passivation effect critically curtails the formation of dangling bonds. In summary, a PERC solar cell size of 156.75 mm × 156.75 mm was fabricated and VHF PECVD was used to deposit SiN x film on the front side as the anti-reflective layer with the very same film on the backside as the cover layer. In conjunction with the use of ATM annealing of Al 2 O 3 /Si film at 400 • C, the best cell efficiency value was 21.54%.