Role of Structure and Composition on the Performances of P-Type Tin Oxide Thin-Film Transistors Processed at Low-Temperatures

This work reports on the role of structure and composition on the determination of the performances of p-type SnOx TFTs with a bottom gate configuration deposited by rf magnetron sputtering at room temperature, followed by a post-annealed step up to 200 °C at different oxygen partial pressures (Opp) between 0% and 20% but where the p-type conduction was only observed between in a narrow window, from 2.8% to 3.8%. The role of structure and composition were evaluated by XRD and Mössbauer spectroscopic studies that allows to identify the best phases/compositions and thicknesses (around 12 nm) to be used to produce p-type TFTs with saturation mobility of 4.6 cm2 V−1 s−1 and on-off ratio above 7 × 104, operating at the enhancement mode with a saturation voltage of −10 V. Moreover, a brief overview is also presented concerning the present state of the existing developments in processing SnOx TFTs with different methods and using different device configurations.


Introduction
Oxide electronics are a promising alternative to amorphous silicon (a-Si:H) and organic semiconductors to build reliable Thin Film Transistors (TFT) and more complex electronic circuits, addressing the challenges of flexible electronics and of the low cost and disposable electronics. In spite of the earlier work made during the 60s concerning the processing of n-type TFT [1,2], only forty five years later, with the work of Hosono [3], Wager [4], Carcia [5] and Fortunato [6], a significant worldwide interest materialised, especially for the active matrix for organic light emitting diodes (AMOLED) technology, exploiting their electronic properties, such as high saturation mobility, excellent uniformity and homogeneity, together with a high reliability associated with a low or room processing temperature [7].
However, there is no report on p-type oxide TFTs that are processed and cured at low temperatures with a performance similar to n-type, due to the low hole mobilities so far achieved in running stable and reliable devices [8]. The achievement of reliable p-type TFT, with performances similar to n-type TFT is of great importance for shaping electronics challenges towards the production of complementary metal oxide semiconductors (CMOS), a key device for analogic and digital electronic systems, thanks to their low power consumption. This is a noticeable relevant CMOS property for low cost flexible electronics. To this end, we could use organic semiconductors, aiming to exploit the advantage that they can be processed at low temperatures.
An alternative to this is the inorganic oxide TFT, which is robust but in most cases requires high process temperatures. So far, most of the reported oxide TFTs are n-type, processed either on rigid or flexible substrates in which exists a consolidate set of results for films processed via physical or chemical methods [1][2][3][4][5][6][7][8]15,16]. For p-type, the transport due to holes is associated wirh oxygen p asymmetric orbitals, which severely limit the carrier mobility and therefore the TFT performances. In spite of Cu 2 O being a p-type oxide with mobility >100 cm 2 V −1 s −1 [17,18], the TFT based on these thin films or their compositions as Cu:NiO, exhibit mobilities and On-Off current ratios of <1.5 cm 2 V −1 s −1 and 10 4 respectively [17][18][19][20][21]. Other materials have been also reported, such as NiO x processed/annealed at 300 • C, exhibiting mobilities above 25 cm 2 V −1 s −1 [22].
Tin oxide has been studied as an alternative material to produce p-type oxides, with similar performances as those obtained in n-type oxides. The structure, morphology and ambipolar characteristic of these films are well known for oxides processed by reactive sputtering using metal targets and heat treated at 400 • C [23]. Indeed, it is known that SnO has an indirect band gap structure specifically controlled by the divalent tin (SnII), in a layered crystal structure [24,25] with major contributions from Sn 5s and O 2p orbitals near the valence band maximum (VBM) and Sn 5p orbitals towards the conduction band minimum (CBM). The p-type behaviour is mainly attributed to the Sn vacancy and the O interstitial where tin is in Sn 2+ oxidation state [24,25]. The excess oxygen in the film transforms some cations in Sn 3+ to maintain electrical neutrality. This process is considered to be Sn 2+ capturing a hole and forming weak bonded holes, located inside the bandgap, near the top of the valence band as localized acceptor states [26,27]. This means that the final free carriers' behaviour of the films process is highly dependent on how oxygen is bonded and how it may compensate for defects.
Here, the contributions from Sn 5s states to VBM offer appreciable hole mobility in this material, without using a high processes temperature [28,29]. This leads also to the production of TFT with different geometry configurations [30] or using, besides metallic targets, ceramic ones on films grown by rf magnetron sputtering, heat treated at 400 • C [31].
In Table 1 we present the set of developments obtained concerning the performances of p-type SnO TFTs produced by Radio Frequency Magnetron Sputtering (RFMS) in the last 10 years [28,[32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48][49]. There, we also present the architecture selected (SBG: staggered bottom-gate; STG: staggered top-gate; CBG: coplanar bottom-gate; CTG: coplanar top-gate; DG: double-gate), the process temperature, the oxygen partial pressure (O pp ) and the type of dielectric used. Overall, we notice that the only devices processed at room temperature using the RFMS technique are those developed by the present group [28,33]. Here, it is also relevant to mention that the presence of low oxygen partial pressure during the deposition process enables the production of more stable devices [35,48,49]. Apart from that, the configuration most used is the staggered bottom-gate, while the most common dielectric used is the silicon dioxide. Apart from that, most of the substrates used are rigid (glass or silicon wafer), except that referred to as CMOS devices integrating p-type TFT based on SnO x made on paper [33].
Besides stability and reproducibility issues, the data presented show that the device with the best mobility (5.53 cm 2 V −1 s −1 , with Perovskite-Mediated Photogating [47]) does not correspond to the device with the highest On/Off (I on /I off ) ratio (5.2 × 10 6 , using argon-plasma surface treatment [45]). Apart from that, most of the TFT studied does not work on the enhancement mode, as desired for application purposes.
Moreover, we noticed that the thickness of the channel layer, together with the state of the surface (degree of roughness and surface defects), determine the electrical characteristics presented by TFT and its stability.
In Table 2 we present the most significant data achieved in the last ten years concerning the production of SnO x p-type TFT using different processing techniques such as: Pulsed Laser Deposition (PLD); Electron-Beam Evaporation (EBE); Thermal Evaporation (TE); direct current magnetron sputtering (DCMS); PVD: Physical Vapor Deposition (PVD); Atomic Layer Deposition (ALD); Spin-Coating (SC). As in Table 1, the different type of device configurations are also shown (SBG: staggered bottom-gate; STG: staggered top-gate; CBG: coplanar bottom-gate; CTG: coplanar top-gate; DG: double-gate); Oxygen partial pressures (O pp ); dielectrics and process temperatures used. Overall, the best p-type TFTs fabricated so far have been those processed by DCMS, exhibiting a mobility of 6.54 cm 2 V −1 s −1 and an On/Off ratio of 10 5 , working in the depletion mode [30]. Moreover, the p-type TFT processed by PVD and using a STG configuration exhibit the highest recorded On/Off ratio (9.6 × 10 6 ) [56].
From the present state of the art, we saw that there are several parameters that impact on the electrical performance presented by p-type TFT SnO x based, most of them connected to the process parameters used, the structure of the films obtained, as well as the dielectric and the geometry configuration used.
In this paper, we report the fabrication of p-type SnO x TFTs deposited by RFMS technique at RT that are post-annealed up to 200 • C, turning the process compatible with the use of low-cost flexible substrates as paper [7]. In this study, we aim to better understand the role that the structure, surface finishing and oxygen play during the growing process of SnO x in order to define a process window that allows the production of reliable and high stable p-type TFT with high electronic performances, such as field effect mobility and On-Off-current ratios.

Films Preparation
SnO x thin films (5-100 nm) were deposited on glass substrates with an r.f. magnetron sputtering system at room temperature, using a metallic tin target (99.999% pure). Depositions were carried out in a controlled atmosphere of oxygen and argon, using an r.f. power of 40 W and 4 substrates of 1 inch ×1 inch placed in the substrate holder were rotated at a speed of 40 rpm, aiming to get high uniform films overall substrate area. Experiments were performed by varying O pp (O pp = P O2 /(P O2 + P Ar ), between 0% and 20%, where P O2 and P Ar are partial pressures of oxygen and argon, respectively, keeping the total deposition pressure constant at 0.2 Pa. Moreover, the argon gas flow was kept constant-around 50sccm-while the oxygen gas flow varied from 0 to 12.5 sccm. At these conditions, the deposition rate was 40 Å/min. After deposition, the films were annealed under standard environment conditions at temperatures around 200 • C, for different times inside a tubular furnace.

Structure Morphology, Composition and Electro-Optical Data and Analysis
Prior to processing the TFT devices, the material in which the channel is based was deposited on glass substrates and their structure, morphology, composition and electro-optical properties were Nanomaterials 2019, 9, 320 5 of 18 fully analysed, aiming to determine the best conditions in which to grow the channel layers of the TFT. The structure of the films was studied by X-ray diffraction (XRD) using a PANalytical X'Pert PRO (Cambridge, MA, USA) with Cu Kα radiation (λ = 1.540598 Å) while the morphology was assessed by scanning electron microscopy (SEM) with a ZEISS SEM/FIB AURIGA (Jena, Germany) operated at 2 kV, with an aperture size of 30 µm and a working distance of 5.2 nm. The surface roughness of the films was analysed using atomic force microscopy (AFM) with an Asylum MFP-3D instrument (Oxford Instruments, Oxford, UK) in non-contact mode.
The electrical resistivity (ρ), Hall mobility (µ) and free carrier concentration and their nature (electrons or holes) were determined by Hall effect measurements in Van der Pauw geometry in a Biorad HL 5500 equipment (York, England) using a constant magnetic field of 0.5 T. The electrical properties of the samples were measured at room temperature.  TFT. The structure of the films was studied by X-ray diffraction (XRD) using a PANalytical X'Pert PRO (Cambridge, MA, USA) with Cu Kα radiation (λ=1.540598 Å) while the morphology was assessed by scanning electron microscopy (SEM) with a ZEISS SEM/FIB AURIGA (Jena, Germany) operated at 2 kV, with an aperture size of 30 μm and a working distance of 5.2 nm. The surface roughness of the films was analysed using atomic force microscopy (AFM) with an Asylum MFP-3D instrument (Oxford Instruments, Oxford, UK) in non-contact mode. The optical transmittance (T%) was measured between 300 to 2500 nm, using a double-beam UV-vis-NIR spectrometer (Lambda 950, San Dimas, CA, USA).

Structure Data and Analysis
The electrical resistivity (ρ), Hall mobility (μ) and free carrier concentration and their nature (electrons or holes) were determined by Hall effect measurements in Van der Pauw geometry in a Biorad HL 5500 equipment (York, England) using a constant magnetic field of 0.5 T. The electrical properties of the samples were measured at room temperature. Figure 1 shows the XRD and Mössbauer and CEMS spectra of as-deposited and annealed SnOx films with Opp = 3.0% and Opp = 3.6% Opp, respectively, as the limits of the interval where a p-type transport behaviour is observed, as proven by Hall effect measurements (a positive Hall coefficient obtained for all samples evaluated, after annealing).

Structure Data and Analysis
The XRD data show that the films as deposited are amorphous, turning crystalline after annealing at 200 C. Figure 1 a shows that the XRD pattern of films are 120 nm thick as deposited, where we can see that the metallic tin dominates over the SnO phase. It also shows the XRD diffractograms for SnO powder and metallic Sn, to be taken as references.
Room temperature transmission Mössbauer and 119 Sn conversion-electron Mössbauer spectroscopy (CEMS) were performed on the set of samples prepared, before and after annealing, using a proportional backscatter detector RIKON-5 (Wissel) in flowing 5% CH4-95% He gas mixture The XRD data show that the films as deposited are amorphous, turning crystalline after annealing at 200 • C. Figure 1a shows that the XRD pattern of films are 120 nm thick as deposited, where we can see that the metallic tin dominates over the SnO phase. It also shows the XRD diffractograms for SnO powder and metallic Sn, to be taken as references.
Room temperature transmission Mössbauer and 119 Sn conversion-electron Mössbauer spectroscopy (CEMS) were performed on the set of samples prepared, before and after annealing, using a proportional backscatter detector RIKON-5 (Wissel) in flowing 5% CH 4 -95% He gas mixture (see Figure 1b). The spectra were collected using a conventional constant acceleration spectrometer and a 5 mCi Ca 119m SnO 3 source. The velocity scale was calibrated using a 57 Co (Rh) source and an α-Fe foil. The Sn isomer shifts (IS) are given relative to BaSnO 3 reference material at 295 K (RT) and obtained by adding 0.031 mm/s to the IS relative to the source. The spectra were fitted to Lorentzian lines using a non-linear least-squares method. The set of extrapolated parameters extracted are presented in Table 3. The Mössbauer spectra of Sn, SnO and SnO 2 samples were also taken as reference samples in order to compare with those of the phases detected in the films by CEMS. The spectra of the reference samples reveal the typical spectra corresponding to β-Sn, α-SnO and SnO 2 , respectively [59,60]. The α-SnO spectrum reveals the typical air contamination due to the higher recoilless fraction of Sn 4+ in SnO 2 as compared to Sn 2+ in α-SnO [61,62], besides the presence of the α-SnO [60][61][62][63]. The spectra recorded were fitted by three contributions connected to isomer shifts (IS) of Sn 4+ , Sn 2+ and metallic Sn (see Table 1). The absorption peak due to metallic Sn is similar to that of the β-Sn, confirming its presence, which agreed with the XRD data. Moreover, the IS quadrupole splitting (QS) and the line widths of Sn 2+ in the films before annealing are higher than the corresponding parameters for bulk α-SnO. After annealing, the widths of Sn 2+ decrease, reaching values close to those of crystalline α-SnO. This suggests that the Sn 2+ oxide present is amorphous before annealing, transforming into the crystalline form after annealing at 200 • C for at least 30 minutes. These data agree with those obtained from XRD for the same samples, showing that the films as-deposited are mainly composed of amorphous SnO and metallic β-Sn, with residual amounts of SnO 2 , which were only detected by CEMS. The SnO 2 IS and quadrupole splitting (QS) deduced differs from those of bulk SnO 2 which we attribute to the low degree of crystallinity of the films. Assuming that the recoilless factors of β-Sn, SnO and SnO 2 in films are not different for the same species in the different samples, the fraction of Sn atoms in each phase should follow the same trend, with annealing or with O pp used. Indeed, the data recorded reveal that the fraction of Sn present as β-Sn is lower in the film deposited at higher O pp (3.6%), than in those deposited at 3.0%. After annealing at 200 • C, the films crystallize leading to the formation of a strong α-SnO phase which also contributes to the oxidation of β-Sn. Under these conditions, the SnO x with 1 < x < 2, is the dominant phase of the channel layer with a small contribution from metallic tin, explaining the p-type transport behaviour observed.

Electrical Data and Analysis
Hall Effect measurements were performed to identify the charge carrier and carrier mobility in the material. As we are in the presence of ambipolar material, as it is the case of SnO x [64], electrons and holes will pile up at the same side of the sample and consequently the measured Hall voltage depends on the relative mobilities and concentrations of holes and electrons. Hall mobility for an ambipolar semiconductor is thus given by, where n, p, µ n and µ p represent electron density, hole density, electron mobility and hole mobility respectively. This leads to a reduction in the Hall mobility, compared to the mobilities of the charge carriers.
In the present study, the samples as deposited exhibit fluctuations in the sign and magnitude of the Hall coefficient, where the average mobilities of carriers were of about 10 −1 cm 2 V −1 s −1 . After annealing up to 200 • C for 30 minutes, films prepared with 2.8% < O pp <3.8 show a positive Hall coefficient. This suggests a considerably large density of holes compared to the density of electrons, resulting in a positive Hall voltage with typical Hall mobility of 2 cm 2 V −1 s −1 associated to the materials' evaluated. Figure 2 shows the resistivity variation of SnO x films for different O pp , as deposited and after annealing at 200 • C, for different annealing times.
Sn atoms in each phase should follow the same trend, with annealing or with Opp used. Indeed, the data recorded reveal that the fraction of Sn present as β-Sn is lower in the film deposited at higher Opp (3.6%), than in those deposited at 3.0%. After annealing at 200 C, the films crystallize leading to the formation of a strong α-SnO phase which also contributes to the oxidation of β-Sn. Under these conditions, the SnOx with 1 < x < 2, is the dominant phase of the channel layer with a small contribution from metallic tin, explaining the p-type transport behaviour observed.

Electrical Data and Analysis
Hall Effect measurements were performed to identify the charge carrier and carrier mobility in the material. As we are in the presence of ambipolar material, as it is the case of SnOx [64], electrons and holes will pile up at the same side of the sample and consequently the measured Hall voltage depends on the relative mobilities and concentrations of holes and electrons. Hall mobility for an ambipolar semiconductor is thus given by, where n, p, μn and μp represent electron density, hole density, electron mobility and hole mobility respectively. This leads to a reduction in the Hall mobility, compared to the mobilities of the charge carriers.
In the present study, the samples as deposited exhibit fluctuations in the sign and magnitude of the Hall coefficient, where the average mobilities of carriers were of about 10 −1 cm 2 V −1 s −1 . After annealing up to 200 °C for 30 minutes, films prepared with 2.8% < Opp <3.8 show a positive Hall coefficient. This suggests a considerably large density of holes compared to the density of electrons, resulting in a positive Hall voltage with typical Hall mobility of 2 cm 2 V −1 s −1 associated to the materials' evaluated. Figure 2 shows the resistivity variation of SnOx films for different Opp, as deposited and after annealing at 200 C, for different annealing times. The data show that the resistivity of the films processed tends to saturate around 30-40 •cm, for annealing times above 30 mn. The lowest annealing time is for samples processed with Opp above 3.20%, while the highest time (above 60 mn), for samples prepared with 2.80%< Opp <3.20%. The data show that the resistivity of the films processed tends to saturate around 30-40 Ω·cm, for annealing times above 30 mn. The lowest annealing time is for samples processed with O pp above 3.20%, while the highest time (above 60 mn), for samples prepared with 2.80%< O pp <3.20%.
Annealing at temperatures above 200 • C cause again a decreasing tendency in material resistivity (not shown here) that can be associated with the phase transformation of the material from SnO (p-type) to SnO 2 (n-type). These data are consistent with those depicted in Figure 1b. Figure 3a shows the optical transmittance data of the films processed for 2.80%< O pp <3.20%, as deposited (RT) and after annealing at 200 • C, during 30 mn. The data depicted show that as O pp increases the films become more transparent, as expected. As deposited, independent of O pp used, the data depicted show, on average, transmittances below 20% in the visible region. These low values are attributed to the presence of large concentration of metallic tin in the films. By annealing the films, the optical transmittance in the visible region increases up to 55%, function of the O pp used. Figure 3a shows the optical transmittance data of the films processed for 2.80%< Opp <3.20%, as deposited (RT) and after annealing at 200 °C, during 30 mn. The data depicted show that as Opp increases the films become more transparent, as expected. As deposited, independent of Opp used, the data depicted show, on average, transmittances below 20% in the visible region. These low values are attributed to the presence of large concentration of metallic tin in the films. By annealing the films, the optical transmittance in the visible region increases up to 55%, function of the Opp used.

Optical Data and Analysis
The optical band gap Eg of the films were determined by the relationship: where  is the absorption coefficient, h denotes the photon energy and r a constant depending on the type of optical transition expected. The Eg value is then obtained by linearly extrapolating the plot  The optical data in Figure 3a were analysed with r = ½ (direct transition, for SnO, expected to be Eg 2.5 eV and for SnO2 Eg 3.6 eV, see Figure 3b) and r = 2 (Indirect transition, for SnO Eg 1 eV). For the different Opp used, as deposited the direct band gap varies between 1.5 eV and 1.8 eV, while the estimated indirect band gap is kept around 0.6 eV. These values reflect the quasi metallic state of the films produced. After annealing, the films are better oxidized and the structure changes, as observed in Figure 1. Overall, we estimate a direct band gap with 2.6 eV <Eg <2.75 eV, while the indirect band gap is 1.6 eV < Eg < 2.2 eV (see Figure 3c,  The optical band gap E g of the films were determined by the relationship: where α is the absorption coefficient, hν denotes the photon energy and r a constant depending on the type of optical transition expected. The E g value is then obtained by linearly extrapolating the plot of (α · h · ν) 1/r versus h · ν and finding the intersection with the abscissa. The optical data in Figure 3a were analysed with r = 1 2 (direct transition, for SnO, expected to be E g~2 .5 eV and for SnO 2 E g~3 .6 eV, see Figure 3b) and r = 2 (Indirect transition, for SnO E g~1 eV). For the different O pp used, as deposited the direct band gap varies between 1.5 eV and 1.8 eV, while the estimated indirect band gap is kept around 0.6 eV. These values reflect the quasi metallic state of the films produced. After annealing, the films are better oxidized and the structure changes, as observed in Figure 1. Overall, we estimate a direct band gap with 2.6 eV <E g <2.75 eV, while the indirect band gap is 1.6 eV < E g < 2.2 eV (see Figure 3c

Devices Results and Analysis
Taking into a count the set of results obtained during the evaluation of the films processed, we centred our attention in evaluating the devices performances by using tin oxide channel layers processed close to the extremes of the O pp window in which a clear p-type behaviour was observed after annealing, respectively for O pp = 3.0% (≈1.57 sccm) and O pp = 3.6% (≈1.78 sccm). To reduce the channel conductance, thus allowing a better modulation of the same, we reduced the channel layer thickness to values around 12 nm. A batch of more than 40 devices were evaluated and the devices performances varied within a standard deviation of about ± 7% from the average.

Devices Structure, Geometry, Fabrication and Characterization Conditions
Bottom gate TFTs were fabricated on glass substrates coated with 150 nm thick layer of sputtered ITO and a 220 nm thick layer of aluminium-titanium oxide (ATO). SnO x channel layer (width/length = 50 nm/50 nm and 12 nm thick) was deposited over this coating by r.f. magnetron sputtering at RT, using the same process conditions as reported before. Drain and source electrodes were based on Ni/Au (9 nm/60 nm) stack layers deposited by electron beam evaporation. After deposition, the devices were annealed in air up to 200 • C for 30 minutes.

Devices Results and Analysis
Taking into a count the set of results obtained during the evaluation of the films processed, we centred our attention in evaluating the devices performances by using tin oxide channel layers processed close to the extremes of the Opp window in which a clear p-type behaviour was observed after annealing, respectively for Opp = 3.0% (1.57 sccm) and Opp = 3.6% (1.78 sccm). To reduce the channel conductance, thus allowing a better modulation of the same, we reduced the channel layer thickness to values around 12 nm. A batch of more than 40 devices were evaluated and the devices performances varied within a standard deviation of about  7% from the average.

Devices Structure, Geometry, Fabrication and Characterization Conditions
Bottom gate TFTs were fabricated on glass substrates coated with 150 nm thick layer of sputtered ITO and a 220 nm thick layer of aluminium-titanium oxide (ATO). SnOx channel layer (width/length = 50 nm/50 nm and 12 nm thick) was deposited over this coating by r.f. magnetron sputtering at RT, using the same process conditions as reported before. Drain and source electrodes were based on Ni/Au (9 nm/60 nm) stack layers deposited by electron beam evaporation. After deposition, the devices were annealed in air up to 200 °C for 30 minutes.    Figure 4f shows the cross-section SEM image of the TFT prepared at 3.0% Opp, revealing a perfect step coverage of the deposited layer (channel and drain/source contacts), highly compact, uniform and homogeneous, without visible defects.
TFT electrical characterization was performed with an Agilent 4155C semiconductor parameter analyzer (Santa Clara, CA, USA) and a Cascade Microtech M150 microprobe station (Livermore, CA,   Figure 4f shows the cross-section SEM image of the TFT prepared at 3.0% O pp , revealing a perfect step coverage of the deposited layer (channel and drain/source contacts), highly compact, uniform and homogeneous, without visible defects.
TFT electrical characterization was performed with an Agilent 4155C semiconductor parameter analyzer (Santa Clara, CA, USA) and a Cascade Microtech M150 microprobe station (Livermore, CA, USA) inside a dark box at ambient atmosphere. By doing so, we avoid problems that may arise from persistent photoconductive effects [65].

Capacitance Measurements Data and Analysis
In order to better understand the role of the interfaces as well as of the dielectric on the TFT performances, CV measurements were directly performed on the TFTs by performing measurements between the gate electrode and drain and source short-circuited. The data were interpreted using an electrical model consisting of a contact resistance R C (the same value for drain and source regions) in series with a combination of two parallel RC resonators as shown in the sketch of Figure 5a. One of the resonators represents the semiconductor channel capacitance (C S ) that varies dynamically, depending on the extension of the accumulation/depletion layer. The other component is the interface trap capacitance (C it ) in series with the corresponding associated interface resistance R it , both depending on the interface defects given by: where D it is the interface trap density, τ it = R it × C it is the trap response time. Finally, we have in series the insulator geometric capacitance (C ox ). As the frequency tends to a steady state condition, we have almost C it in parallel with C s and the resulting capacitance in series with C ox . Therefore, for non-perfect semiconductors (basically, the amorphous ones), by using a frequency modulation less than the relaxation frequency of the semiconductor ( f r = 1 2πR B C s = 1 2πρ B ε S ε 0 , where R B is the channel bulk resistance), we expect that capacitance will be influenced by the number and nature of the interface defects, their length and depth extension which determines the way in which the structure responds to the electrical stimulus in the low frequency regime. On the other hand, at very high frequencies, C s dominates and C it ∼ = 0, being now relevant the role of R it in parallel with C ox . In this case the capacitance-voltage curves can be distorted due to charging effects, leading to a decrease or even to a not well-defined flat capacitance maximum (C max ), as observed in the normalized C-V plots of Figure 5b for different frequencies and on the behaviour of C max with the frequency, depicted in Figure 5c. Figure 5b also shows the transfer characteristics of the TFT under analysis, where the hysteresis behaviour recorded is visible, which we associate with the role of interface defects. Figure 5c shows the dependence of the maximum capacitance recorded on the frequency. There, we notice that at frequencies below 100 Hz the capacitance tends to reach flat behaviour while the hysteresis voltage shift is enhanced, following a similar trend as that of the I-V TFT transfer characteristics. We associate this behaviour with interface localized states that respond at frequencies below f r .
The analysis of the C-V plots shows that the minimum capacitance is not fully flat. This behaviour is attributed to the small thickness of the semiconductor (≤ 12 nm), which limits the extension of the depletion region. As the possible maximum width of depletion region is 12 nm (the semiconductor thickness), this means that the minimum capacitance of the system will not be much lower than the total capacitance. We also estimate the flat band voltage shift and the oxide charge density.
The analysis of the C-V plots shows that the minimum capacitance is not fully flat. This behaviour is attributed to the small thickness of the semiconductor (≤ 12 nm), which limits the extension of the depletion region. As the possible maximum width of depletion region is 12 nm (the semiconductor thickness), this means that the minimum capacitance of the system will not be much lower than the total capacitance. We also estimate the flat band voltage shift and the oxide charge density.  Figure 6 shows the dependence of these parameters on the frequency, for the upward and downwards sweeps, in order to take into account the hysteresis observed. For the set of calculations performed, it was considered that the level of acceptor concentration (Na) was in the range of 10 17 cm −3 with a good work function match between the gate electrode and the semiconductor. Overall the data depicted show an enhancement on the flat band voltage and on the oxide charge density as the frequency decreases. Figures 7 and 8 show the TFT electrical characteristics of the two extreme cases evaluated, as processed, and after 50 days as a way to determine their stability (devices ageing effects). Figure 7a shows the output characteristics (IDS-VDS) of such TFT produced at Opp = 3.0%. The gate voltage was varied from 0 V to −50 V in −10 V steps. Very small IDS at zero gate voltage indicates an  Figure 6 shows the dependence of these parameters on the frequency, for the upward and downwards sweeps, in order to take into account the hysteresis observed. For the set of calculations performed, it was considered that the level of acceptor concentration (N a ) was in the range of 10 17 cm −3 with a good work function match between the gate electrode and the semiconductor.  Figure 6 shows the dependence of these parameters on the frequency, for the upward and downwards sweeps, in order to take into account the hysteresis observed. For the set of calculations performed, it was considered that the level of acceptor concentration (Na) was in the range of 10 17 cm −3 with a good work function match between the gate electrode and the semiconductor. Overall the data depicted show an enhancement on the flat band voltage and on the oxide charge density as the frequency decreases. Figures 7 and 8 show the TFT electrical characteristics of the two extreme cases evaluated, as processed, and after 50 days as a way to determine their stability (devices ageing effects). Figure 7a shows the output characteristics (IDS-VDS) of such TFT produced at Opp = 3.0%. The gate voltage was varied from 0 V to −50 V in −10 V steps. Very small IDS at zero gate voltage indicates an Overall the data depicted show an enhancement on the flat band voltage and on the oxide charge density as the frequency decreases. Figures 7 and 8 show the TFT electrical characteristics of the two extreme cases evaluated, as processed, and after 50 days as a way to determine their stability (devices ageing effects).

TFT Electrical Data and Analysis
subthreshold swing voltage (the slop of the transfer curve when the current goes from the Off state to the On state) is reduced by more than a factor of 3. This allows us to select 12 nm as the best device thickness as stated before. Figure 7c shows the plot of the square root of the absolute value of the drain current, at VDS = −30 V as a function of VGS, for the same samples depicted in Figure 7b, for evaluating saturation mobility and threshold voltage, respectively. The data depicted show that irrespective of the channel layer thickness, the saturation mobility achieved is around 4.6 cm 2 V −1 s −1 , while the threshold voltage is shifted from 8.1 V to −10 V on reducing the channel thickness from 28 nm to 12 nm, respectively. Negative threshold voltage indicates the enhancement mode operation of the p-channel TFTs, as required to keep the channel closed when no voltage is applied to the gate.   Table 4 shows the TFT parameters extracted from Figure 7d, where the dominant phase composition of the films processed is also shown, as revealed by the difractograms in Figure 1. The data show that the most stable devices with the best device performances are achieved when using an Opp of about 3% and an annealing time of around 30 minutes, where the main dominant phase is just attributed to -SnO. On the other hand, the films processed at Opp  3.6% reveal a growing role of the -SnO phase and so increase the ambipolar behaviour of the films processed.   Figure 8 shows the transfer curves of TFTs fabricated using Opp = 3% and Opp = 3.6%, measured along consecutive 50 days after their fabrication. The data show that that the TFTs are very stable in operation, without any significant variation on On/Off ratio, threshold voltage and mobility.

Discussion of the Results.
The analysis of the structure, composition and morphology of the films processed, together with the evaluation of their electrical and optical performances, allow us to select the best process conditions to produce high stable and reliable p-type tin oxide films by RFMS at RT, surpassing the existing state of the art knowledge, as shown in Table1. The data shown in Figure 1 reveal a structure in which the metallic tin dominates over the SnO phase, as also confirmed by Mössbauer  an almost closed channel. On increasing the gate voltage to higher negative values, holes accumulated at the channel-insulator interface forms a conduction path between source and drain. These TFTs exhibit hard saturation at large V DS , which is similar to pinch off in the usual field-effect transistors, revealing the high quality of the devices fabricated. Figure 7b shows the transfer characteristics of the same TFT, as above, but now using two different thicknesses for the channel layer, 12 nm and 28 nm respectively. The data depicted reveal that by decreasing the channel thickness the On/Off ratio improves from~10 2 to 7 × 10 4 , while the subthreshold swing voltage (the slop of the transfer curve when the current goes from the Off state to the On state) is reduced by more than a factor of 3. This allows us to select 12 nm as the best device thickness as stated before. Figure 7c shows the plot of the square root of the absolute value of the drain current, at V DS = −30 V as a function of V GS , for the same samples depicted in Figure 7b, for evaluating saturation mobility and threshold voltage, respectively. The data depicted show that irrespective of the channel layer thickness, the saturation mobility achieved is around 4.6 cm 2 V −1 s −1 , while the threshold voltage is shifted from 8.1 V to −10 V on reducing the channel thickness from 28 nm to 12 nm, respectively. Negative threshold voltage indicates the enhancement mode operation of the p-channel TFTs, as required to keep the channel closed when no voltage is applied to the gate. Figure 7d shows the dependence of the absolute value of I DS [ABS(I DS )] as a function of V GS for devices fabricated using O pp equal to 3% and 3.6%, respectively and heat treated at 200 • C during 30 mn and 60 mn, respectively. Table 4 shows the TFT parameters extracted from Figure 7d, where the dominant phase composition of the films processed is also shown, as revealed by the difractograms in Figure 1. The data show that the most stable devices with the best device performances are achieved when using an O pp of about 3% and an annealing time of around 30 minutes, where the main dominant phase is just attributed to α-SnO. On the other hand, the films processed at O pp ≥ 3.6% reveal a growing role of the β-SnO phase and so increase the ambipolar behaviour of the films processed.  Figure 8 shows the transfer curves of TFTs fabricated using O pp = 3% and O pp = 3.6%, measured along consecutive 50 days after their fabrication. The data show that that the TFTs are very stable in operation, without any significant variation on On/Off ratio, threshold voltage and mobility.

Discussion of the Results
The analysis of the structure, composition and morphology of the films processed, together with the evaluation of their electrical and optical performances, allow us to select the best process conditions to produce high stable and reliable p-type tin oxide films by RFMS at RT, surpassing the existing state of the art knowledge, as shown in Table 1. The data shown in Figure 1 reveal a structure in which the metallic tin dominates over the SnO phase, as also confirmed by Mössbauer spectroscopy data. This suggests that in the α-SnO phase, the Sn 2+ oxide present is amorphous. After annealing in air, the metallic tin (β-Sn) is oxidized leading to the SnO x (1 < x <2) phase formation, where now the Sn 2+ oxide present is crystalline, with a strong α-SnO phase for which the minimum heat treatment time required is of about 30 min. To reach this goal O pp of ≥2.8% is needed which corresponds with the use of an oxygen gas flow above 1.46 sccm.
Below an oxygen gas flow of 1.46 sccm, films are metallic in nature and adhesion to the glass substrate was very poor.
On the other hand, if O pp > 3.8%, which corresponds with the use of an oxygen gas flow above 1.89 sccm, the films are highly resistive (>10 8 Ω·cm), decreasing substantially after annealing, with SnO 2 being the dominant phase. In these conditions, films exhibit an n-type conduction behaviour. This clearly favours the ambipolar behaviour, as broadly observed [38,42,51,53].
Since we used a metallic tin target for sputtering, very low O pp was not sufficient to oxidize the film. The experimental data show that a stable SnO phase is only obtained if used during the deposition process of an oxygen gas flow in the range of 1.46-1.89 sccm (2.8% < O pp <3.8%.), after heat treatment at 200 • C for 30 minutes. This corresponds to producing films with a resistivity in the range of 30-40 Ω.cm (see Figure 2). On the other hand, the use of high oxygen gas flow (more than 1.89 sccm) favours SnO 2 formation. That is, we can use the same material and, by proper control of the process parameters such as O pp and gas flow, turn it into an n-type or p-type semiconductor [51,53].
The optical data shows that the transparency in the visible range for films as deposited is below 20%, increasing as O pp increases. Moreover, the heat treatment enhances the optical transparency by about 3 times, proving that under these conditions the oxidation phase dominates over the metallic one (see Figure 3). The estimated bandgap value for the films deposited using oxygen flow in the range of 1.46-1.89 sccm was around 2.6 eV (see Figure 3). This agrees with the reported direct bandgap value of 2.7 eV, associated with the SnO dominant phase.
The study described above allowed us to select the best process conditions to grow p-type tin oxide films as being those for which O pp = 3%. Moreover, allow us also to observe that the thickness of the films plays a relevant role in determining the electrical modulating behaviour of the channel, as also observed in other works [48]. This led us to select the proper thickness of the channel layer as being 12 nm, as shown in Figure 4.
The analysis of the capacitance measurements realized on the TFT (pad contact area of about 100 µm × 100 µm) shows that the capacitance reaches a flat maximum for frequencies below 100 Hz, which corresponds to a value of about 23.8 nF/µm 2 . This allowed us to infer the saturation mobility [15]. Here, the reduced channel thickness (≤ 12 nm), limits the extension in which the channel is depleted and also its modulation extension. The hysteresis observed is attributed to the role of interface localized states in responding to electrical stimulus below the relaxation frequency f r . Moreover, from these measurements we could estimate the flat band voltage shift and the oxide charge density (see Figure 6) as being in the range from 13-15 V and 5 × 10 12 -6 × 10 12 C/cm 3 , for the low frequency regime, shifting towards 9-10 V and 3.5 × 10 12 -4 × 10 12 C/cm 3 , respectively for the high frequency regime, where shallow states do not respond to the electrical stimulus [15].
The analysis of the electrical characteristics of the TFT depicted in Figures 7 and 8 show that p-channel oxide TFTs manufactured at RT, followed by intentional heat treatment at 200 • C, using a narrow process window associated with the oxygen gas flow used are highly reproducible, reliable and stable. In addition, they all work in the enhancement mode, exhibiting very good electronic performance, translated by high mobility and On/Off ratio, together with a relative low threshold voltage. The annealing temperature used is suitable for fabricating these devices on plastic or even on paper substrates [7], which cannot be the case when using heat treatment much above 200 • C [29][30][31][32]. The data depicted clearly show that the films developed throughout this study are among the best ever produced, as can be seen in Tables 1 and 2, irrespective of the process technique used. Moreover, the very high On current of these devices makes them ideal for fabricating active matrix OLED driving circuits, where a TFT must supply sufficient hole current to the anode of the OLED. Use of an n-channel TFT results in a voltage drop over the OLED, which affects the drain current of the TFT. However, it does not affect the drain current of a p-channel TFT in the saturation mode.

Conclusions
In summary, we have fabricated highly reproducible high-performance p-channel oxide TFTs on glass substrates using an SnO x channel layer, for which the proper process conditions were selected. The SnO phase was identified and quantified by two independent techniques, XRD and Mossbauer spectroscopy, corroborating the p-type oxide semiconductor behaviour obtained, for films grown at low O pp (around 3%), where the dominant phase is due to α-SnO. The TFTs fabricated show typical saturation mobility of 4.6 cm 2 V −1 s −1 and On-Off ratio > 7 × 10 4 , with threshold voltages of about −10 V, indicating that the devices work in the enhancement mode. This is one of the best stable electrical performances achieved so far for p-type oxide TFTs processed at RT and heat treated at temperatures around 200 • C, as the survey conducted concerning the present state of the art in producing p-type TFT based on tin oxide shows (see Tables 1 and 2). This will enable the fabrication of fully transparent CMOS either on rigid or flexible substrates, associated with all the advantages offered by transparent/oxide electronics.