TCAD Simulation of STI Depth and SiO₂/Silicon Interface Trap Modulation Effects on Low-Frequency Noise in HZO-Based Nanosheet FETs

Round 1

Reviewer 1 Report (New Reviewer)

Comments and Suggestions for Authors

This manuscript investigates the combined effects of shallow trench isolation depth and SiO2/silicon interface trap density on low-frequency noise in HZO-based nanosheet FETs using TCAD simulation. The comparison between HfO2 and HZO as ferroelectric gate dielectrics demonstrates that HZO offers superior noise performance due to its lower oxide trap density and enhanced gate field control. However, several flaws need to be addressed.

1. The investigation of STI depth (3, 5, and 9 nm) and interface trap density uses only a few discrete values. A broader range of parameters may be necessary to identify the global optimum or to ensure robustness across a wider process window.
2. The optimization focuses exclusively on minimizing low-frequency noise. However, the potential impact of the recommended parameters (e.g., an extremely shallow 3 nm STI) on other critical device characteristics—such as threshold voltage, leakage current, and overall reliability—is not thoroughly addressed. Practical design necessitates trade-offs among multiple performance metrics.
3. The applicability and accuracy of the noise models used for advanced GAA NS-FET structures incorporating ferroelectric materials such as HZO may require further discussion or calibration against experimental data.

Author Response

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Reviewer 2 Report (New Reviewer)

Comments and Suggestions for Authors

The paper presents a TCAD simulation study on the effects of STI depth and interface traps on the Low-Frequency Noise (LFN) of HZO-based Nanosheet FETs. While the topic is of interest for sub-5nm device reliability, several critical issues regarding the physical analysis, simulation methodology, and presentation need to be addressed before publication.

1. In Figure 6, the author compares the transfer characteristics under different STI depths. However, the variation in I_DS-V_GS curves is almost negligible, and the claimed trend of Subthreshold Swing (SS) reduction is not clearly visible. The author should clarify the physical significance of this figure. If STI depth has such a minimal impact on DC performance, the author needs to provide a deeper explanation of why it significantly modulates the noise power spectral density (PSD).
2. LFN simulation results (especially the trap density N_t and Hooge parameter) are highly sensitive to model parameters. Has the TCAD model been calibrated against experimental data? Without such validation, the quantitative conclusions regarding the optimal STI depth (3 nm) may lack persuasiveness.
3. The study focuses on TCAD-based physical simulation. However, for nanosheet devices to be used in circuit design, these noise characteristics must be reflected in industry-standard compact models (e.g., BSIM-CMG). The author should discuss the compatibility of their findings with current modeling frameworks. In particular, a recent study in IEEE JEDS (2024) 12: 275-280 has systematically evaluated the consistency of LFN models in multi-gate structures. Referencing such work would significantly strengthen the discussion on the practical applicability of the proposed simulation methodology.
4. As the device uses HZO, please clarify whether the ferroelectric polarization fluctuation is considered in the noise model. How does the ferroelectric nature of the insulator specifically benefit the noise performance compared to standard high-k materials like HfO₂?
5. The font size of the legends in Figure 6 and subsequent plots is too small to read. Please increase the font size for all axis labels and legends to ensure clarity.

Author Response

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Round 2

Reviewer 1 Report (New Reviewer)

Comments and Suggestions for Authors

The manuscript can be published after the authors' carefully revision.

Reviewer 2 Report (New Reviewer)

Comments and Suggestions for Authors

This manuscript can be accepted.

This manuscript is a resubmission of an earlier submission. The following is a list of the peer review reports and author responses from that submission.

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

The manuscript analyzes the low-frequency noise characteristics of NSFETs using TCAD simulations, appears to be a well-structured and relevant study for Nanomaterials. The focus on optimizing both structural (STI depth) and material (HZO and HfO₂, interface trap density) parameters for noise reduction is timely, as it addresses key reliability challenges in next-generation, low-power logic devices. However, there are several aspects that require further clarification and improvement. The specific comments are as follows.

 

1. Page 2, NSFET process and simulation setup, the process of spacer forming is not clear. It is better to explain the structure of the spacer with schematic figures.
2. Page 3, Figure 1, the bottom layer was buried oxide(BOX), however, the color and the parameter of that layer were silicon. The author should correct the inconsistency.
3. Page 5, Figure 5, the figure is not clear. Please change the figure to a clearer one. In addition, please note the source/drain and gate in the structure.
4. Page 5, Figure 6, were the curves calibrated with the experimental data? What is the reason for the influence of the STI? What physical models have been used in the simulation? The authors should give more detailed information about the simulation and have a discussion about the influence of the STI.
5. Page 6, Table 2, what is the reason for the SS lower than 60mV/dec?
6. Page 7, TCAD simulation of NSFET, Table 3, how to determine the parameter of LK equation? What is the thickness of the HZO? In actual devices, 1 nm thick HZO cannot exhibit ferroelectricity. The author should discuss the influence of thickness.
7. Page 7, what is the origin of the noise performance improvement of HZO compared with HfO₂? Is it because the different physical models have been used in the simulation? The author should explain it in detail.
8. Page 9, Figure 8, the interface trap density is assumed to be as 1e8 eV−1cm-2. However, in actual devices, the Dit cannot be such low. The author should not include such results.
9. Page 10 Figure 9, the simulation results seem to be not convergence. The author should check the mesh points are appropriate or not.
10. Page 11, NSFET parameter optimization, the author claim that the optimized thickness of STI is 3 nm. What if the thickness of STI even lower? In addition, it is not been explain the physical origin of the influence of STI to the noise.
11. Typos should be corrected. For example, it should be “HfO₂” instead of “Hf0₂”

 

 

Author Response

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Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

The obtained noise characteristics are not explained; only some connection with the electric field strength and traps is mentioned. However, it is not clearly justified; the presented statements raise doubts. For example, the phrase “increase in trapped charge density and a corresponding rise in PSD.” (line 13) raises doubts. What is the meaning of this phrase: “Various types of noise exist in FET devices.” (line 49)? It is not clear what was intended to be said in eq. (3). “Flicker noise” and “1/f noise” are synonyms. It is not clear what “trap charges are insufficient” means and why it causes mobility fluctuations (line 142). It is also unclear what was meant by “GR noise primarily originates from differences between the Fermi energy level and trap energy level.” (line 150) – how is it “originates from differences”?

The literature review is very poor and requires expansion. There are indeed many papers about low-frequency noise in FETs.

Comments on the Quality of English Language

There are a lot of typos.

Author Response

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Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

The authors have addressed most of the questions in the revised manuscripts. Still, there are several issues remained. The following are the details.

 

1. Page 11-12, Figure 10, the figures are not changed except for the resolution. In these figures, the edges for trapped charges near and beneath the STI layer are abrupt, which is abnormal. Since the charge densities are critical for the analysis of influence, the author should simulate the structures again with a proper meshpoint setting, check whether the simulation is correct, and explain the results.
2. Typos should be corrected. For example, it should be “HfO2” instead of “Hf02”. There are still many typos, such as in Table I, and the caption of Figure 8. The authors should carefully check the manuscript thoroughly.
3. There is no Figure 4, please rephrase the figure caption.

Author Response

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Reviewer 2 Report

Comments and Suggestions for Authors

I thank the authors for doing a great job of better describing the origins of the noise. However, the main part of my comment: "The obtained noise characteristics are not explained; only some connection with the electric field strength and traps is mentioned. However, it is not clearly justified;", remained unaddressed.

 

 

Author Response

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Round 3

Reviewer 2 Report

Comments and Suggestions for Authors

A theoretical justification or an experimental verification of the modelling results should be added.