Short-Term Memory Dynamics of TiN/Ti/TiO2/SiOx/Si Resistive Random Access Memory

In this study, we investigated the synaptic functions of TiN/Ti/TiO2/SiOx/Si resistive random access memory for a neuromorphic computing system that can act as a substitute for the von-Neumann computing architecture. To process the data efficiently, it is necessary to coordinate the information that needs to be processed with short-term memory. In neural networks, short-term memory can play the role of retaining the response on temporary spikes for information filtering. In this study, the proposed complementary metal-oxide-semiconductor (CMOS)-compatible synaptic device mimics the potentiation and depression with varying pulse conditions similar to biological synapses in the nervous system. Short-term memory dynamics are demonstrated through pulse modulation at a set pulse voltage of −3.5 V and pulse width of 10 ms and paired-pulsed facilitation. Moreover, spike-timing-dependent plasticity with the change in synaptic weight is performed by the time difference between the pre- and postsynaptic neurons. The SiOx layer as a tunnel barrier on a Si substrate provides highly nonlinear current-voltage (I–V) characteristics in a low-resistance state, which is suitable for high-density synapse arrays. The results herein presented confirm the viability of implementing a CMOS-compatible neuromorphic chip.


Introduction
Von-Neumann computing systems, in which a central processing unit reads data in memory and processes information, constitute the dominant architecture of modern general-purpose computers. The disadvantage of this architecture is that it leads to a bottleneck between the memory and the central processing unit when managing large amounts of data. Lags in data processing can present challenges in applications such as in artificial intelligence (AI) and the Internet of Things (IoT), where massive data are required to be processed in the short term. Hence, the development of novel efficient computing systems is essential for handling massive data [1,2]. A novel data processing system that mimics the human brain was reported in various research studies. Currently, research is underway on how to utilize such a system to solve problems in a similar way to the human brain [3,4]. A brain composed of 10 11 neurons and 10 15 synapses can swiftly perform high-dimensional functions such as learning and judgment while consuming only about 20 W per hour. This consumption is much smaller than that of a conventional computing system, which consumes approximately 56 kW per hour [5][6][7][8].
A neuromorphic system can emulate biological synapses on a hardware level, with the aim of a low power consumption, fault tolerance, and high efficiency processing [9][10][11]. By structuring integrated circuits in the form of artificial neural networks, it is possible to process data for each neural network. Likewise, by reducing data movement between memory and central processing units and enabling local data management, processing is more efficient and bottlenecks can be minimized. Similar to the neurobiological architecture in the human brain, neuromorphic systems have artificial neurons acting as computing elements and synapses acting as memory elements. Resistive random access memory      Nonfilamentary switching has the advantage of the operating current decreasing as the area of the device decreases [44]. Therefore, even in the TiN/Ti/TiO 2 /SiO x /Si device, a lower current could flow at a smaller cell size. The HRS changes to an LRS while sweeping the negative bias without the compliance current. A resistive switching operation that is applied without compliance to a device has the advantage of reducing circuit components that limit current. By applying a positive bias, the reset process prompts the device from the LRS to the HRS. The TiN/Ti/TiO 2 /SiO x /Si device in the LRS shows a rectifying property-the current is suppressed in the negative region compared to that of the positive region. The rectifying property can enlarge the array size in the cross-point structure by reducing the sneak current paths. The cycle-to-cycle variation of the LRS and HRS are presented in Figure S1. Nanomaterials 2020, 10, x FOR PEER REVIEW 6 of 13 4.76 MV/cm when a critical voltage of 1 V for FN tunneling is applied to the 2 nm thick SiOx layer. The critical electric field in the TiN/Ti/TiO2/SiOx/Si device system is slightly smaller than the values (6 to 8 MV/cm) reported in previous study [55]. This is because some defects are induced in the SiOx layer in an LRS.        Next, we demonstrate multilevel states of the TiN/Ti/TiO 2 /SiO x /Si device under the DC sweep mode. Multilevel conductance modulation is crucial in implementing neuromorphic systems, e.g., by adjusting the weight at the synapse. Figure 2b shows the I-V characteristics by a repeated sweep. By increasing the set stop voltage from −2.5 to −4 V, the conductance increases by approximately 76 times and 34 times for forward and backward sweeps, respectively (Figure 2c). For reset operation, a sweep up to Nanomaterials 2020, 10, 1821 4 of 13 3 V is repeated seven times. As a result, a gradual reduction in conductance was observed ( Figure 2d). Here, the conductance values are extracted at −1 and 1 V for the set and reset processes, respectively.
Next, we present the change in conductance in the TiN/Ti/TiO 2 /SiO x /Si device by an illustration that includes a simple oxygen vacancy configuration. The gradual conductance modulation in the TiO 2 -based RRAM system can be explained by the nonfilamentary switching model [39,40,[45][46][47]. Resistive switching in the interface-type model occurs by barrier modulation at the interface between the electrode and insulator rather than by the rapid conductance change caused by the formation and rupture of local filaments [39,40,[45][46][47]. Strong oxygen vacancies can be created at the interface between Ti and TiO 2 because Ti is highly reactive to oxygen [45,46]. The oxygen vacancy region (defect region) became wider when a negative bias was applied to the top electrode (TiN/Ti), indicating that the insulating region (TiO 2 layer, defect-less region) is reduced and then the conductance is increased for an LRS ( Figure 3a). Conversely, the defect-free region is reduced when a positive bias is applied to the top electrode (TiN/Ti) for a HRS (Figure 3b).     Voltage Next, we studied synaptic properties by pulse responses for the TiN/Ti/TiO 2 /SiO x /Si device. The amount of change in conductance (dynamic range) and linear weight update in a synaptic device are crucial factors for the implementation of hardware-based neuromorphic systems. Figure 4a shows the potentiation and depression curves at a fixed pulse voltage (−4 and 3.5 V for set and reset, respectively) while varying the pulse width from 100 µs to 100 ms. A read voltage of 0.5 V was used to convert conductance from the measured current after each set or reset pulse for 50 responses. A larger conductance change was observed for a larger pulse width. The change was more significant at the beginning of the pulse. The larger the pulse width, the longer the stimulus time applied to the device, thereby increasing the synaptic dynamic range. Figure 4b,c show the potentiation and depression contour mapping plots for the rate of change in conductance depending on the pulse voltage and width. This helps to understand the tendency of pulse conditions and find the optimized stimuli for biological synaptic applications. The conductance change rate is defined as (G final − G initial )/G initial . The conductance was extracted at a DC voltage of 0.5 V before and after the programming stimulus. The conductance varied by up to approximately 50 and 3.1 times for potentiation and depression, respectively. The rate of change in depression turned out to be relatively smaller than the rate of potentiation. This is because the reference value, that is, the denominator value, is the maximum conductance value that has undergone 50 potentiation procedures. The rate of conductance change is proportional to the stimulus intensity (pulse voltage) and the stimulus time (pulse width), as shown in Figure 4b,c. This can be associated with a phenomenon in which, if a human brain receives a stimulus having a large impact or a long stimulus, the memory can be retained for a relatively longer time than when exposed to a weak stimulus. The linear weight update is important for neuromorphic system applications, such as pattern recognition and voice recognition [48]. All potentiation and depression curves are presented as contour maps ( Figure S2). Based on these potentiation data with four pulse width variations, the normalized conductance change was rearranged to compare nonlinearity (Figure 4d), which can be defined by the following equation [49], where the nonlinearity of an ideal case is 0: where G device is the measured normalized conductance value of the TiN/Ti/TiO 2 /SiO x /Si device and G ideal is the linear updated conductance value.
Nanomaterials 2020, 10, x FOR PEER REVIEW 7 of 13   When a pulse width of 10 ms was applied to the device, the nonlinearity was 135.73%, which is its minimum value. Conversely, the nonlinearity reached 194.24%, its maximum value, when a pulse width of 100 ms was applied. Figure 4e shows the nonlinearity and dynamic range as functions of the pulse width. Note that the linearity degraded in spite of the fact that the dynamic range increased with the pulse width. Note also that the linearity improved with a decrease in the pulse width. This is because the change in the conductance was larger at the initial response when a longer pulse width was applied to the device.
Another key biological synaptic function is STM. Short-term plasticity (STP) generated from the response of external momentary stimuli has a role in retaining the temporary information for filtering. To determine the feasibility of STP, we proceeded as follows: the current was varied through multiple pulse inputs at different frequencies; the current decay in terms of duration time and PPF were investigated, as shown in Figure 5. To increase the current for potentiation, an amplitude of −3.5 V, pulse widths of 10 ms, and a short time interval between pulses of 11 ms were applied (Figure 5a). By contrast, the current decayed slowly when an amplitude of −3.5 V, pulse widths of 10 ms, and a long time interval of 800 ms were applied (Figure 5b). This suggests that the proposed synaptic device can quickly and continuously store and process the input information. However, the information that comes into the stimulus with low frequency cannot retain the information. To determine how the stimulus applied at such an early stage could be retained and extinguished, the pulse interval-dependent current decay was measured, as shown in Figure 5c. A pulse amplitude of −4 V and a pulse width of 10 ms were applied, and the time interval between pulses was offset at 100 ms, from 100 to 500 ms. When five paired pulses were applied to the device with a similar initial conductance state and no stimulus, the shorter the interval, the greater the increase in conductance and the smaller the decay. This is because the device can retain more information in memory by providing additional stimulation before filtering the information. This suggests that the synapse temporarily strengthens the synaptic transmission when a neurotransmitter is introduced via a spike in the synapse. To quantify the enhancement, the current difference as a function of the paired-pulse interval condition was plotted, as shown in Figure 5d. Here, the PPF is defined as follows: where I 1st and I 2nd are the currents of the first and second pulses, respectively, as shown in the inset of Figure 5d. When a stimulus is not offered for more than 1000 ms, as in the case of this PPF experiment, equilibrium is achieved; however, if the same stimulus is offered immediately after the initial stimulus, the synaptic transmission is enhanced.  The adjacent neurons and synapse transmit signals using neurotransmitters electrically and chemically in which the synapse serves as a chemical exchange site for delivery from presynaptic neurons to postsynaptic neurons. STDP is a phenomenon in which the synaptic weight varies according to the temporal relationship between the stimulation of presynaptic and postsynaptic neurons. The connection of synapses can be either strong or weak depending on the timing of action potential firing between pre-and postsynaptic neurons. Figure 6a,b show a pulse train scheme that allows for the differentiation of voltage amplitude on every occasion. Prespike was fired before the postspike for potentiation (Figure 6a), and then later for depression (Figure 6b). The synaptic weight of the TiN/Ti/TiO 2 /SiO x /Si device was measured before and after applying two electric pulses (width: 10 ms), as shown in Figure 6c. The time difference between two spikes varied from −100 to +100 ms at intervals of 20 ms. When the prespike preceded the postspike, (∆t (pre-post) > 0), the effective pulse amplitude increased for potentiation and then the synaptic weight was increased. As the time delay increased, the effective amplitude of the voltage decreased, which confirms that the amount of weight change was reduced. Conversely, when the postspike precedes the prespike, (∆t _(pre-post) < 0), the depression phenomenon occurred. The STDP behavior in our device (Figure 6c) was similar to the asymmetric Hebbian learning rule phenomenon, which is one of the ideal STDP functions used in computational models [50].  Finally, we surveyed the TiOx-based RRAM devices that were previously reported in Table 1 [39,40,[56][57][58][59][60][61]. TiO2 dielectrics as RRAM devices were prepared by various methods such as radio frequency (RF) sputtering, DC sputtering, atomic layer deposition (ALD), epitaxy, and spin coating. Both the filamentary and interface types, as two of the typical RRAM switching, were observed. For the filamentary type, the LRS current hardly changes depending on the active area of the device [57]. Conversely, in the case of the interface type, it is commonly observed that the LRS current decreases as the area of the device decreases [40,56]. Additionally, there are more and more reports on neuromorphic applications using the advantage of multiconductance of interface type switching [39,56].  Next, we investigated the nonlinear I-V characteristics of the TiN/Ti/TiO 2 /SiO x /Si device for a high-density synaptic device array. Figure 7a shows the I-V curve in an LRS. Selectivity is defined as the ratio between the current at the read voltage (V read ) and the current at half of V read . The selectivities at V read of 1 and −1 V were 136.1 and 62.9, respectively. The high nonlinearity of the I-V curve in LRS can minimize the sneak current in the cross-point array. The sneak current can dominantly flow through the adjacent cells with a low resistance (especially the cells in the LRS). The half-bias read-margin scheme was applied to the cross-point array structure in Figure 7b-0.5V read and zero voltage at the cells in region 1 and the cells in region 2 were applied, respectively, while V read was applied to the target cell. The highly nonlinear behavior of the TiN/Ti/TiO 2 /SiO x /Si device indicates that the read current at 0.5 V read in the LRS can be suppressed. The read margin as a function of the number of word lines (N) is calculated using the following expression: where R pu is the pull-up resistance that is connected to the equivalent circuit for the cells in the cross-point array [51]. The read margin decreases with the array size because the sneak current path increases. The number of word lines was greater than 100 to secure a read margin of 10 when the V read was −1 and −2 V (Figure 7c). The plausible mechanism of nonlinear I-V characteristics could be explained by direct tunneling and Fowler-Nordheim (FN) tunneling [52] at a low voltage and high voltage, respectively. FN tunneling is expressed as follows: where q is the electronic charge, E is the electric field, h is the Planck constant, m* is the effective electron mass, and ∅ B is the energy barrier that is overcome by the electron.  Finally, we surveyed the TiOx-based RRAM devices that were previously reported in Table 1 [39,40,[56][57][58][59][60][61]. TiO2 dielectrics as RRAM devices were prepared by various methods such as radio frequency (RF) sputtering, DC sputtering, atomic layer deposition (ALD), epitaxy, and spin coating. Both the filamentary and interface types, as two of the typical RRAM switching, were observed. For the filamentary type, the LRS current hardly changes depending on the active area of the device [57]. Conversely, in the case of the interface type, it is commonly observed that the LRS current decreases as the area of the device decreases [40,56]. Additionally, there are more and more reports on neuromorphic applications using the advantage of multiconductance of interface type switching [39,56]. The SiO x layer with a higher band gap on the Si substrate acts as a tunnel barrier role. A voltage-dependent carrier injection results in highly nonlinear characteristics. Direct tunneling allows a very low current given that the carriers pass through the intact SiO x thickness (Figure 7d). By contrast, a triangular barrier at a high voltage has the effect of reducing the effective tunneling thickness for the carriers (Figure 7e). The I-V curves of high-voltage regions (1~2 V and −1~−2 V) in an LRS are well fitted with the ln(I/V 2 ) versus the 1/V plot. This confirms the underlying FN tunneling mechanism of the TiN/Ti/TiO 2 /SiO x /Si device (Figure 7f). In FN tunnel fitting, the I-V curves in the LRS fit well from approximately 1 V (fitting accuracy, R-square, is more than 99%). The initial voltage at FN tunnel fitting (1 V) is defined as the critical voltage. Considering the dielectric constants of two dielectric materials (TiO 2 :~80 and SiO 2 :~4) [53,54], most of the voltage could be applied to the SiO x layer according to Gauss's law. Therefore, it can be assumed that the critical electric field is approximately 4.76 MV/cm when a critical voltage of 1 V for FN tunneling is applied to the 2 nm thick SiO x layer. The critical electric field in the TiN/Ti/TiO 2 /SiO x /Si device system is slightly smaller than the values (6 to 8 MV/cm) reported in previous study [55]. This is because some defects are induced in the SiO x layer in an LRS.
Finally, we surveyed the TiO x -based RRAM devices that were previously reported in Table 1 [39,40,[56][57][58][59][60][61]. TiO 2 dielectrics as RRAM devices were prepared by various methods such as radio frequency (RF) sputtering, DC sputtering, atomic layer deposition (ALD), epitaxy, and spin coating. Both the filamentary and interface types, as two of the typical RRAM switching, were observed. For the filamentary type, the LRS current hardly changes depending on the active area of the device [57]. Conversely, in the case of the interface type, it is commonly observed that the LRS current decreases as the area of the device decreases [40,56]. Additionally, there are more and more reports on neuromorphic applications using the advantage of multiconductance of interface type switching [39,56].

Conclusions
In summary, the set and reset processes in TiN/Ti/TiO 2 /SiO x /Si synaptic devices occur gradually, making it suitable for the imitation of biological synapses and STP functions. The synaptic plasticity of the proposed device was well controlled under various input pulse amplitudes and widths. The larger these two parameters, the greater the amount of conductance change, which means that a stimulus having a larger impact or an impact for a long time can control the persistence of the memory state. Short-term plasticity, such as PPF, is controllable using different time intervals. In addition, the synaptic weight with firing time difference is controlled through the proposed pulse schematic for STDP. Finally, highly nonlinear I-V curves in an LRS originating from the SiO x tunnel barrier are beneficial for high-density synapse arrays. The proposed synaptic device shows potential to become a basic building block in hardware neuromorphic systems by obtaining multiple conductance modulations.