Adaptive Linear Neural Network Approach for Three-Phase Four-Wire Active Power Filtering under Non-Ideal Grid and Unbalanced Load Scenarios

This paper presents the enhancements performed on the adaptive linear neuron (ADALINE) technique so that it can be applied for active power filtering purposes in a three-phase four-wire system. In the context of active power filtering, the ADALINE technique which was initially developed for a single-phase two-wire system has been further expanded to suit three-phase three-wire system. For both systems, ADALINE techniques have been reported to be effective even when the grid voltage is distorted and/or unbalanced. However, further works that study the possibility to apply ADALINE technique in a three-phase four-wire system which invariably carries unbalanced loads, are rather limited. Hence, in this work, a control algorithm (named as enhanced-ADALINE) which combines the strength of highly selective filter (HSF), ADALINE concept and averaging function is proposed, to manage harmonics mitigation by shunt active power filter (SAPF) under non-ideal grid and unbalanced load scenarios. MATLAB-Simulink software is utilized to conduct an exhaustive simulation study which includes circuit connection of SAPF in a three-phase four-wire system, design of control algorithms, and performance assessments. Benchmarking with the existing algorithm is performed to examine the benefits of using the proposed algorithm. From the analysis, simulation findings are presented and thoroughly discussed to verify design concept, capability, and relevance of the proposed algorithm.


Introduction
Shunt active power filter (SAPF) is a well-recognized power electronics tool applied for mitigating harmonic currents sourced by non-linear harmonic producing loads. Its purpose is to recover sinusoidal shape and balanced property of source currents by injecting equal amount of harmonic currents in opposite phase (referred here as injection currents) to the existing harmonic currents retained in the power system. In modern days, installation of SAPF has been made compulsory due to increasing penetration of power electronics devices into power systems where they have significantly contaminated the power system with harmonic currents. SAPFs are revealed to be flexible and adaptive a better view on achievements of the proposed algorithm. A concluding section is presented as Section 5 to summarize important findings and contributions of this work.

Circuit Connection of Shunt Active Power Filter in a Three-Phase Four-Wire System and Associated Control Algorithms
Conceptual functionality of SAPF in a three-phase four-wire system is presented in this section. To perform a mitigation operation in a three-phase four-wire system, two types of topologies can be considered for SAPF: three-phase three-leg with two dc-link capacitors split at neutral-point [23,25] and three-phase four-leg topologies [26]. In this work, a standard three-phase three-leg topology is adopted, and the circuit connection is illustrated in Figure 1. The three-phase output of the SAPF is connected to the operating power system at point of common coupling (PCC) and its neutral-point is connected to the neutral-wire N of the power system. Typically, there will be an output filter interfacing between the SAPF and power system. The output filter which is commonly an inductor can potentially reduce switching ripples produced by the SAPF, allowing the desired injection current i inj to be accurately injected into any harmonic-contaminated power system for mitigation purposes. Additionally, in a three-phase four-wire system, due to unbalanced loads, there is a high possibility that excessive neutral current i N may be retained in the returning neutral-wire N. This problem can be rectified via the additional wire which links the middle-point of the two split capacitors to the neutral-wire N of the power system. Note that, when SAPF performs its intended mitigation function, it will at the same time draw a small amount of current (commonly referred as dc-link charging current i dc ) from the power system to regulate its switching losses. From another point of view, the charging current is drawn to maintain a constant dc-link voltage so that a steady output voltage can be produced at the ac side of the SAPF. As for the load configuration, in a three-phase four-wire system, the connected load can be a balanced three-phase load and balanced/unbalanced group of three single-phase loads. Ideally, a proper function SAPF should be able to remove harmonic and excessive neutral currents from the power system, and as a result, the source current i S which is initially non-sinusoidal will recover its sinusoidal appearance, operate with fundamental frequency and in-phase with the source voltage v S , while the neutral current i N will be ideally zero.
Nevertheless, controlling a SAPF to perform mitigation function in a three-phase four-wire system is no easy task. In this work, its controller (as illustrated in Figure 1) needs to perform few inter-related functions which include extraction of fundamental component of load current i L , tracking instantaneous phase (sine function) of source voltage v S , estimation of I dc (magnitude of i dc ), estimation of I balance (magnitude of balancing current), derivation of reference current i S, re f , and lastly generation of gate switching pulses. It is worth noting that a typical SAPF will operate according to the characteristics of reference current signal i S, re f . A good functioning SAPF is the one with the ability to produce the desired injection current i inj and concurrently maintain its dc-link capacitor voltage at constant level and voltage balance across each capacitor voltage (if more than one capacitor is employed). Hence, as an overall, the reference current signal i S, re f will need to contain complete details on the power system's harmonics for harmonic cancellation, the power system's operating phases for synchronized operation, amount of dc-link charging current for regulation of dc-link voltage, and amount of balancing current for voltage balancing of split capacitors. This paper will solely discuss the process to generate reference current signal in which the ADALINE concept is applied. Particulars of the control process are provided in Section 3. Nevertheless, for a SAPF to work, other algorithms are also required to be implemented in its controller as illustrated in Figure 1. In this regard, to maintain voltage balance of split capacitor and constant overall dc-link voltage, a simple proportional-integral (PI) technique [23,27] is adopted. Meanwhile, to convert the reference current signal into gate switching pulses, a standard hysteresis band current control (HBC) technique is adopted [23,28]. Both PI and HBC are adopted because they are the most straightforward control techniques available to perform the aforementioned functions [3].

Design Concept and Operation of Enhanced-ADALINE Algorithm
The particulars of the proposed enhanced-ADALINE algorithm will be covered in this section. As mentioned in Section 1, the proposed algorithm is formed by modifying the existing ADALINE algorithm applied for a three-phase three-wire system, and is enhanced by the addition of HSF and averaging function. Figure 2 provides a block diagram showing the control process of a generalized ADALINE module. According to ADALINE concept, a modified W-H weight updating technique is applied to continuously update two weight factors W (W 1_sin for sine and W 1_cos for cosine) of the fundamental component. The overall updating process performed by the W-H weight updating technique is as follows:

Working Principle of ADALINE Module
where W = W 1_sin W 1_cos represents the weight factor, Y = sin(ωt) cos(ωt) represents the fundamental sine and cosine components, e c = i L − i L f und_est is the error that resulted between the measured load current i L and estimated i L f und_est signals, and γ is the learning rate.
Appl. Sci. 2019, 9, x FOR PEER REVIEW 6 of 25 The particulars of the proposed enhanced-ADALINE algorithm will be covered in this section. As mentioned in Section 1, the proposed algorithm is formed by modifying the existing ADALINE algorithm applied for a three-phase three-wire system, and is enhanced by the addition of HSF and averaging function. Figure 2 provides a block diagram showing the control process of a generalized ADALINE module. According to ADALINE concept, a modified W-H weight updating technique is applied to continuously update two weight factors ( 1_ for sine and 1_ for cosine) of the fundamental component. The overall updating process performed by the W-H weight updating technique is as follows:  Figure 2. Control structure of a generalized adaptive linear neuron (ADALINE) module [11,19].

Working Principle of ADALINE Module
In each updating loop, is first computed to update the weight factors which will be applied in the subsequent loops. At the same time, _ will be updated approaching the characteristic of which reduces the resulted error . After a few iterations, the estimated _ will form according to the fundamental component of . However, updating only two weight factors for the fundamental component cannot completely remove the resulted error because also contains harmonic components. Hence, to minimize this problem, suitable learning rate in the range of zero to one (0 < < 1) is added. Anyhow, the best value reported for fundamental current estimation is 0.0006 [16,19]. Note that a fully updated _ will have the following expression.
Once _ is fully updated, the weight factors ( 1_ and 1_ ) will be applied to compute the magnitude of the fundamental component _ according to the following approach. Figure 2. Control structure of a generalized adaptive linear neuron (ADALINE) module [11,19].
In each updating loop, e c is first computed to update the weight factors which will be applied in the subsequent loops. At the same time, i L f und_est will be updated approaching the characteristic of i L which reduces the resulted error e c . After a few iterations, the estimated i L f und_est will form according to the fundamental component of i L . However, updating only two weight factors for the fundamental component cannot completely remove the resulted error e c because i L also contains harmonic components. Hence, to minimize this problem, suitable learning rate γ in the range of zero to one (0 < γ < 1) is added. Anyhow, the best γ value reported for fundamental current estimation is 0.0006 [16,19]. Note that a fully updated i L f und_est will have the following expression.
Once i L f und_est is fully updated, the weight factors (W 1_sin and W 1_cos ) will be applied to compute the magnitude of the fundamental component I L f und_mag according to the following approach. HSF concept [18] so that it can track the operating phase of the source voltage v S and then transform it into a synchronization signal sin(ωt + θ).

Working Principle of HSF Synchronizer Module
Appl. Sci. 2019, 9, x FOR PEER REVIEW 7 of 25 Figure 3 provides a block diagram showing the control structure of an HSF synchronizer module. As the name indicates, the synchronizer module is developed by expanding the function of the existing HSF concept [18] so that it can track the operating phase of the source voltage and then transform it into a synchronization signal ( + ).  The generation of synchronization signal is performed in two operating domains (three-phase abc and two-phase αβ domains) involving the use of Clarke's transformation. In two-phase αβ domain, fundamental component of source voltage is extracted, and then in three-phase abc domain, the extracted fundamental component is transformed into synchronization signal. First, by using Clarke transform matrix, the measured source voltage in three-phase domain is transformed into two-phase αβ domain according to the following expression.

Working Principle of HSF Synchronizer Module
In two-phase αβ domain, due to harmonic distortion, the following relation holds for the transformed source voltage signal : where , is the fundamental and ,ℎ is harmonic components in α domain, and meanwhile , and ,ℎ represent the same relationship in β domain. At this stage, an HSF [18] is applied to remove the harmonic components ( ,ℎ and ,ℎ ) so as to deliver the fundamental component ( , and , ) to the subsequent processing stage. The overall operation of an HSF can be explained using the following expressions: where is a constant gain parameter and is the cutoff frequency. Analyses regarded to the selectivity of HSF have been reported in the literature [18,21], where it is revealed that the selectivity of HSF improves with smaller value of . In addition, = 20 and = 50 Hz are also found to be The generation of synchronization signal is performed in two operating domains (three-phase abc and two-phase αβ domains) involving the use of Clarke's transformation. In two-phase αβ domain, fundamental component of source voltage v S is extracted, and then in three-phase abc domain, the extracted fundamental component is transformed into synchronization signal. First, by using Clarke transform matrix, the measured source voltage v S in three-phase domain is transformed into two-phase αβ domain according to the following expression.
In two-phase αβ domain, due to harmonic distortion, the following relation holds for the transformed source voltage signal v αβ : where v α, f und is the fundamental and v α, har is harmonic components in α domain, and meanwhile v β, f und and v β, har represent the same relationship in β domain. At this stage, an HSF [18] is applied to remove the harmonic components (v α, har and v β, har ) so as to deliver the fundamental component (v α, f und and v β, f und ) to the subsequent processing stage. The overall operation of an HSF can be explained using the following expressions: where K is a constant gain parameter and f c is the cutoff frequency. Analyses regarded to the selectivity of HSF have been reported in the literature [18,21], where it is revealed that the selectivity of HSF improves with smaller value of K. In addition, K = 20 and f c = 50 Hz are also found to be the most suitable parameter settings for HSF [18,22]. Hence, in this work, similar settings for HSF are applied. Subsequently, from the fundamental component obtained, inverse Clarke transform matrix as in Equation (8) is applied to revert the fundamental component in two-phase αβ domain (v α, f und and v β, f und ) back to its equivalent representation in three-phase abc domain v Sabc, f und . Finally, by using Equation (9), the resulting v Sabc, f und is converted into its unity form which serves as the synchronization signal sin(ωt + θ).
3.3. Integration of ADALINE, HSF, and Averaging Function for Generating Reference Current Figure 4 provides a block diagram showing the particulars of the enhanced-ADALINE algorithm. As clearly illustrated, the ADALINE and HSF synchronizer modules as presented in Sections 3.1 and 3.2, respectively, are important constituents of the proposed algorithm. In the enhanced-ADALINE algorithm, three ADALINE modules are applied (one for each phase) to extract the magnitude of fundamental load current component from each phase of the three-phase system. From the extracted magnitude for each phase, the mean value is taken so that equal magnitude can be distributed to each phase to ensure balanced operation of the three-phase system. Note that this is important especially when unbalanced load is connected to the system as the load current will be unbalanced in terms of magnitude.
In addition, to further enhance ability of the proposed algorithm, an averaging function is added to filter out higher frequency elements (ripples) from the extracted magnitude. In a highly harmonic-distorted environment, the extracted fundamental magnitude is most likely to contain a high number of ripples which would require an additional filter to minimize them. In this aspect, the added averaging function will perform according to the following expression: where I La f und_mag , I Lb f und_mag , and I Lc f und_mag represent the magnitude of fundamental component extracted from each phase, I L f und_mag(average) is the resulting average value, and T is the period of the processed signals. At this stage, the proposed algorithm is said to be ready for generating reference current signal. For generating reference current signal, the proposed algorithm needs to work closely with all the other algorithms in the control system. As described in Section 2, I dc and I balance are needed to regulate all dc-side voltages. In this regard, I dc is estimated by using a PI controller (PI 1 ) which minimizes the voltage difference e v1 between reference dc-link voltage V dc, re f and the total instantaneous dc-link voltage (V dc1 + V dc2 ). Similarly, another PI controller (PI 2 ) is applied to estimate I balance by minimizing the voltage difference e v2 between the two split dc-link capacitors. In a mathematical manner, the dc-side voltages control approaches can be expressed as where k p1 , k i1 , k p2 , and k i2 are the constant values that respectively symbolize proportional k p and integral k i gains for PI 1 (first PI) and PI 2 (second PI) controllers. The gain values are set to be 0.3, 2, 0.02, and 0.1, respectively [22]. Finally, by utilizing all the available signals, the reference current signal i S,re f can be generated according to i S,re f = I L f und_mag(average) + I dc sin(ωt + θ) where sin(ωt + θ) is the synchronization signals (unity sine function) delivered by the HSF synchronizer module.
Finally, by utilizing all the available signals, the reference current signal , can be generated according to where ( + ) is the synchronization signals (unity sine function) delivered by the HSF synchronizer module.

Results and Discussion
In this work, MATLAB-Simulink platform (R2012a) was applied to perform an exhaustive simulation study. By using basic SimPowerSystems blocks, a simulation model which consists of circuit connection of SAPF in three-phase four-wire system and the control algorithms applied was developed as in Figure 5. For the SAPF topology, a standard two-level three-leg inverter with two split capacitors of 3300 μF (each) sharing a common neutral-point was adopted. A simple 5 mHtyped output filter was interfacing between the SAPF and PCC to minimize switching ripples. Meanwhile, the dc-link reference voltage was set at a total value of 880 V (440 V each). For load setting, two types of non-linear loads were considered, and the particulars are summarized in Table  1. As presented, Load A was developed by connecting three single-phase rectifier loads and a threephase rectifier load in parallel to the power system. Meanwhile, Load B contained only three singlephase rectifier loads with a common neutral. A line inductor with the value of 1 mH was interfacing between the load and power system. Note that the unbalanced load scenarios were created by connecting different setting of single-phase rectifier load to each operating phase.

Results and Discussion
In this work, MATLAB-Simulink platform (R2012a) was applied to perform an exhaustive simulation study. By using basic SimPowerSystems blocks, a simulation model which consists of circuit connection of SAPF in three-phase four-wire system and the control algorithms applied was developed as in Figure 5. For the SAPF topology, a standard two-level three-leg inverter with two split capacitors of 3300 µF (each) sharing a common neutral-point was adopted. A simple 5 mH L-typed output filter was interfacing between the SAPF and PCC to minimize switching ripples. Meanwhile, the dc-link reference voltage was set at a total value of 880 V (440 V each). For load setting, two types of non-linear loads were considered, and the particulars are summarized in Table 1. As presented, Load A was developed by connecting three single-phase rectifier loads and a three-phase rectifier load in parallel to the power system. Meanwhile, Load B contained only three single-phase rectifier loads with a common neutral. A line inductor with the value of 1 mH was interfacing between the load and power system. Note that the unbalanced load scenarios were created by connecting different setting of single-phase rectifier load to each operating phase.

Load Configuration Details
Load A: Three single-phase loads with a common neutral connected in parallel with a three-phase load (refer Figure 5a) Phase a Uncontrolled single-phase rectifier feeding: 80 The performance of the proposed algorithm was assessed by observing the total harmonic distortion (THD) value achieved by the SAPF. According to IEEE standard 519 [29], the maximum allowable THD limit for current is 5%. In other words, harmonics mitigation by SAPF is considered to be effective only if the resulting THD value of the mitigated source current is 5% and below. The assessment is performed in comparative manner, where the performance demonstrated by the SAPF when it is controlled by the proposed algorithm is benchmarked with the performance demonstrated by the SAPF when it is controlled by the existing STF-dq0 algorithm [22]. In this regard, the STF-dq0 algorithm was developed and tested under similar test scenarios. Steady-state simulation studies were conducted, considering three non-ideal source voltage scenarios.
Scenario I: balanced and distorted source voltage. Scenario II: unbalanced and sinusoidal source voltage. Scenario III: unbalanced and distorted source voltage. Figure 6 clearly shows the magnitude and waveform of the applied source voltages. Note that the source voltage applied in Scenario I contains harmonic distortion of THD = 20.80% (similar for each phase), whereas the source voltage applied in Scenario III contains harmonic distortion of THD = 16.80% for phase a, THD = 15.74% for phase b, and THD = 6.99% for phase c.

Scenario I: Balanced and Distorted Source Voltage
In Scenario I, the applied source voltage is balanced in terms of magnitude and contains an equal amount of harmonic distortion across each operating phase (refer to Figure 6a). The simulation findings obtained from this category of testing are presented in Figures 7-11. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 2. First, referring to Figure 7, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Note that only the mean value is presented. The mean value is obtained by first adding the magnitude of fundamental load current in each operating phase, and then divides the total summation by three. As illustrated in Figure 4, the mean value is the key component needed for generating reference current, thus must be accurate. From Figure 7, without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 1 A for Load A and 0.8 A for Load B). Meanwhile, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result.
Next, from Figures 8 and 10, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonics generated by Loads A and B under Scenario I. For both unbalanced load conditions, the highly distorted source currents which are mitigated by both algorithms have recovered the desired sinusoidal wave-shape with THD values (refer to Table 2) below the 5% harmonic limit. Nevertheless, as indicated in Table 2

Scenario I: Balanced and Distorted Source Voltage
In Scenario I, the applied source voltage is balanced in terms of magnitude and contains an equal amount of harmonic distortion across each operating phase (refer to Figure 6a). The simulation findings obtained from this category of testing are presented in Figures 7-11. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 2. First, referring to Figure 7, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Note that only the mean value is presented. The mean value is obtained by first adding the magnitude of fundamental load current in each operating phase, and then divides the total summation by three. As illustrated in Figure 4, the mean value is the key component needed for generating reference current, thus must be accurate. From Figure 7, without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 1 A for Load A and 0.8 A for Load B). Meanwhile, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result.
Next, from Figures 8 and 10, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonics generated by Loads A and B under Scenario I. For both unbalanced load conditions, the highly distorted source currents which are mitigated by both algorithms have recovered the desired sinusoidal wave-shape with THD values (refer to Table 2) below the 5% harmonic limit. Nevertheless, as indicated in Table 2, the THD values demonstrated by the enhanced-ADALINE algorithm (1.01-2.59%) are lower than that demonstrated by the STF-dq0 algorithm (1.50-3.41%). Moreover, it is also clear from the findings that the high neutral currents that resulted from unbalanced connection of single-phase loads (both Loads A and B) were minimized. In other words, both enhanced-ADALINE and STF-dq0 algorithms are effective in removing excessive neutral currents. currents that resulted from unbalanced connection of single-phase loads (both Loads A and B) were minimized. In other words, both enhanced-ADALINE and STF-dq0 algorithms are effective in removing excessive neutral currents  Furthermore, for both unbalanced load conditions, the large phase differences between the source voltage and current were also reduced by both algorithms. This directly indicates that both algorithms are able to synchronize operation of the SAPF with the connected power system under Scenario I. Nevertheless, the enhanced-ADALINE algorithm demonstrated a better synchronization performance by providing a lower phase difference value. As a result, in-phase operation of the source current and voltage can be achieved, and this provides a near to unity power factor (PF) of 0.999. Therefore, as an overall, the enhanced-ADALINE algorithm provides a better mitigation performance in comparison to the STF-dq0 algorithm.  Furthermore, for both unbalanced load conditions, the large phase differences between the source voltage and current were also reduced by both algorithms. This directly indicates that both algorithms are able to synchronize operation of the SAPF with the connected power system under Scenario I. Nevertheless, the enhanced-ADALINE algorithm demonstrated a better synchronization performance by providing a lower phase difference value. As a result, in-phase operation of the source current and voltage can be achieved, and this provides a near to unity power factor (PF) of 0.999. Therefore, as an overall, the enhanced-ADALINE algorithm provides a better mitigation performance in comparison to the STF-dq0 algorithm.          In the context of SAPF, other than its mitigation performance, it is also crucial to make sure that its dc-link voltage is correctly regulated. Figures 9 and 11 provide the related results. From both figures, SAPF controlled by the enhanced-ADALINE algorithm is able to continuously maintain its dc-link voltage V dc at the desired voltage level (880 V). Similarly, the individual voltage across each split capacitor V dc1 and V dc2 , are equally maintained at the desired voltage level (440 V), i.e., half the value of the total dc-link voltage. Similar findings can be observed for Loads A and B. Hence, from all the results presented in this category, it can be confirmed that the enhanced-ADALINE algorithm is able to correctly manage operation of SAPF under Scenario I.

Scenario II: Unbalanced and Sinusoidal Source Voltage
In Scenario II, the applied source voltage exhibits a sinusoidal wave-shape, but its magnitude differs across each operating phase (refer to Figure 6b). The simulation findings obtained from this category of testing are presented in Figures 12-16. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 3. First, referring to Figure 12, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Similarly, without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 0.9 A for Load A and 0.5 A for Load B). However, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result.
Appl. Sci. 2019, 9, x FOR PEER REVIEW 16 of 25 In the context of SAPF, other than its mitigation performance, it is also crucial to make sure that its dc-link voltage is correctly regulated. Figures 9 and 11 provide the related results. From both figures, SAPF controlled by the enhanced-ADALINE algorithm is able to continuously maintain its dc-link voltage at the desired voltage level (880 V). Similarly, the individual voltage across each split capacitor 1 and 2 , are equally maintained at the desired voltage level (440 V), i.e., half the value of the total dc-link voltage. Similar findings can be observed for Loads A and B. Hence, from all the results presented in this category, it can be confirmed that the enhanced-ADALINE algorithm is able to correctly manage operation of SAPF under Scenario I.

Scenario II: Unbalanced and Sinusoidal Source Voltage
In Scenario II, the applied source voltage exhibits a sinusoidal wave-shape, but its magnitude differs across each operating phase (refer to Figure 6b). The simulation findings obtained from this category of testing are presented in Figures 12-16. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 3. First, referring to Figure 12, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Similarly, without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 0.9 A for Load A and 0.5 A for Load B). However, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result. Next, from Figures 13 and 15, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonics generated by Loads A and B under Scenario II. For both unbalanced load conditions, the highly distorted source currents which are mitigated by both algorithms recovered the desired sinusoidal wave-shape with THD values (refer to Table 3) maintained within the 5% harmonic limit. Specifically, in terms of the recorded THD values, for Load A, the THD values demonstrated by the enhanced-ADALINE algorithm are lower than that demonstrated by the STF-dq0 algorithm. However, for Load B, the lower THD value of the enhanced-ADALINE algorithm is recorded only for phase b. Although the Next, from Figures 13 and 15, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonics generated by Loads A and B under Scenario II. For both unbalanced load conditions, the highly distorted source currents which are mitigated by both algorithms recovered the desired sinusoidal wave-shape with THD values (refer to Table 3) maintained within the 5% harmonic limit. Specifically, in terms of the recorded THD values, for Load A, the THD values demonstrated by the enhanced-ADALINE algorithm are lower than that demonstrated by the STF-dq0 algorithm. However, for Load B, the lower THD value of the enhanced-ADALINE algorithm is recorded only for phase b. Although the recorded THD values for phases a and c are higher, the difference is actually not significant. Nevertheless, as an overall, the THD values recorded for the enhanced-ADALINE algorithm is of smaller value range, i.e., 0.88-2.63% while the THD values recorded for the STF-dq0 algorithm is of larger value range, i.e., 1.19-2.83%. Moreover, it is also clear from the findings that the high neutral currents that resulted from unbalanced connection of single-phase loads (both Loads A and B) were minimized. In other words, once again, both enhanced-ADALINE and STF-dq0 algorithms are shown to be effective in removing excessive neutral currents.
Furthermore, as tabulated in Table 3, for Loads A and B, the large phase differences between the source voltage and current were reduced by both algorithms. Hence, it indicates that both algorithms are able to synchronize operation of the SAPF with the connected power system under Scenario II. Nevertheless, the enhanced-ADALINE algorithm demonstrated a better synchronization performance by providing a lower phase difference value. As a result, in-phase operation of the source current and voltage is once again achieved, and this provides a near to unity power factor (PF) of 0.999. Therefore, as an overall, the enhanced-ADALINE algorithm is able to provide a better mitigation performance in comparison to STF-dq0 algorithm under Scenario II.
Similarly, the ability of SAPF to regulate its dc-link voltage is also assessed under Scenario II. Figures 14 and 16 provide the related results. From both figures, SAPF controlled by the enhanced-ADALINE algorithm is able to continuously maintain its dc-link voltage V dc at the desired voltage level (880 V). Similarly, the individual voltage across each split capacitor V dc1 and V dc2 , is equally maintained at the desired voltage level (440 V), i.e., half the value of the total dc-link voltage. The findings are valid for both Loads A and B. Hence, from all the results presented in this category, it can be confirmed that the enhanced-ADALINE algorithm is able to correctly manage operation of SAPF under Scenario II.

Scenario III: Unbalanced and Distorted Source Voltage
In Scenario III, the applied source voltage is unbalanced in terms of magnitude and contains different levels of harmonic distortion across each operating phase (refer to Figure 6c). The simulation findings obtained from this category of testing are presented in Figures 17-21. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 4. First, referring to Figure 17, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 1 A for Load A and 0.5 A for Load B). However, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result.

Scenario III: Unbalanced and Distorted Source Voltage
In Scenario III, the applied source voltage is unbalanced in terms of magnitude and contains different levels of harmonic distortion across each operating phase (refer to Figure 6c). The simulation findings obtained from this category of testing are presented in Figures 17-21. Meanwhile, to better observe the demonstrated performance, important findings are tabulated in a comparative manner, as in Table 4. First, referring to Figure 17, the enhanced-ADALINE algorithm is revealed to effectively extract the magnitude (mean value) of fundamental load current. Without integrating the averaging function, a significant peak-to-peak oscillation (ripples) can be observed at the extracted mean value (approximately 1 A for Load A and 0.5 A for Load B). However, by integrating the averaging function, the extracted mean value does not exhibit any significant ripples, which indicates a more accurate result. Next, from Figures 18 and 20, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonic currents generated by Loads A and B under Scenario III. For both Loads A and B, the highly distorted source currents, which are mitigated by both algorithms, recovered the desired sinusoidal wave-shape and the resulting THD values comply with the 5% harmonic limit, as tabulated in Table 4. Nevertheless, the THD values demonstrated by the enhanced-ADALINE algorithm (0.98-2.13%) are lower than that demonstrated by the STF-dq0 algorithm (1.66-2.92%). Moreover, it is also clear from the findings that the high neutral currents that resulted from unbalanced connection of single-phase loads (both Loads A and B) were minimized, once again showing effectiveness of both algorithms in removing excessive neutral currents.
Furthermore, as presented in Table 4, for Loads A and B, the large phase differences between the source voltage and current were reduced by both algorithms, which indicates that they are able to synchronize operation of the SAPF with the connected power system under Scenario III. Nevertheless, the enhanced-ADALINE algorithm demonstrated a better synchronization performance by providing a lower phase difference value. In this manner, in-phase operation of the source current and voltage is once again achieved, and this provides a near to unity power factor Next, from Figures 18 and 20, the findings revealed that both enhanced-ADALINE and STF-dq0 algorithms are effective in directing their respective SAPF in mitigating the harmonic currents generated by Loads A and B under Scenario III. For both Loads A and B, the highly distorted source currents, which are mitigated by both algorithms, recovered the desired sinusoidal wave-shape and the resulting THD values comply with the 5% harmonic limit, as tabulated in Table 4. Nevertheless, the THD values demonstrated by the enhanced-ADALINE algorithm (0.98-2.13%) are lower than that demonstrated by the STF-dq0 algorithm (1.66-2.92%). Moreover, it is also clear from the findings that the high neutral currents that resulted from unbalanced connection of single-phase loads (both Loads A and B) were minimized, once again showing effectiveness of both algorithms in removing excessive neutral currents.
Furthermore, as presented in Table 4, for Loads A and B, the large phase differences between the source voltage and current were reduced by both algorithms, which indicates that they are able to synchronize operation of the SAPF with the connected power system under Scenario III. Nevertheless, the enhanced-ADALINE algorithm demonstrated a better synchronization performance by providing a lower phase difference value. In this manner, in-phase operation of the source current and voltage is once again achieved, and this provides a near to unity power factor (PF) of 0.999. As an overall, the enhanced-ADALINE algorithm is able to provide a better mitigation performance in comparison to the STF-dq0 algorithm under Scenario III.
Similarly, the ability of SAPF to regulate its dc-link voltage is also assessed under Scenario III. Figures 19 and 21 provide the related results. From both figures, once again, it is clear that SAPF controlled by the enhanced-ADALINE algorithm is able to continuously maintain its dc-link voltage V dc at the desired voltage level (880 V). Meanwhile, the individual voltage across each split capacitor V dc1 and V dc2 , are equally maintained at the desired voltage level (440 V), i.e., half the value of the total dc-link voltage. Similar findings can be observed for both Loads A and B. Hence, from all the results presented in this category, it can be confirmed that the enhanced-ADALINE algorithm is able to correctly manage operation of SAPF under Scenario III. To conclude the findings, first, in terms of the accuracy of the extracted mean value, the findings revealed that a more accurate result can be obtained by integrating the averaging function in the enhanced-ADALINE algorithm. Owing to severe distortion at the source side and unbalanced issue of the connected load, the ADALINE module alone is not sufficient to provide a ripple-free mean value, as clearly illustrated in Figure 7, Figure 12, and Figure 17. However, a ripple-free mean value of fundamental load current is highly crucial to improve accuracy of the generated reference current. Hence, in this work, an additional averaging function was integrated to remove any unwanted ripples and at the same time it improves the accuracy of the mean value. Second, in terms of harmonics mitigation performance, the findings revealed that SAPF controlled by the enhanced-ADALINE algorithm performs better in all the three scenarios as compared to the SAPF controlled by the STF-dq0 algorithm. This is supported by the smaller THD values recorded in Tables 2-4. Hence, the enhanced-ADALINE algorithm can potentially serve as an alternative to manage operation of SAPF in a three-phase four-wire system rather than just depending on the typical SRF and PQ theory techniques. Third, in the context of dc-link voltage regulation and voltage balancing, the findings revealed that the utilization of the enhanced-ADALINE algorithm does not degrade the ability of SAPF in regulating its overall dc-link and maintain its voltage balance. In other words, the enhanced-ADALINE algorithm can be integrated properly with the two PI techniques applied respectively for regulating the dc-link voltage and ensuring voltage balance of the two split dc-link capacitors. Therefore, in this work, it can be confirmed that the enhanced-ADALINE algorithm is able to correctly manage operation of SAPF in a three-phase four-wire system even if the connected grid is non-ideal and loads are unbalanced. Appl. Sci. 2019, 9,

Conclusions
In this paper, a control algorithm to manage SAPF's operation in a three-phase four-wire system by generating reference current signal was successfully demonstrated. The newly proposed algorithm was named as enhanced-ADALINE, where it was formed by merging three single-phase ADALINE modules, and was further enhanced by integrating an HSF synchronizer module and averaging function. Simulation tests and analyses were thoroughly performed to evaluate the performance of enhanced-ADALINE under the conditions where the grid was non-ideal (three non-ideal scenarios were considered) and the load was unbalanced (two unbalanced loads were considered). The performance demonstrated by the enhanced-ADALINE algorithm was compared to the existing STF-dq0 algorithm to gauge its capability. According to the presented findings, the enhanced-ADALINE algorithm was revealed to perform effectively despite distortion and/or unbalanced source voltage, and unbalanced connected loads. More importantly, the enhanced-ADALINE algorithm revealed to be more reliable than the existing STF-dq0 algorithm where it was able to provide a lower THD performance (0.88-2.63%) and a more synchronized operation (indicated by a lower phase difference between source voltage and current, i.e., in the range of 0.10 • -1.20 • ). As a result, almost unity power factor was achieved. Last but not least, the enhanced-ADALINE algorithm also revealed to be effective in removing excessive neutral current, and this feature is mandatory for the harmonics extraction algorithm applied in a three-phase four-wire system. For the next research step, a laboratory prototype will be developed to validate the performance of the enhanced-ADALINE algorithm in a practical environment.