Smart Fault-Tolerant Control System Based on Chaos Theory and Extension Theory for Locating Faults in a Three-Level T-Type Inverter

Abstract: This study proposes a smart fault-tolerant control system based on the theory of Lorenz chaotic system and extension theory for locating faults and executing tolerant control in a three-level T-type inverter. First, the system constantly monitors the fault states of the 12 power transistor switches of the three-level T-type inverter; if a power transistor fails, the corresponding output phase voltage waveform is converted by a Lorenz chaotic system. Chaos eye coordinates are then extracted from a scatter diagram of chaotic dynamic states and considered as fault characteristics. The system then executes fault diagnosis based on extension theory. The fault characteristic value is used as the input signal for correlation analysis; thus, the faulty power transistor can be located and the fault diagnosis can be achieved for the inverter. The fault-tolerant control system can maintain the three-phase balanced output of the three-level T-type inverter, thereby improving the reliability of the motor drive system. The feasibility of the proposed smart fault-tolerant control system was assessed by conducting simulations in this study, and the results verified its feasibility. Accordingly, after the occurrence of the fault in power switches, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced by using the integration of the proposed fault diagnosis system and fault-tolerant control system for a three-level T-type Inverter.


Introduction
Recent advances in renewable energy and electric vehicle technology have prompted the development of multilevel inverters [1][2][3][4][5]. Compared with that of a two-level inverter, the switch of a multilevel inverter is subjected to lower voltage stress and is associated with a lower output voltage change rate (dv/dt). Accordingly, multilevel inverters are suitable for applications requiring high power consumption. Such applications require a relatively high number of power transistors, thus increasing the difficulty of fault detection in inverters. The traditional fault diagnosis procedure for inverters entails the use of information (numeric or waveform) directly measured by instruments. The information is examined by on-site personnel, who subsequently conduct fault diagnosis for the inverters, repair the inverters, and replace components on the basis of their experience. However, this traditional fault diagnosis procedure is prone to erroneous fault point detections, causing unnecessary waste of labor and time for component repair and replacement [6][7][8]. To improve the reliability of equipment using motor drive systems, researchers have invested considerable effort in exploring fault detection mechanisms [9][10][11][12][13][14][15][16][17][18][19] and fault-tolerant control strategies [20][21][22][23] for multilevel inverters in order to enable early fault detection when inverter power semiconductor components fail; this can thus maintain the inverter operation and minimize damage. for fault detection. Extension theory is applied to locate a faulty power transistor. Subsequently, an external backup power transistor (leg) and 3 three-pole ac semiconductor switches (triode AC, TRAIC) are used for fault-tolerant control to maintain the three-phase balanced line voltage output, thereby maintaining the normal voltage amplitude if any power semiconductor switch of the inverter fails. Figure 1 illustrates the overall architecture of the proposed fault-diagnosis and fault-tolerant control system. feature values for fault detection. Extension theory is applied to locate a faulty power transistor. Subsequently, an external backup power transistor (leg) and 3 three-pole ac semiconductor switches (triode AC, TRAIC) are used for fault-tolerant control to maintain the three-phase balanced line voltage output, thereby maintaining the normal voltage amplitude if any power semiconductor switch of the inverter fails. Figure 1 illustrates the overall architecture of the proposed fault-diagnosis and fault-tolerant control system. This paper is organized as follows. In Section 2, the concepts of Chaos and Extension theory are described in detail, and how to use them for fault diagnosis of a three-level T-type inverter is explained. Then, the simulation is made in Section 3 to demonstrate the effectiveness of the proposed fault diagnosis method based on Chaos and Extension theory. Final, in Section 4, the fault-tolerant control in the event of any power switch failure in the three-level T-type inverter is analyzed, and then the simulation is used to prove its feasibility.

Fault Characteristics of Three-Level Inverter
To explore inverter fault diagnosis, this study considered a three-level T-type inverter, as shown in Figure 2. The faults of such an inverter can be divided into three types: Short-circuit fault, opencircuit fault, and an erroneous trigger signal. A short-circuit fault occurs when switching elements break down, due to excessive voltages across the switch. Moreover, an open-circuit fault occurs when switches cannot be activated, due to the lack of trigger signals for the power transistor. Finally, an erroneous trigger signal occurs when switching elements receive incorrect trigger signals.  This paper is organized as follows. In Section 2, the concepts of Chaos and Extension theory are described in detail, and how to use them for fault diagnosis of a three-level T-type inverter is explained. Then, the simulation is made in Section 3 to demonstrate the effectiveness of the proposed fault diagnosis method based on Chaos and Extension theory. Final, in Section 4, the fault-tolerant control in the event of any power switch failure in the three-level T-type inverter is analyzed, and then the simulation is used to prove its feasibility.

Fault Characteristics of Three-Level Inverter
To explore inverter fault diagnosis, this study considered a three-level T-type inverter, as shown in Figure 2. The faults of such an inverter can be divided into three types: Short-circuit fault, open-circuit fault, and an erroneous trigger signal. A short-circuit fault occurs when switching elements break down, due to excessive voltages across the switch. Moreover, an open-circuit fault occurs when switches cannot be activated, due to the lack of trigger signals for the power transistor. Finally, an erroneous trigger signal occurs when switching elements receive incorrect trigger signals.
To explore inverter fault diagnosis, this study considered a three-level T-type inverter, as shown in Figure 2. The faults of such an inverter can be divided into three types: Short-circuit fault, opencircuit fault, and an erroneous trigger signal. A short-circuit fault occurs when switching elements break down, due to excessive voltages across the switch. Moreover, an open-circuit fault occurs when switches cannot be activated, due to the lack of trigger signals for the power transistor. Finally, an erroneous trigger signal occurs when switching elements receive incorrect trigger signals.  This study established a simulation environment for the three-level T-type inverter by using PSIM software and monitored the failure of the inverter switches constantly. Consider, for example, an output voltage frequency of 60 Hz. The simulated waveform for a normally operating inverter should exhibit a three-phase balanced structure, and the output voltage waveform of each phase is presented in Figure 3. The voltage waveforms of the three phases have the same shape and size, and the phase difference between them is 120 • , which is an inherent characteristic of a three-phase balanced structure. This balanced structure would be distorted in the event of inverter switch failure. For example, if the inverter switch S a1 + fails, the waveform of the a-phase output voltage (v ao ) is distorted (Figure 4).
Similarly, if the inverter switch S b2 − or S c1 + fails, the waveforms of the phase voltage v bo and v co would substantially differ from those observed under normal inverter switch operation. According to these observations, the output voltage waveform would be distorted when a fault occurs in an inverter. This study established a simulation environment for the three-level T-type inverter by using PSIM software and monitored the failure of the inverter switches constantly. Consider, for example, an output voltage frequency of 60 Hz. The simulated waveform for a normally operating inverter should exhibit a three-phase balanced structure, and the output voltage waveform of each phase is presented in Figure 3. The voltage waveforms of the three phases have the same shape and size, and the phase difference between them is 120°, which is an inherent characteristic of a three-phase balanced structure. This balanced structure would be distorted in the event of inverter switch failure. For example, if the inverter switch Sa1 + fails, the waveform of the a-phase output voltage (vao) is distorted (Figure 4). Similarly, if the inverter switch Sb2 − or Sc1 + fails, the waveforms of the phase voltage vbo and vco would substantially differ from those observed under normal inverter switch operation. According to these observations, the output voltage waveform would be distorted when a fault occurs in an inverter.

Theory of the Lorenz Chaotic System
A Lorenz chaotic system is considered in the proposed system [25], which is presented in Equation (1). This study established a simulation environment for the three-level T-type inverter by using PSIM software and monitored the failure of the inverter switches constantly. Consider, for example, an output voltage frequency of 60 Hz. The simulated waveform for a normally operating inverter should exhibit a three-phase balanced structure, and the output voltage waveform of each phase is presented in Figure 3. The voltage waveforms of the three phases have the same shape and size, and the phase difference between them is 120°, which is an inherent characteristic of a three-phase balanced structure. This balanced structure would be distorted in the event of inverter switch failure. For example, if the inverter switch Sa1 + fails, the waveform of the a-phase output voltage (vao) is distorted ( Figure 4). Similarly, if the inverter switch Sb2 − or Sc1 + fails, the waveforms of the phase voltage vbo and vco would substantially differ from those observed under normal inverter switch operation. According to these observations, the output voltage waveform would be distorted when a fault occurs in an inverter.

Theory of the Lorenz Chaotic System
A Lorenz chaotic system is considered in the proposed system [25], which is presented in Equation (1).

Theory of the Lorenz Chaotic System
A Lorenz chaotic system is considered in the proposed system [25], which is presented in Equation (1).
where x represents the initial value of the system and can be used as the input value to be tested. α, β, and γ represent adjustment coefficients. The three-phase voltage waveforms shown in Figures 3 and 4 are measured with voltage sensors. At the same time, the sampling time is 5 us and 10,000 data have been obtained within 0.05 s and then input into the Lorenz chaotic system in Equation (1). The adjustment coefficients α, β, and γ in Equation (1) are set to 10, 28, and 8/3, respectively. Through the aforementioned Lorenz chaotic system, .
x 3 can be obtained. In the proposed system, .
x 1 and .
x 2 are used to generate a chaotic states scatter diagram, as illustrated in Figure 5, with the two centroid points in the scatter diagram serving as chaos eyes. The coordinates of the chaos eyes can serve as feature values for inverter fault diagnosis. x  , 2 x  , and 3 x  can be obtained. In the proposed system, 1 x  and 2 x  are used to generate a chaotic states scatter diagram, as illustrated in Figure 5, with the two centroid points in the scatter diagram serving as chaos eyes. The coordinates of the chaos eyes can serve as feature values for inverter fault diagnosis. For the conditions described in Figures 3 and 4, the corresponding waveforms can be converted through the Lorenz chaotic system to yield the chaotic scatter states diagrams displayed in Figures 6  and 7, respectively. The chaos eye coordinates in Figure 6a  in the resulting chaotic states scatter diagrams can be considered as the fault characteristic values. However, because of the failure of other transistors, chaos eye coordinates of vao observed before the occurrence of a fault might differ from those observed after the occurrence of the fault. The chaos eye coordinates are not fixed values; instead, they are distributed in a range. Therefore, the extension method is used for fault diagnosis to locate a fault in transistor switches.

Inverter Fault Diagnosis Based on Extension Theory
In 1983, the Chinese scholar Wen Cai proposed extension theory. The concept is to investigate the extension and contradictions of a matter from qualitative and quantitative perspectives. Matter element theory and extension mathematics constitute the two core components of extension theory. Matter element theory primarily describes the extension and transformation characteristics of matter elements, whereas extension mathematics comprises the core concepts of extension set and correlation function for calculation [26]. Extension theory expresses the information of matter through the matter element model and illustrates the relationship between matter quality and quantity through matter element transformation. Subsequently, the effects of quality and quantity on the matter are investigated using the correlation function to demonstrate the degree of influence of matter characteristics.

Concept of Extension Matter
In extension theory, a matter-element R contains three fundamental elements: matter name (N), matter characteristic (C), and values of matter characteristic (V). The model can be mathematically represented as follows: where R is the basic element describing the matter (i.e., the matter element); N, C, and V are three elements that constitute the matter element. N represents the name of the matter, C represents the characteristic of the matter, and V represents the characteristic value of the matter. In extension matter element theory, if the matter element characteristic is not a single item, it is represented by x characteristics and x corresponding characteristic values. Accordingly, the characteristic can be expressed in vector form as C = [c1, c2, …, cx], and the corresponding characteristic value can be expressed as V = [v1, v2, …, vx]. Therefore, Equation (2) can be rewritten as follows.

Inverter Fault Diagnosis Based on Extension Theory
In 1983, the Chinese scholar Wen Cai proposed extension theory. The concept is to investigate the extension and contradictions of a matter from qualitative and quantitative perspectives. Matter element theory and extension mathematics constitute the two core components of extension theory. Matter element theory primarily describes the extension and transformation characteristics of matter elements, whereas extension mathematics comprises the core concepts of extension set and correlation function for calculation [26]. Extension theory expresses the information of matter through the matter element model and illustrates the relationship between matter quality and quantity through matter element transformation. Subsequently, the effects of quality and quantity on the matter are investigated using the correlation function to demonstrate the degree of influence of matter characteristics.

Concept of Extension Matter
In extension theory, a matter-element R contains three fundamental elements: matter name (N), matter characteristic (C), and values of matter characteristic (V). The model can be mathematically represented as follows: where R is the basic element describing the matter (i.e., the matter element); N, C, and V are three elements that constitute the matter element. N represents the name of the matter, C represents the characteristic of the matter, and V represents the characteristic value of the matter. In extension matter element theory, if the matter element characteristic is not a single item, it is represented by x characteristics and x corresponding characteristic values. Accordingly, the characteristic can be expressed in vector form as C = [c 1 , c 2 , . . . , c x ], and the corresponding characteristic value can be expressed as . Therefore, Equation (2) can be rewritten as follows.
If the characteristic value is in a certain interval, the interval is defined as a classical domain and is included in a neighborhood domain. Assume the following intervals: F 0 = <a, b>, F = <d, e>, and F 0 ∈ F; point f is any point in the interval F. Therefore, the matter element corresponding to F 0 = <a, b> can be expressed as follows: where C i is the characteristic of F 0 , and V i is the characteristic value of C i (i.e., its classical domain). The matter element R F corresponding to F is presented in Equation (5), where C j is the characteristic value of F and V j is the characteristic value of C j (i.e., its neighborhood domain).

Distance and Position Value
Classical mathematics explores the distance relationship between points, and extension theory describes the relationship between a point and an interval in the real domain, as expressed in the following equation: In addition to considering the relationship between a point and an interval, the relationship between a point and two intervals or between intervals should be considered. Therefore, if F 0 = <v a , v b > and F = <v d , v e > are assumed to constitute two intervals in the real domain, and F 0 is in F, the position values of point f, F 0 , and F can be expressed as follows:

Correlation Function
The correlation function, derived by dividing the distance by the position value, can be expressed as follows: If f = (v a + v b )/2, the correlation function has a maximum value and is called an elementary correlation function (Figure 8). In addition, if The fault diagnosis steps involved in the extension method are described as follows.
Step 1. For each transistor failure, the chaos eye coordinates C1 and C2 on the chaos scatter diagram are used to establish the matter element model.  ) , 1,2, ,12 , Step 2. The chaos eye coordinates of the faulty transistor to be determined, namely C1 and C2, are input into the model, and the resulting matter element model can be expressed as follows: Step 3. The characteristics (C1 and C2) and their corresponding weights W1 and W2 (representing the relative importance of the characteristics) are determined. Here, W1 = W2 = 0.5.
Step 4. The degree of correlation between the fault categories of characteristics to be tested is calculated.
Step 5. The largest correlation value of each fault category derived from the calculation represents the fault category to which a fault characteristic belongs. Therefore, the faulty transistor can be determined according to the category.

Simulation Results
To identify faulty power transistors, fault states were divided into nine categories in this study: Failure of Sa1 + ; Sa2 − ; Sb1 + ; Sb2 − ; Sc1 + ; Sc2 − ; (Sa1 − or Sa2 + ); (Sb1 + or Sb2 + ); and (Sc1 + or Sc2 + ). The principles underlying the categorization are described as follows. When Sa1 − or Sa2 + is faulty, the current path and voltage waveform are considered to be the same; thus, Sa1 − and Sa2 + are categorized under the same category. The same principle applies to the categories Sb1 + or Sb2 + and Sc1 + or Sc2 + . Table 1 lists the fault categories.  The fault diagnosis steps involved in the extension method are described as follows.
Step 1. For each transistor failure, the chaos eye coordinates C 1 and C 2 on the chaos scatter diagram are used to establish the matter element model.
Step 2. The chaos eye coordinates of the faulty transistor to be determined, namely C 1 and C 2 , are input into the model, and the resulting matter element model can be expressed as follows: Step 3. The characteristics (C 1 and C 2 ) and their corresponding weights W 1 and W 2 (representing the relative importance of the characteristics) are determined. Here, W 1 = W 2 = 0.5. Step 4. The degree of correlation between the fault categories of characteristics to be tested is calculated.
Step 5. The largest correlation value of each fault category derived from the calculation represents the fault category to which a fault characteristic belongs. Therefore, the faulty transistor can be determined according to the category.

Simulation Results
To identify faulty power transistors, fault states were divided into nine categories in this study: Failure of S a1 + ; S a2 − ; S b1 + ; S b2 − ; S c1 + ; S c2 − ; (S a1 − or S a2 + ); (S b1 + or S b2 + ); and (S c1 + or S c2 + ). The principles underlying the categorization are described as follows. When S a1 − or S a2 + is faulty, the current path and voltage waveform are considered to be the same; thus, S a1 − and S a2 + are categorized under the same category. The same principle applies to the categories S b1 + or S b2 + and S c1 + or S c2 + . Table 1 lists the fault categories.  Table 2 presents the feature values of the chaos eyes for each phase under the switch failure state at an operating frequency of 60 Hz. The data in Table 2 were used as inputs in the established fault diagnosis system to execute fault detection. Tables 3-5 present the fault detection results, indicating that all faults could be correctly detected by the system. Consider, for example, the category F 2 ( Table 2): The output weight determined for F 2 was the highest weight value (0.861617) ( Table 3); thus, the fault was correctly identified to belong to F 2 . To demonstrate the robustness of the proposed diagnostic system against interference, erroneous (±5%) test samples were considered at an operating frequency of 60 Hz, and the corresponding fault detection results are presented in Tables 6-8. The results indicated that after the consideration of errors, the proposed system could still correctly detect the fault category. Therefore, regardless of whether accurate or erroneous test data are used, the proposed system can correctly detect the fault category.

Fault-Tolerant Control of Three-Level T-Type Inverter
Most applications have particularly high requirements for equipment reliability. Accordingly, the reliability of inverter systems can be improved by equipping such systems with fault-tolerant control mechanisms that can enable them to maintain a stable output voltage. Figure 9 presents the architecture of the three-level T-type inverter proposed in this study. Compared with conventional three-level T-type inverters, the proposed inverter includes two additional insulated gate bipolar transistors and 3 three-pole ac semiconductor switches (Triode AC, TRIAC). The spare leg comprises the insulated gate bipolar transistors (IGBT) S x + and S x − , which can be used to replace those in the faulty phase to maintain circuit operation. The 3 three-pole ac semiconductor switches T a , T b , and T c connect the spare legs and a-, b-, and c-legs. When a fault occurs, the spare leg is connected with the faulty leg so that the spare leg can replace the function of the faulty leg, thus achieving fault tolerance.

Fault-Tolerant Control Analysis
The proposed fault-tolerant control system deactivates the a-phase half-bridge switches (Sa1 + and

Fault-Tolerant Control Analysis
The proposed fault-tolerant control system deactivates the a-phase half-bridge switches (S a1 switch T c of the three three-pole ac semiconductor switches are activated to replace the faulty c-phase leg with the spare leg. The spare leg adopts the switching mode of the original c-phase leg to maintain the three-phase balanced output voltage. Consider, for example, the occurrence of an open-circuit fault in S a1 + , S b2 − , and S c1 + ; the corresponding switching states induced by the fault-tolerant control system for the three-level inverter are shown in Figures 10-12, respectively. original a-phase leg to maintain the three-phase balanced output voltage. If an open-circuit fault occurs in Sb1 + or Sb2 − , the b-phase half-bridge switches (Sb1 + and Sb2 − ) are deactivated. The a-phase, cphase, and neutral-point switches still operate normally, and switch Tb in the three three-pole ac semiconductor switches are activated to replace the faulty b-phase leg with the spare leg. The spare leg adopts the switching mode of the original b-phase leg to maintain the three-phase balanced output voltage. Similarly, if an open-circuit fault occurs in Sc1 + or Sc2 − , the c-phase half-bridge switches (Sc1 + and Sc2 − ) are deactivated. The a-phase, b-phase, and neutral-point switches still operate normally, and switch Tc of the three three-pole ac semiconductor switches are activated to replace the faulty c-phase leg with the spare leg. The spare leg adopts the switching mode of the original c-phase leg to maintain the three-phase balanced output voltage. Consider, for example, the occurrence of an open-circuit fault in Sa1 + , Sb2 − , and Sc1 + ; the corresponding switching states induced by the fault-tolerant control system for the three-level inverter are shown in Figures 10-12, respectively.

Fault-Tolerant Control Simulation
This study conducted a simulation of fault-tolerant control by using PSIM software. In the simulation, an open-circuit fault was considered to occur in Sa1 + , Sb2 − , and Sc1 + . The simulation results

Fault-Tolerant Control Simulation
This study conducted a simulation of fault-tolerant control by using PSIM software. In the simulation, an open-circuit fault was considered to occur in Sa1 + , Sb2 − , and Sc1 + . The simulation results revealed changes in the output line voltage under three conditions, namely conditions of normal

Fault-Tolerant Control Simulation
This study conducted a simulation of fault-tolerant control by using PSIM software. In the simulation, an open-circuit fault was considered to occur in S a1 + , S b2 − , and S c1 + . The simulation results revealed changes in the output line voltage under three conditions, namely conditions of normal inverter operation, faulty switch operation, and fault-tolerant control execution. As shown in Figure 13, at 0.06 s, an open-circuit fault occurred in switch S a1 + and distorted the three-phase output line voltage.
The fault-tolerant control system was launched at 0.12 s. The a-phase half-bridge switches (S a1 + and S a2 − ) were deactivated, but the b-phase, c-phase, and neutral-point switches still operated normally.
Switch T a in the 3 three-pole ac semiconductor switches was activated to replace the faulty a-phase leg with the spare leg, and the spare leg adopted the switching mode of the original a-phase leg to maintain a balanced three-phase output voltage. As shown in Figure 13, after the execution of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Accordingly, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced. As presented in Figure 14, at 0.06 s, an open-circuit fault occurred in switch Sb2 − and distorted the three-phase output line voltage. The fault-tolerant control system was launched at 0.12 s. The bphase half-bridge switches (Sb1 + and Sb2 − ) were deactivated, but the a-phase, c-phase, and neutral-point switches still operated normally. Switch Tb of the 3 three-pole ac semiconductor switches was activated to replace the faulty b-phase leg with the spare leg, and the spare leg adopted the switching mode of the original b-phase leg to maintain a balanced three-phase output voltage. After the launching of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Hence, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced. As presented in Figure 14, at 0.06 s, an open-circuit fault occurred in switch S b2 − and distorted the three-phase output line voltage. The fault-tolerant control system was launched at 0.12 s. The b-phase half-bridge switches (S b1 + and S b2 − ) were deactivated, but the a-phase, c-phase, and neutral-point switches still operated normally. Switch T b of the 3 three-pole ac semiconductor switches was activated to replace the faulty b-phase leg with the spare leg, and the spare leg adopted the switching mode of the original b-phase leg to maintain a balanced three-phase output voltage. After the launching of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Hence, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced.
switches still operated normally. Switch Tb of the 3 three-pole ac semiconductor switches was activated to replace the faulty b-phase leg with the spare leg, and the spare leg adopted the switching mode of the original b-phase leg to maintain a balanced three-phase output voltage. After the launching of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Hence, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced.  As illustrated in Figure 15, at 0.06 s, an open-circuit fault occurred in switch S c1 + and distorted the three-phase output line voltage. The tolerant control system was launched at 0.12 s. The c-phase half-bridge switches (S c1 + and S c2 − ) were deactivated, but the a-phase, b-phase, and neutral-point switches still operated normally. Switch T c of the 3 three-pole ac semiconductor switches was activated to replace the faulty c-phase leg with the spare leg, and the spare leg adopted the switching mode of the original c-phase leg to maintain the balanced three-phase output voltage. After the launching of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Accordingly, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced. As illustrated in Figure 15, at 0.06 s, an open-circuit fault occurred in switch Sc1 + and distorted the three-phase output line voltage. The tolerant control system was launched at 0.12 s. The c-phase half-bridge switches (Sc1 + and Sc2 − ) were deactivated, but the a-phase, b-phase, and neutral-point switches still operated normally. Switch Tc of the 3 three-pole ac semiconductor switches was activated to replace the faulty c-phase leg with the spare leg, and the spare leg adopted the switching mode of the original c-phase leg to maintain the balanced three-phase output voltage. After the launching of the fault-tolerant control system, the three-phase output line voltage remained to be five levels. Accordingly, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced. As shown in Figure 13, at 0.06 s, an open-circuit fault occurred in switch Sa1 + and distorted the output line voltage vab and vca. The fault-tolerant control system was launched at 0.12 s. As shown in Figure 13, after the execution of the fault-tolerant control system, the three-phase output line voltage waveforms remained to be five levels. Accordingly, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not As shown in Figure 13, at 0.06 s, an open-circuit fault occurred in switch S a1 + and distorted the output line voltage v ab and v ca. The fault-tolerant control system was launched at 0.12 s. As shown in Figure 13, after the execution of the fault-tolerant control system, the three-phase output line voltage waveforms remained to be five levels. Accordingly, after the occurrence of the fault, the balanced three-phase output line voltage remained unchanged, and the quality of the output voltage was not reduced. The same results are obtained by using the proposed fault-tolerant control system for an open-circuit fault occurred in switch S b2 − and S c1 + . As shown in Figures 14 and 15, when the occurrence of the fault, by using the proposed fault-tolerant control system, the balanced three-phase output line voltage still remained unchanged, and the quality of the output voltage was not reduced. The fault-tolerant control system can replace the faulty leg of any switch with a spare leg. Thus, after the occurrence of a fault, the three-phase output voltage is unaffected and a loading reduction is not required. The operating mode of the fault-tolerant control system is simple. Therefore, if a fault occurs, apart from changing the switching state of the switches, it is not necessary to adjust the phase angle of the reference voltage signal in a pulse width modulation (PWM) mechanism to maintain a balanced three-phase system. The proposed fault-tolerant control system can prevent economic losses and even casualties caused by faults and can substantially increase system utilization rates and expand system applications. In order to make the process of the proposed fault-tolerant control clearer, use the flow chart, shown in Figure 16, to explain.

Conclusions
This study proposes a fault-tolerant diagnosis system based on chaos theory and extension theory for locating a faulty power transistor in a three-level T-type inverter. The proposed system not only obviates the necessity of learning but also has the capability of generating fault tolerance. Therefore, it can reduce the influence of interference signals. In addition, the proposed system can perform control procedures immediately after any inverter switch fails, thus providing continuous power supply to and improving the power supply reliability of the three-level T-type inverter. The test results showed that the proposed fault diagnosis method can detect open-circuit faults in 12 power transistor switches by using only low-cost voltage sensors, and the final accuracy rate is 100%,

Conclusions
This study proposes a fault-tolerant diagnosis system based on chaos theory and extension theory for locating a faulty power transistor in a three-level T-type inverter. The proposed system not only obviates the necessity of learning but also has the capability of generating fault tolerance. Therefore, it can reduce the influence of interference signals. In addition, the proposed system can perform control procedures immediately after any inverter switch fails, thus providing continuous power supply to and improving the power supply reliability of the three-level T-type inverter. The test results showed that the proposed fault diagnosis method can detect open-circuit faults in 12 power transistor switches by using only low-cost voltage sensors, and the final accuracy rate is 100%, demonstrating that the proposed fault diagnosis method has a good effect on three-level T-type inverters. The results also indicated that after the consideration of errors, the proposed fault diagnosis system could still correctly detect the fault category. Therefore, regardless of whether accurate or erroneous test data are used, the proposed system can correctly detect the fault category. After the failure of any switch, the proposed fault-tolerant control system can still control the output line voltage and maintain the three-phase balance; this thus verifies the feasibility of the proposed system. Therefore, the proposed fault-tolerant control system can prevent economic losses and even casualties caused by faults and can substantially increase system utilization rates and expand system applications.