Design of Synchronized Large-Scale Chaos Random Number Generators and Its Application to Secure Communication

: This paper is concerned with the design of synchronized large-scale chaos random number generators (CRNGs) and its application to secure communication. In order to increase the diversity of chaotic signals, we ﬁrstly introduce additional modulation parameters in the original chaotic Dufﬁng map system to modulate the amplitude and DC offset of the chaotic states. Then according to the butterﬂy effect, we implement modulated Dufﬁng map systems with different initial values by using the microcontroller and complete the design of large-scale CRNGs. Next, a discrete sliding mode scheme is proposed to solve the synchronization problem of the master-slave large-scale CRNGs. Finally, we integrate the aforementioned results to implement an innovative secure communication system.


Introduction
Chaotic system is a complex nonlinear system. In recent years, it has attracted extensive attention in the field of engineering research. The reason is that chaotic systems have very rich dynamic behavior, unpredictable trajectory, white noise-like broadband and the initial value sensitivity of the butterfly effect. The chaos dynamics in most mechanical engineering systems is undesirable and needs to be suppressed because it will affect the performance or damage the mechanical structure of systems. In 1990, O.G.Y (Ott, Grebogi and Yorke) [1] proposed the study of chaos control. Researchers pointed out that, when parameter values of chaotic systems are slightly modulated, the chaotic behavior will produce huge and unpredictable changes. Several feedback control methods to suppress chaos behavior have been proposed in the literature [2,3]. Although the chaos behavior might be undesired in most mechanical systems, the noise-like behavior of chaos is useful to the application of image encryption and secure communication [4][5][6][7][8]. Due to the practical application of chaos synchronization, since the pioneering research of Pecora and Carroll [9], chaos synchronization has become an interesting research field. Many control methods have been proposed to solve the synchronization problem for chaotic systems, such as H∞ control [10,11], fuzzy sliding mode control [12,13], adaptive control [14,15] and so forth. Among proposed control designs, sliding mode control method is often the first choice for researchers because it is not sensitive to system parameters and external disturbances and with good robustness.
In these two decades, chaotic systems have been widely applied in the areas of communication, medicine and biology to solve several important engineering problems, especially in the security field of communication. In the previous reports [4][5][6], the authors used the continuous chaotic systems with

Design of a Large-Scale CRNG
In this paper, we will discuss the design and realization of a large-scale CRNGs and its application to secure communication based on synchronized master-slave large-scale CRNGs. To design the large-scale CRNGs, in the following, we first introduce the modulation of the Duffing map chaotic system such that diversified random chaotic state responses can be obtained for large-scale CRNGs. The original Duffing map system is described by the following system.
where x 1 , x 2 (k) are the system states. In order to adjust the amplitude and DC offset for state responses, we define new state variables y i , i = 1, 2 satisfying where a i , i = 1, 2 are given to adjust the amplitude and the DC offset of state responses, respectively. From Equation (2), we have Appl. Sci. 2019, 9,185 3 of 13 By (1) and (3), a new modulated Duffing map chaotic system can be obtained as y 1 (k + 1) = λ 1 y 2 (k) + λ 2 y 2 (k + 1) = β 1 y 1 (k) + β 2 y 3 2 + β 3 y 2 2 + β 4 y 2 + β 5 (4) where For evaluating the modulation of the system amplitude and DC offset of random number generator, we give the following simulation analysis. In the simulation, the modulation parameters are given as a 1 = 2, a 2 = 4, d 1 = −5, d 2 = 5 and the initial conditions are selected as The simulation results are given in Figures 1-3.
For evaluating the modulation of the system amplitude and DC offset of random number generator, we give the following simulation analysis. In the simulation, the modulation parameters are given as 1 For evaluating the modulation of the system amplitude and DC offset of random number generator, we give the following simulation analysis. In the simulation, the modulation parameters are given as 1    According to the simulation results above, it reveals, as expected, the amplitude is modulated by 2 times and 4 times, while the DC offset is shifted by −5 and 5. Furthermore, we use the National Institute of Standards and Technology (NIST) 18 test suite to test the randomness of the modulated chaotic states. In the NIST test, first, we set the test parameters including the sequences length n = 2 × 10 7 bits, the number of subsequences, = 20. From discussed above, the random number generator can be implemented by using the modulated Duffing map chaotic system. It is well known that the state response of a chaotic system is very sensitive to initial values and very small differences can lead to very different chaotic state responses, namely the butterfly effect. Based on this feature, we can use the butterfly effect to design large-scale CRNGs. In addition, due to the high capacity and fast computing speed of the digital microcontroller, we can implement this large-scale CRNG with microcontroller and can get a large amount of random numbers in the very short time according to the computing speed of the According to the simulation results above, it reveals, as expected, the amplitude is modulated by 2 times and 4 times, while the DC offset is shifted by −5 and 5. Furthermore, we use the National Institute of Standards and Technology (NIST) [18] test suite to test the randomness of the modulated chaotic states. In the NIST test, first, we set the test parameters including the sequences length n = 2 × 10 7 bits, the number of subsequences, m = 20. Then, we take byte 5 (bits 32~39) of every modulated chaos states y1 and y2 in IEEE754 double-precision format [19] to test the randomness. Finally, all the test results are shown in Table 1. In Table 1, the outcome of the test values is called p value. When p value ≥ 0.01, then it passes the test. From Table 1, the generated numbers of y1 pass all tests and those of y2 pass 13 tests. Therefore, we can conclude that the modulated chaotic states are with good randomness. From discussed above, the random number generator can be implemented by using the modulated Duffing map chaotic system. It is well known that the state response of a chaotic system is very sensitive to initial values and very small differences can lead to very different chaotic state responses, namely the butterfly effect. Based on this feature, we can use the butterfly effect to design large-scale CRNGs. In addition, due to the high capacity and fast computing speed of the digital microcontroller, we can implement this large-scale CRNG with microcontroller and can get a large amount of random numbers in the very short time according to the computing speed of the microcontroller. To show the butterfly effect, we use three sets of random generators (Duffing map systems in (1)) for comparison. (x 1 , x 2 ) is the random number of the first random number generator, the second is (x 11 , x 12 ) and the third is (x 21 , x 22 ). The initial conditions are selected as (x 10 , x 20 ) = (0.9, −0.5), (x 110 , x 120 ) = (0.900001, −0.500012), (x 210 , x 220 ) = (0.9000011, −0.500001), respectively. From the simulation results in Figure 4, it can be found that the initial values with very small difference, as expected, will produce completely different random state responses.
microcontroller. To show the butterfly effect, we use three sets of random generators (Duffing map systems in (1)) for comparison.
, is the random number of the first random number generator, the second is , and the third is , . The initial conditions are selected as 10 20 ( , ) (0.9, 0.5), From the simulation results in Figure 4, it can be found that the initial values with very small difference, as expected, will produce completely different random state responses. Now we are ready to implement the large-scale CRNG. Its structure is designed as shown in Figure 5. We construct n Duffing maps with the same structure in the microcontroller. Each Duffing map has different initial values. According to the butterfly effect mentioned above, we can get 2n random numbers. It is worth mentioning that the microcontrollers have a large amount of program memory capacity and fast computing speed, which means that we can use the microcontroller to complete the large-scale CRNG in Figure 5 and obtain a large amount of random numbers in a very short period time. In the following, we continue to discuss the realization of the proposed large-scale CRNG in Figure 5. First, we construct ten sets (n = 10) of CRNGs by using the HT32F1765 microcontroller as shown in Figure 6. The HT32F1765 operates at a frequency up to 72MHz with a Flash accelerator to obtain maximum efficiency. It provides 128KB of embedded Flash memory for code/data storage and up to 64 KB of embedded SRAM memory for system operation and application program usage. Due to the butterfly effect in the chaotic system, each set of CRNGs has different initial values, so the Now we are ready to implement the large-scale CRNG. Its structure is designed as shown in Figure 5. We construct n Duffing maps with the same structure in the microcontroller. Each Duffing map has different initial values. According to the butterfly effect mentioned above, we can get 2n random numbers. It is worth mentioning that the microcontrollers have a large amount of program memory capacity and fast computing speed, which means that we can use the microcontroller to complete the large-scale CRNG in Figure 5 and obtain a large amount of random numbers in a very short period time.  (1)) for comparison. , is the random number of the first random number generator, the second is , and the third is , . The initial conditions are selected as 10 20 ( , ) (0.9, 0.5), From the simulation results in Figure 4, it can be found that the initial values with very small difference, as expected, will produce completely different random state responses. Now we are ready to implement the large-scale CRNG. Its structure is designed as shown in Figure 5. We construct n Duffing maps with the same structure in the microcontroller. Each Duffing map has different initial values. According to the butterfly effect mentioned above, we can get 2n random numbers. It is worth mentioning that the microcontrollers have a large amount of program memory capacity and fast computing speed, which means that we can use the microcontroller to complete the large-scale CRNG in Figure 5 and obtain a large amount of random numbers in a very short period time. In the following, we continue to discuss the realization of the proposed large-scale CRNG in Figure 5. First, we construct ten sets (n = 10) of CRNGs by using the HT32F1765 microcontroller as shown in Figure 6. The HT32F1765 operates at a frequency up to 72MHz with a Flash accelerator to obtain maximum efficiency. It provides 128KB of embedded Flash memory for code/data storage and up to 64 KB of embedded SRAM memory for system operation and application program usage. Due to the butterfly effect in the chaotic system, each set of CRNGs has different initial values, so the In the following, we continue to discuss the realization of the proposed large-scale CRNG in Figure 5. First, we construct ten sets (n = 10) of CRNGs by using the HT32F1765 microcontroller as shown in Figure 6. The HT32F1765 operates at a frequency up to 72MHz with a Flash accelerator to obtain maximum efficiency. It provides 128KB of embedded Flash memory for code/data storage and up to 64 KB of embedded SRAM memory for system operation and application program usage.
Due to the butterfly effect in the chaotic system, each set of CRNGs has different initial values, so the output responses of the CRNGs of each set will be completely different. When we set up 10 sets of CRNGs with different initial values, we can get 20 random numbers and then according to the IEEE 754 double-precision standard, each random floating-point value is represented with 64 bits. Therefore, we can get 1280 random binary bits (2 × 10 × 64). At the same time, if necessary, we can also build more chaotic systems in the HT32F1765 microcontroller to get more random bits. By using 8 × 8 LED matrix, Figure 7 shows 256 random binary signals obtained from the proposed large-scale CRNG. output responses of the CRNGs of each set will be completely different. When we set up 10 sets of CRNGs with different initial values, we can get 20 random numbers and then according to the IEEE 754 double-precision standard, each random floating-point value is represented with 64 bits. Therefore, we can get 1280 random binary bits (2 × 10 × 64). At the same time, if necessary, we can also build more chaotic systems in the HT32F1765 microcontroller to get more random bits. By using 8 × 8 LED matrix, Figure 7 shows 256 random binary signals obtained from the proposed large-scale CRNG.

Synchronization of Master-Slave Large-Scale CRNGs
The design of large-scale CRNGs has been completed. We continue to study the synchronization of master and slave large-scale CRNGs. As mentioned above, the large-scale CRNG is composed of n chaotic CRNGs with the same structure, so the synchronization controller for each chaotic CRNGs will also have the same structure. Therefore, we first consider the design of a single master-slave CRNG. The master and slave CRNGs are defined, respectively, as below.
Master random number generator: ( 1) ( ) Slave random number generator: where i x and , 1,2 i y i = are, respectively, the state variables of the master and slave systems.
is the control input introduced to achieve synchronization between the master and slave output responses of the CRNGs of each set will be completely different. When we set up 10 sets of CRNGs with different initial values, we can get 20 random numbers and then according to the IEEE 754 double-precision standard, each random floating-point value is represented with 64 bits. Therefore, we can get 1280 random binary bits (2 × 10 × 64). At the same time, if necessary, we can also build more chaotic systems in the HT32F1765 microcontroller to get more random bits. By using 8 × 8 LED matrix, Figure 7 shows 256 random binary signals obtained from the proposed large-scale CRNG.

Synchronization of Master-Slave Large-Scale CRNGs
The design of large-scale CRNGs has been completed. We continue to study the synchronization of master and slave large-scale CRNGs. As mentioned above, the large-scale CRNG is composed of n chaotic CRNGs with the same structure, so the synchronization controller for each chaotic CRNGs will also have the same structure. Therefore, we first consider the design of a single master-slave CRNG. The master and slave CRNGs are defined, respectively, as below.
Master random number generator: ( 1) ( ) Slave random number generator: where i x and , 1,2 i y i = are, respectively, the state variables of the master and slave systems.
is the control input introduced to achieve synchronization between the master and slave

Synchronization of Master-Slave Large-Scale CRNGs
The design of large-scale CRNGs has been completed. We continue to study the synchronization of master and slave large-scale CRNGs. As mentioned above, the large-scale CRNG is composed of n chaotic CRNGs with the same structure, so the synchronization controller for each chaotic CRNGs will also have the same structure. Therefore, we first consider the design of a single master-slave CRNG. The master and slave CRNGs are defined, respectively, as below.
Master random number generator: Slave random number generator: Appl. Sci. 2019, 9, 185 7 of 13 where x i and y i , i = 1, 2 are, respectively, the state variables of the master and slave systems. u(k) ∈ R is the control input introduced to achieve synchronization between the master and slave CRNGs. By defining e i (k) = y i (k) − x i (k), i = 1, 2, the error dynamics can be obtained by the following equation: In the following, the discrete sliding mode control (DSMC) is utilized to achieve the synchronization. Generally, the DSMC design is composed of two steps. First, we need to select an appropriate switching function for error dynamics (7) such that the sliding motion can ensure the convergence of the error states. Second, we need to propose a DSMC to guarantee the existence of the sliding mode and maintain the error dynamics on the sliding manifold [2]. To achieve the synchronization based on DSMC, a switching function is selected as: Assuming the error dynamics is already on the sliding manifold (s(k) = 0), we have Substituting (9) into (7), we can obtain From (10), we can see that if α is specified to satisfy |−αλ 1 | < 1, than e 1 converges to zero. Furthermore, since e 2 (k) = −αe 1 (k) in the sliding manifold, we obtain e 2 = 0 when e 1 = 0. After discussing the selection of the switching surface, we still have to design the controller to ensure that the system can smoothly enter the sliding manifold such that s(k) = 0 and e 2 (k) = −αe 1 (k) can be ensured. The controller design is described as follows. According to (7) and (8), we have s(k + 1) = e 2 (k + 1) + αe 1 (k + 1) = β 1 e 1 (k) + β 2 (y 3 2 (k) − x 3 2 (k)) + β 3 e 2 (k)(y 2 (k) + x 2 (k)) +β 4 e 2 (k) + u(k) + αλ 1 e 2 (k) (11) If the controller u(k) is properly designed as: where |γ| < 1. Substituting (12) into (11), we can get Since |γ| < 1 is specified in (12), the error system can smoothly enter the sliding manifold, that is, lim k→∞ s(k) = 0. From the above discussion, we can confirm that the system can smoothly enter the sliding mode under the action of the controller (12) and the error states in (7) can also converge to zero as discussed above, that is, the master-slave CRNGs in (5) and (6) can achieve synchronization.
In the following, for evaluating the synchronization effect of master and slave CRNGs, the parameters are given as a 1 = 1, a 2 = 5 d 1 = 3, d 2 = −3. Therefore, the sliding mode control law can be obtained by (12) with α = 0.3, γ = 0.2. In numerical simulations, the initial conditions are selected as  shows the corresponding state responses of master and controlled slave CRNGs. Figure 9 shows the error response between master and controlled slave CRNGs. Figures 10 and 11, respectively, show the switching function and control input and phase planes of the controlled master-slave CRNG. From the simulation results, it shows the proposed sliding mode control works well and the chaotic behavior of controlled master and slave random number generator can be asymptotically synchronized. behavior of controlled master and slave random number generator can be asymptotically synchronized.    behavior of controlled master and slave random number generator can be asymptotically synchronized.    behavior of controlled master and slave random number generator can be asymptotically synchronized.    After completing the synchronization of the single master-slave CRNGs, the large-scale synchronized master-slave CRNGs is given as shown in Figure 12. In Figure 12  Considering the security of future applications and reducing the complexity of synchronization controller for the master-slave large-scale CRNGs, we divide the controller u(k) (12) into two parts, u m (k) and u s (k) satisfying u(k) = u m (k) + u s (k), where u m (k) and u s (k) are the combination signals of master and slave random number generator, respectively. When the master and slave CRNGs are in different locations, only the information u m (k) is sent from the master CRNG through the public channel while u s (k) is generated in the slave CRNG and never appear in the insecure channel. Therefore, the synchronization controller u(k) can be composed in the slave side and the master and slave CRNGs can be synchronized without transmitting full secret information through the public channel.
After completing the synchronization of the single master-slave CRNGs, the large-scale synchronized master-slave CRNGs is given as shown in Figure 12. After completing the synchronization of the single master-slave CRNGs, the large-scale synchronized master-slave CRNGs is given as shown in Figure 12. In Figure 12  In Figure 12, First, the master CRNG i , i = 1, 2 . . . , n, sequentially generates the information u mi (k) required by each RNG i synchronization controller and in the slave RNG i , i = 1, 2 . . . , n, also sequentially generates the required information u si (k). u mi (k) and u si (k) are, respectively, time-sharing selected by the selectors in the master and slave sides, then u mi (k) and u si (k) is integrated to form the aforementioned controller (u i (k) = u mi (k) + u si (k)) and then the synchronization between master CRNG i and slave CRNG i , i = 1, 2 . . . , n can be guaranteed. Because the computing speed of the microcontroller is extremely fast, the large-scale master-slave CRNGs can also be synchronized quickly.

Design of Secure Communication Based on Synchronized Large-Scale CRNGs
In the following, we will discuss how to apply the synchronized master-slave large-scale CRNGs to construct the secure communication system. The design diagram is given as follows: In Figure 13, the plaintext is sent to the encryption mechanism of the transmitter. The master large-scale CRNG sends the random state to the encryption mechanism and encrypt the original signal. After the encryption is completed, the transmitter transmits the cipher-text and the information u mi (k) to the receiver. At the receiver, combined u si (k) with u mi (k) transmitted from the transmitter, the synchronization controller u i (k) = u mi (k) + u si (k) is constructed to achieve synchronization of the master and slave large-scale CRNGs. Finally, the decryption mechanism with the synchronization signal can complete the decryption.

Design of Secure Communication Based on Synchronized Large-Scale CRNGs
In the following, we will discuss how to apply the synchronized master-slave large-scale CRNGs to construct the secure communication system. The design diagram is given as follows: In Figure 13, the plaintext is sent to the encryption mechanism of the transmitter. The master large-scale CRNG sends the random state to the encryption mechanism and encrypt the original signal. After the encryption is completed, the transmitter transmits the cipher-text and the information  In order to verify the design of the above-mentioned secure communication system, we use Holtek's 8-bit (HT66F50) and 32-bit (HT32F1765) microcontrollers to realize the secure communication in Figure 13. The following Figure 14 shows the diagram of the secure communication system. In Figure 14, 8-bit microcontroller is used to generate plaintext and 32-bit one is used to perform large-scale CRNGs and its synchronization. The encryption and decryption in Figure 14 are realized by using the exclusive-or as shown in Figure 15. When the master and slave large-scale CRNGs reaches synchronization, then the master large-scale random number A and the slave large-scale random number B will be the same. The encryption can be decrypted and the plaintext m can be recovered at the receiver side because  In order to verify the design of the above-mentioned secure communication system, we use Holtek's 8-bit (HT66F50) and 32-bit (HT32F1765) microcontrollers to realize the secure communication in Figure 13. The following Figure 14 shows the diagram of the secure communication system. In Figure 14, 8-bit microcontroller is used to generate plaintext and 32-bit one is used to perform large-scale CRNGs and its synchronization.

Design of Secure Communication Based on Synchronized Large-Scale CRNGs
In the following, we will discuss how to apply the synchronized master-slave large-scale CRNGs to construct the secure communication system. The design diagram is given as follows: In Figure 13, the plaintext is sent to the encryption mechanism of the transmitter. The master large-scale CRNG sends the random state to the encryption mechanism and encrypt the original signal. After the encryption is completed, the transmitter transmits the cipher-text and the information  In order to verify the design of the above-mentioned secure communication system, we use Holtek's 8-bit (HT66F50) and 32-bit (HT32F1765) microcontrollers to realize the secure communication in Figure 13. The following Figure 14 shows the diagram of the secure communication system. In Figure 14, 8-bit microcontroller is used to generate plaintext and 32-bit one is used to perform large-scale CRNGs and its synchronization. The encryption and decryption in Figure 14 are realized by using the exclusive-or as shown in Figure 15. When the master and slave large-scale CRNGs reaches synchronization, then the master large-scale random number A and the slave large-scale random number B will be the same. The encryption can be decrypted and the plaintext m can be recovered at the receiver side because  The encryption and decryption in Figure 14 are realized by using the exclusive-or as shown in Figure 15. When the master and slave large-scale CRNGs reaches synchronization, then the master large-scale random number A and the slave large-scale random number B will be the same. The encryption can be decrypted and the plaintext m can be recovered at the receiver side because After completing the circuit design, we use some basic components to implement the circuit as shown in Figure 16, in which the dot matrix LEDs are used to display master and slave random signals, plaintext, cipher-text and decrypted text, respectively. In Figure 16, we first disable the synchronization controller. We can find that the master random number and the slave random number cannot be synchronized and the encryption cannot be decrypted smoothly. While in Figure  17, we enable the synchronization controller. Therefore, it can be found that the master random number and the slave random number are synchronized, as expected and the encryption can be decrypted.   After completing the circuit design, we use some basic components to implement the circuit as shown in Figure 16, in which the dot matrix LEDs are used to display master and slave random signals, plaintext, cipher-text and decrypted text, respectively. In Figure 16, we first disable the synchronization controller. We can find that the master random number and the slave random number cannot be synchronized and the encryption cannot be decrypted smoothly. While in Figure 17, we enable the synchronization controller. Therefore, it can be found that the master random number and the slave random number are synchronized, as expected and the encryption can be decrypted. After completing the circuit design, we use some basic components to implement the circuit as shown in Figure 16, in which the dot matrix LEDs are used to display master and slave random signals, plaintext, cipher-text and decrypted text, respectively. In Figure 16, we first disable the synchronization controller. We can find that the master random number and the slave random number cannot be synchronized and the encryption cannot be decrypted smoothly. While in Figure  17, we enable the synchronization controller. Therefore, it can be found that the master random number and the slave random number are synchronized, as expected and the encryption can be decrypted.   After completing the circuit design, we use some basic components to implement the circuit as shown in Figure 16, in which the dot matrix LEDs are used to display master and slave random signals, plaintext, cipher-text and decrypted text, respectively. In Figure 16, we first disable the synchronization controller. We can find that the master random number and the slave random number cannot be synchronized and the encryption cannot be decrypted smoothly. While in Figure  17, we enable the synchronization controller. Therefore, it can be found that the master random number and the slave random number are synchronized, as expected and the encryption can be decrypted.

Conclusions
This paper proposes the synchronized master-slave large-scale CRNGs and its application to secure communication. Some parameters are introduced to modulate the amplitude and DC offset of the chaotic states. Then, by using the butterfly effect, we complete the design of large-scale CRNGs. The discrete sliding mode control method is used to solve the synchronization problem of the master and slave large-scale CRNGs. Finally, the above research results are integrated to design an innovative confidential communication system. The proposed simulation, experimental results and the realization of the secure communication system are given to show the effectiveness of the proposed method.