Parametric PSpice Circuit of Energy Saving Lamp Emulating Current Waveform

Featured Application: The proposed circuit model is able to foresee the overall current distortion of different lamp conﬁgurations. This feature is very useful in the optimal design of lighting systems when a key target is the mitigation of the current distortion due to the power converter inside the energy-saving lamps. Abstract: Energy-saving lamps are equipped with converters enabling high energy efﬁciency at the cost of injecting very distorted currents on the mains. The problem is more complex in the emerging smart-lighting scenario where these lamps are also used to perform additional tasks. Harmonics mitigation at the lamp level is expensive; consequently, an optimal lighting system design aiming at reducing both costs and current distortion of the whole lighting system is necessary. A tool able to emulate the current drawn from the lamps is necessary for optimal design. Such a tool has also to consider the ﬂuctuations of the voltage on the mains that usually occur throughout the day. In this perspective, a parametric PSpice circuit is proposed and the netlist is reported in this work. Moreover, the simple procedure to be adopted for computing the parameters is also described. The validation has conﬁrmed the ability of the proposed circuit in emulating the current drawn from various CFLs and LED lamps under different supplying voltage. non-linear least-square rectifier an estimation algorithm rectifier model measurements. A methodology for the estimation of the parameters the harmonic due [72]


Introduction
Energy efficiency is a crucial target in view of a sustainable energy future [1], thus, different policies to improve energy efficiency have been internationally introduced [2][3][4][5][6]. European Council has initially set the target of 27% (that should become 30%) energy savings by 2030. Moreover, the European Union is pushing towards "nearly zero-energy buildings" by introducing legal requirement in the construction of new buildings [7]. In this perspective, the European Union has also decided to phase out inefficient light bulbs and, similarly, in the U.S.A., the manufacture of light bulbs that do not meet federal energy-efficiency standards is prohibited according to the Energy Independence and Security Act [8,9].
Energy-saving lamps (ESLs) are consequently the natural choice for lighting system retrofitting as well as for designing future lighting systems. An ESL is a non-linear load due to the converters adopted in the lamp that draws a very distorted current from the mains. In the Smart Lighting scenario, intelligent lamps present new capabilities and functionality (e.g., continuously flashing to signal an intrusion, use sensors for automatic dimming, and so on) making them more than simple illumination systems [10]. Such additional tasks involve driving algorithms for the converters that may intensify the harmonic distortion. Obviously, the effect of the current drawn from a single lamp is negligible.
On the other hand, the effect of the total current harmonics injected on the mains cannot be neglected in large lighting systems in view of the widespread use of ESLs in building and streets. The harmonics negatively affect the power network: reduction of the cable ampacity and life, while the losses and EMI issues increase [11]; premature aging and failures of capacitor banks used for power factor correction and ancillary services [12][13][14][15]; undesired losses in motors and transformers windings with related life expectancy reduction [16,17]. The large use of ESLs will involve additional issues on future smart grids that use network control and management techniques based on measurements that may be affected by the harmonics [18]. The problem is exacerbated by the ESLs since dealing with the large distorted current due to a very great number of dispersed ESLs is more complex than in case of a single large harmonics source [19]. Therefore, there is a noteworthy need for mitigation of the harmonics due to ESL based lighting systems. The addition of filters, power factor corrector circuits, and other devices in the ESL increase the lamp cost and consequently the economic investment for both retrofitting and new lighting systems [20][21][22][23][24]. On the other hand, although a single compensation circuit for the whole lighting system may be less expensive [25], it has to be revised each time a new lighting system retrofit is performed.
The best choice from cost and flexibility point of view is the harmonic mitigation at lighting system design stage. The optimal lighting system design aiming at mitigation of the distorted current drawn from the whole lighting system requires a tool for estimating such a current when different lamps configurations are adopted (number, type, nominal parameter, and so on). In such a case the best configuration is the one with the greatest harmonic cancellation and lowest THD [25][26][27][28][29].
The proposed parametric PSpice circuit is suitable to perform this task. More specifically, the current drawn from a given ESL under a variable voltage on the main is emulated by means of a generalized PSpice netlist with parametric components. The parameters of an ESL can be obtained by few simple current measurements to be performed at the lamp terminals. These parameters are the coefficients of the functions obtained by linear interpolation of the rms of the current harmonics. In view of the increasing attention in the reduction of harmonic injection, the coefficient of these polynomial functions should be provided by manufactures in the ESL datasheet in the future, regardless the specific use of that information in this paper.
The PSpice circuit validation has been performed comparing the measured and simulated currents: the results have confirmed the suitability of the model. The circuit can be used to predict the current waveform of each lamp and, consequently, the overall current drawn from the lighting system for different configurations can be foresee. Therefore, it is a useful tool for the optimal design of a new lighting system or its subsequent optimal retrofit.

Related Works
The design of the lighting system plays a fundamental role because it is a prime component to help to living and feeling better in the private houses, in the offices and industrial locations. In these terms, the design should take into account the light level and the uniformity of the light pattern, the aesthetic appearance, the economic benefit, the safety and appropriate equipment [30]. Safety issues should be more cared in some industrial applications and in street lighting. Only ESLs will be used in future smart lighting systems, then there is an increasing interest in studying the new devices in their large applications. The optimal lighting system design in different indoor applications of ESLs have been investigated by considering several constraints and objectives: cost saving, energy efficiency and management, functional suitability, system integration, people satisfaction, and quality of lighting [31][32][33][34][35][36][37][38]. Moreover, it is important to point out the different innovative solutions in the modern agriculture consist on the development of facilities LED lighting technology. Among the different advantages, it can be realized a continuous production of crops and, consequently, the growth factors (temperature, light, etc.) can be controlled during the whole process while it is also reduced the use of pesticide [39][40][41][42]. It is evident that the use of parallel optimization algorithms [43] plays a key role in the optimal design of the lighting system that requires investment and operating costs minimization, as well as uniform light distribution over the plant growing area, accounting for light intensity capability and shading effects [44,45]. In outdoor applications, accurate methods have been developed to test the road lighting effects to ensure a good visibility in the street [46][47][48][49][50].
Although several key aspects of the optimal lighting system design have been considered until now, the power quality degradation due to the employment of the ESLs has been neglected in both indoor and outdoor lighting design. In the perspective of an optimal and efficient design, the distorted current drawn by a large number of lamps have to be considered. The parametric PSpice circuit proposed in this paper enables to consider power quality degradation at the planning stage of the lighting system and, consequently, overcome the aforesaid limitation of previous works on the optimal lighting design.
The impact on the grid of the current harmonics produced by the CFLs and LED lamps has been analysed in depth so far [51][52][53][54][55][56][57][58]. In [51] the results of the experimental evaluation of electrical characteristics of several LED lamps from different manufacturers have been reported. The behaviour of each lamp using different supply voltage has been considered and the amount of current harmonic injected into the grid has been measured. The main goal of [52] has been the comparison of different house hold illumination appliances and the monitoring of the power quality degradation. In [53] the current harmonics that are injected into the utility-grid by the different types of LED lamps that are available in the Indian market have been considered and the results have been compared with the IEC 61000-3-2 guidelines. In [54] a comparison between the use of incandescent lamps and ESLs has been carried out for a large building. In [55] the measurements in two private houses and on low voltage side of the distribution transformer supplying these houses have been performed. Additionally, in this case the incandescent lamps have been replaced with the energy saving ones. It is worth highlighting that in [56] the impact of the current harmonic due to by several domestic appliances, together with many LED lamps has been analysed. It is also interesting to note how the power quality issues in term of harmonics generated by lighting system when both CFLs and LED lamps are employed have been studied [57]. In such a work the design of a filter circuit for harmonic reduction in lighting system applications has been considered. Different LED light bulbs have been compared in [58], focusing on the current harmonic emission and, consequently, on the negative impact on the distribution grid. In [59], a method to examine the effect on harmonic distortion levels in the distribution network through a custom software has been proposed. Although the current distortion has been investigated in these works, there were not developed any model able in predicting the distorted current. Although the harmonics due to the ESLs have been studied in these works, they do not provide any method to esteem the harmonic distortion due to them.
Several works have treated the prediction of the amount of current harmonic that the ESLs inject into the power grid [60][61][62][63][64][65][66][67][68][69][70][71][72]. In [60] has been investigated the effect of the employing of many energy-saving lamps on the power grid in New Zeeland. A Norton equivalent has been used to emulate a large number of houses assumed as series of distributed loads. The main objective of [61] has been the prediction of the maximum number of CFLs that can be used without overcome a threshold value of THD imposed by the users. In [62] the results of a research performed on energy-efficient electronic ballasts for T8 fluorescent lamps have been presented. Unlike the previous cases, the CFL behaviour in a distribution system a fixed harmonic injection method has been adopted, where the single CFL has been modelled by means of an ideal current source. In this way, a possible solution developed in the PSCAD/EMTDC environment to model the CFL ballast circuit has been proposed in [63]. The solution analysed the interactions of several CFLs connected to an electrical network at the same time. It has been studied the error between the measured current waveform and the ones obtained through the fixed harmonic current injection. Moreover, the tensor analysis with phase dependency is used with the aims to take into account the harmonic interaction of the mains voltage in the CFL harmonic currents. The analysis of the power factor and harmonic emission of CFLs have highlighted that the current drawn of the lamps are influenced by the main voltage variation [60][61][62][63].
Consequently, when multiple CFLs interact together through the AC system impedance, the harmonic current injection method is not always accurate. In [64], the black box CFL behaviour is obtained analysing the current waveform drawn as a function of the main voltage applied. The current has been modelled by a mathematical function given by the difference between two exponentials. Even if many results have been accurate, some particular CFLs under test have had to use some ad hoc adjustment to fit accurately with the measurements.
Some researchers have worked out the behaviour of the CFL using an equivalent electrical circuit [65][66][67][68][69][70][71][72]. A common and general model is depicted in Figure 1, where the key circuit components are: a diode bridge that rectifies the main voltage, an AC equivalent resistor (Rac) and a DC smoothing electrolytic capacitor (C) supplying the downstream inverter that, in turn, feeds the fluorescent tube. Both the inverter and the fluorescent tube can be modelled as a unique equivalent resistance, R D , since they behaviour like to a constant load for the DC busbar. In [65,66] an admittance model that depends on some internal parameters (firing and extinction angles) that, in turn, depend on the voltage waveform being used instead of the general model. A method based on the measurements to obtain harmonic models of power electronic-based home appliances, among which ESLs, has been presented in [65]. In [66] a model based on harmonically coupled admittance matrix used to study harmonics in static converters of ESLs have been proposed. However, admittance model it is valid only in a specific condition of the supply voltage. In [67] a simplified version of the general model is adopted where the AC resistor has been neglected since it presents a small resistance. However, this approximation may lead to non-realizable infinite slopes of the AC current rising edge.
Appl. Sci. 2019, 9,152 4 of 32 been accurate, some particular CFLs under test have had to use some ad hoc adjustment to fit accurately with the measurements. Some researchers have worked out the behaviour of the CFL using an equivalent electrical circuit [65][66][67][68][69][70][71][72]. A common and general model is depicted in Figure 1, where the key circuit components are: a diode bridge that rectifies the main voltage, an AC equivalent resistor (Rac) and a DC smoothing electrolytic capacitor (C) supplying the downstream inverter that, in turn, feeds the fluorescent tube. Both the inverter and the fluorescent tube can be modelled as a unique equivalent resistance, RD, since they behaviour like to a constant load for the DC busbar. In [65,66] an admittance model that depends on some internal parameters (firing and extinction angles) that, in turn, depend on the voltage waveform being used instead of the general model. A method based on the measurements to obtain harmonic models of power electronic-based home appliances, among which ESLs, has been presented in [65]. In [66] a model based on harmonically coupled admittance matrix used to study harmonics in static converters of ESLs have been proposed. However, admittance model it is valid only in a specific condition of the supply voltage. In [67] a simplified version of the general model is adopted where the AC resistor has been neglected since it presents a small resistance. However, this approximation may lead to non-realizable infinite slopes of the AC current rising edge. Similarly, the CFL equivalent circuit considering the AC resistance has been proposed in [68]. The model considers that the behaviour of the CFL electrical circuit is similar to the one shown in Figure 1. The supply voltage has been modelled with the series of the fundamental and interharmonic voltage generators with their network equivalent impedance. In [69] the CFL parameter estimation has been obtained as a detailed analysis of the electrical model developed in [68], where the former used a non-linear least-square procedures based on actual measurements. The resolution is based on the Newton method calculating the terms of the Jacobian matrix by finite difference approach. The study of CFL impact and the related model has involved the determination of the CFL equivalent circuit parameters Rac, C, and RD described previously. It is worth noting that in literature several procedures are developed to determine the parameters from the supply voltage and AC current measurements [68,69]. Other studies deal with the estimation of other non-linear loads using least-square algorithms [70][71][72]. In [70,71] the parameter estimation of single-phase rectifiers by analysing several non-linear sets of equations has been performed. More specifically, the former has proposed the two methods to esteem the electrical components in the input rectifier that there are in many electronic equipment available in the market. The latter has presented an estimation algorithm based on a rectifier model and actual measurements. A methodology for the estimation of the main parameters related to the harmonic due industrial loads has been considered in [72] where aggregated measurements of the total load has been performed Regarding the LED light bulb, few works investigate the electrical model for the current drawn [73].
The procedures described before offers several rules that enable to obtain the circuit model of CFLs available on the market, but they require the knowledge of the ballast internal circuit components and not negligible computational resources, which make them unsuitable tool for optimal lighting system design. Moreover, the circuit model includes non-linear components. On the Similarly, the CFL equivalent circuit considering the AC resistance has been proposed in [68]. The model considers that the behaviour of the CFL electrical circuit is similar to the one shown in Figure 1. The supply voltage has been modelled with the series of the fundamental and inter-harmonic voltage generators with their network equivalent impedance. In [69] the CFL parameter estimation has been obtained as a detailed analysis of the electrical model developed in [68], where the former used a non-linear least-square procedures based on actual measurements. The resolution is based on the Newton method calculating the terms of the Jacobian matrix by finite difference approach. The study of CFL impact and the related model has involved the determination of the CFL equivalent circuit parameters Rac, C, and R D described previously. It is worth noting that in literature several procedures are developed to determine the parameters from the supply voltage and AC current measurements [68,69]. Other studies deal with the estimation of other non-linear loads using least-square algorithms [70][71][72]. In [70,71] the parameter estimation of single-phase rectifiers by analysing several non-linear sets of equations has been performed. More specifically, the former has proposed the two methods to esteem the electrical components in the input rectifier that there are in many electronic equipment available in the market. The latter has presented an estimation algorithm based on a rectifier model and actual measurements. A methodology for the estimation of the main parameters related to the harmonic due industrial loads has been considered in [72] where aggregated measurements of the total load has been performed Regarding the LED light bulb, few works investigate the electrical model for the current drawn [73].
The procedures described before offers several rules that enable to obtain the circuit model of CFLs available on the market, but they require the knowledge of the ballast internal circuit components and not negligible computational resources, which make them unsuitable tool for optimal lighting system design. Moreover, the circuit model includes non-linear components. On the other hand, as said before, although several objective and constraints have been considered so far in the optimal lighting system design, the harmonic mitigation target has been totally neglected. Therefore, a parametric PSpice circuit overcoming these limitations has been proposed in the following. The knowledge of the ballast circuit, driver, package, and so on, is not necessary to obtain the parameters to be used in the proposed PSpice circuit. Indeed, any ESL can be treated as a black box, and the components of the circuit are simply obtained with some electrical measurements, that is, the amplitude and phase shift of the fundamental current and harmonics drawn by the ESL. An additional advantage of the proposed circuit is that it contains only linear components and the circuit simulation is very fast and it requires little computational effort.

Materials and Methods
The measurements of the current drawn from several ESLs from different manufactures have confirmed the presence of odd harmonics while even harmonics, subharmonics, and inter-harmonics are almost negligible. Moreover, the measurements have also confirmed a low voltage total-harmonicdistortion, which is less than 4%. Therefore, in the following the key equations of non-sinusoidal periodical instantaneous electric quantities in the absence of subharmonics and inter-harmonics are discussed. After that, the test rig and the measurements are presented with the proposed parametric PSpice circuit able in emulating the current drawn by the lamps under variable voltage on the mains.

Non-Sinusoidal Periodical Electric Quantities
Considering a circuit operating at steady-state conditions, the non-sinusoidal periodical instantaneous electric quantities, that is the voltage v(t) and the current i(t), can be represented by means of the Fourier series in the absence of subharmonics and inter-harmonics [74]: Key terms are the power system fundamental frequency of the voltage, v 1 (t), and current, i 1 (t) [74]: Grouping the constant term with the harmonics [74]: any non-sinusoidal periodical instantaneous electric quantity can be summarized according the IEEE Std-1459 TM [74]: Without loss of generality, it can be set: and also δ 1 = 0. Therefore: The instantaneous power related to the fundamental frequency deriving from these equations is: and the fundamental apparent power, S 1 , is then obtained from the fundamental active power, P 1 , and the fundamental reactive power, Q 1 , through the following equation [74]: that, in turn, is part of the overall apparent power, S, that includes the harmonics contribution (that is the non-fundamental apparent power) [74]: where the current distortion power, D I , the voltage distortion power, D V , and the harmonic apparent power, S H , are obtained from the evaluation of the rms value of v H (t), that is V H , and i H (t), that is I H [74]: The harmonics related to the voltage on the mains are negligible in comparison with the current harmonics, and it is also confirmed by the measurements. Consequently, the term v H (t) in Equation (4) can be neglected, and then the apparent power is approximated to: Therefore, modelling the current harmonics enables to estimate the non-active powers Q1 and D I that involve undesired power losses in the line. It is worth noting that, while the current harmonics pertain to the undesired term D I , the fundamental current affect the active power as well as the useless power Q 1 . Therefore, it is useful to consider the fundamental current divided into two components [75,76]: It is easy to prove that: Therefore, the term i P1 (t) affects only the active power, then in the following it is called "active current". The term i Q1 (t), affects only the reactive power, then in the following it is called "reactive current". Finally, as expected, in all performed tests for all the lamps, the phase shift of the fundamental frequency current drawn was always: − π 2 < γ 1 < π 2 (with respect to the voltage on the mains), which implies a positive value of cos(γ 1 ) in Equation (12).

Test Rig
The measurements of the amplitude and phase shift of the fundamental and harmonic currents have to be performed in order to obtain the components of the proposed PSpice circuit. For a given ESL, these measurements have to be performed by setting five voltage levels at the lamp terminals: 0.9 V nom , 0.95 V nom , V nom , 1.05 V nom , and 1.1 V nom . For each current harmonic, a polynomial function has to be obtained by measurements interpolation. Similarly, polynomial functions have to be obtained for, respectively, the active and reactive current. The coefficients of these polynomial functions have to be used to select the components of the PSpice circuit according the rules that are described in the next section. Moreover, the quantities related to these components are also related to these coefficients as described in the following. With this in mind, this section describes the test rig used to set the desired voltage levels across the lamp terminals and to perform the aforesaid measurements. Figures 2 and 3 depict the measurements of the fundamental current and the odd current harmonic amplitudes up to the 13th for both a CFL and a LED light bulb. The measurements highlighted that a linear interpolation of the current harmonics turns out to be enough accurate: with K the number of harmonics considered for emulating the waveform of the current drawn from the lamp. (14) because it is obtained by multiplying I 1 with cos(γ 1 ), where the former is positive by definition while the latter has been previously proved to be positive since − π 2 < γ 1 < π 2 . Similar considerations are valid for I k as well as for the terms in the related interpolation functions. On the other hand, although I 1 is positive by definition, I Q1 may be positive or negative, it depends on γ 1 .

Remark 2.
Considering the previous remark and that V 1 is positive by definition, at least one between a P1 and b P1 in the interpolation function have to be positive. Similar considerations are always valid for a k and b k , while for a Q1 and b Q1 are valid only when I Q1 is positive. On the other hand, when I Q1 is negative, a dual behaviour occurs, that is at least one between a Q1 and b Q1 in the interpolation function have to be negative.

Test Rig
The measurements of the amplitude and phase shift of the fundamental and harmonic currents have to be performed in order to obtain the components of the proposed PSpice circuit. For a given ESL, these measurements have to be performed by setting five voltage levels at the lamp terminals: 0.9 Vnom, 0.95 Vnom, Vnom, 1.05 Vnom, and 1.1 Vnom. For each current harmonic, a polynomial function has to be obtained by measurements interpolation. Similarly, polynomial functions have to be obtained for, respectively, the active and reactive current. The coefficients of these polynomial functions have to be used to select the components of the PSpice circuit according the rules that are described in the next section. Moreover, the quantities related to these components are also related to these coefficients as described in the following. With this in mind, this section describes the test rig used to set the desired voltage levels across the lamp terminals and to perform the aforesaid measurements. Figures 2 and 3 depict the measurements of the fundamental current and the odd current harmonic amplitudes up to the 13th for both a CFL and a LED light bulb. The measurements highlighted that a linear interpolation of the current harmonics turns out to be enough accurate: with K the number of harmonics considered for emulating the waveform of the current drawn from the lamp.

Remark 1.
is always positive regardless its trend in Equation (14)    In the test rig ( Figure 4), a transformer with continuous variable transform ratio (variac) is connected to the mains voltage with the aim of emulating the variable voltage on the mains. In other words, each time a measurement has to be performed at a given voltage level, the variac is properly tuned to emulate such a voltage level across the lamp terminals. The variac feeds the ESL through a power analyser used to measure the voltage across the lamp terminals as well as to measure the fundamental and harmonic currents (in terms of amplitude and phase shift) drawn. Moreover, to simultaneously observe the current harmonics amplitude and the waveforms of the voltage and current at ESL terminals, an oscilloscope is also used. More specifically, the current drawn from the ESL has been displayed through the oscilloscope. The power analyser has a 1 A shunt probe that offers a high resolution and accuracy for testing currents as low as 80 μA. This enables the meter to measure standby power as low as 20 mW at 240 V. The maximum voltage peak can reach 2kV, with an accuracy of 20 mV. The power analyser has a bandwidth of 1 MHz. The measurements have been performed in the range of ±10% of the rated voltage due to the voltage variations that is allowed for the utility [77]. Throughout the day, the rated voltage could suffer of some variations due to the distributed renewable generators into the network, the load variations, the network configurations and so on, without the possibility for the users to do anything about it [78]. In the test rig ( Figure 4), a transformer with continuous variable transform ratio (variac) is connected to the mains voltage with the aim of emulating the variable voltage on the mains. In other words, each time a measurement has to be performed at a given voltage level, the variac is properly tuned to emulate such a voltage level across the lamp terminals. The variac feeds the ESL through a power analyser used to measure the voltage across the lamp terminals as well as to measure the fundamental and harmonic currents (in terms of amplitude and phase shift) drawn. Moreover, to simultaneously observe the current harmonics amplitude and the waveforms of the voltage and current at ESL terminals, an oscilloscope is also used. More specifically, the current drawn from the ESL has been displayed through the oscilloscope. The power analyser has a 1 A shunt probe that offers a high resolution and accuracy for testing currents as low as 80 µA. This enables the meter to measure standby power as low as 20 mW at 240 V. The maximum voltage peak can reach 2kV, with an accuracy of 20 mV. The power analyser has a bandwidth of 1 MHz. In the test rig ( Figure 4), a transformer with continuous variable transform ratio (variac) is connected to the mains voltage with the aim of emulating the variable voltage on the mains. In other words, each time a measurement has to be performed at a given voltage level, the variac is properly tuned to emulate such a voltage level across the lamp terminals. The variac feeds the ESL through a power analyser used to measure the voltage across the lamp terminals as well as to measure the fundamental and harmonic currents (in terms of amplitude and phase shift) drawn. Moreover, to simultaneously observe the current harmonics amplitude and the waveforms of the voltage and current at ESL terminals, an oscilloscope is also used. More specifically, the current drawn from the ESL has been displayed through the oscilloscope. The power analyser has a 1 A shunt probe that offers a high resolution and accuracy for testing currents as low as 80 μA. This enables the meter to measure standby power as low as 20 mW at 240 V. The maximum voltage peak can reach 2kV, with an accuracy of 20 mV. The power analyser has a bandwidth of 1 MHz. The measurements have been performed in the range of ±10% of the rated voltage due to the voltage variations that is allowed for the utility [77]. Throughout the day, the rated voltage could suffer of some variations due to the distributed renewable generators into the network, the load variations, the network configurations and so on, without the possibility for the users to do anything about it [78]. The measurements have been performed in the range of ±10% of the rated voltage due to the voltage variations that is allowed for the utility [77]. Throughout the day, the rated voltage could suffer of some variations due to the distributed renewable generators into the network, the load variations, the network configurations and so on, without the possibility for the users to do anything about it [78]. Figure 5 shows the amplitude of the current harmonics normalized with respect to the fundamental one, in case of a CFL with 212V (rms) at its terminals. The normalized harmonic amplitudes, in blue, are sorted in ascending order and the abscissa reports the related harmonic. The figure also reports, in red, the THD error in percentage when some current harmonics are neglected, assuming as THD reference, THD I,TOT , the one computed considering the harmonics until the 50th. More specifically, for a given harmonic, n, the THD error, Error I,n , is obtained when a set of m harmonics are neglected. Harmonic n and those on its left in the figure belong to this set. The current THD reference is [74]: while the THD referred to a given current harmonic n, THD I,n , is computed subtracting the aforesaid m current harmonic amplitudes: withÎ an array where the amplitudes of the current harmonics have been ascending sorted and p indicates the position in the sequence. Consequentially the percentage error referred to the THD I,n is equal to: In the THD error diagram, the first red point on the left has been calculated by removing from the total current the harmonic that has the smallest amplitude (that is the 50th), the second point is calculated neglecting the two smallest current amplitude (that is the 50th and 48th) and so on, until it is removed the 3rd current harmonic.
As can be seen from the Figure 5, for the CFL under test when the supplying voltage is 212 V, the THD percentage error is less to 1% by removing the smallest m = 38 (that is n = 23) current harmonics amplitudes (that is, considering only the 3rd, 5th, 7th, 9th, 11th, 13th, 15th, 17th, 19th, 21th, and 27th harmonics). On the other hand, by removing m = 46 harmonics, n = 9 (considering only the 3rd, 5 th , and 7th), the percentage error is less than 10%. Figure 6 shows the same quantities when the voltage is 237 V.     A similar reasoning is valid for a LED lamp under test. Figure 7 depicts the normalized current harmonics and the THD percentage error. It is less to 1% by removing the smallest m = 41 (that is n = 15) current harmonics (that is, considering only the 3rd, 5th, 7th, 9th, 11th, 13th, 17th, and 19th harmonics). On the other hand, by removing m = 46 harmonics, n = 9 (considering only the 3rd, 5 th , and 7th), the percentage error is less than 10%. Figure 8 reports the quantities for the LED when the voltage is 237 V.

PSpice Model for Emulating the Current Drawn from an ESL
The proposed circuit model accounts for the change of the current drawn from a lamp when the rms voltage, V1, on the mains varies within the range allowed by the regulation (±10% of Vnom). More specifically, the model emulates the variation of the value of the rms, I1, and the change in the phase shift, , of the fundamental frequency current, i1(t). The model also emulates the variation of the rms of any other current harmonic, Ik, while it neglects any variation of the phase offset, (that is the phase offset at nominal voltage is considered). A graphical representation of the proposed circuit that accounts for the previous interpolation functions is reported in Figure 9.

PSpice Model for Emulating the Current Drawn from an ESL
The proposed circuit model accounts for the change of the current drawn from a lamp when the rms voltage, V 1 , on the mains varies within the range allowed by the regulation (±10% of V nom ). More specifically, the model emulates the variation of the value of the rms, I 1 , and the change in the phase shift, γ 1 , of the fundamental frequency current, i 1 (t). The model also emulates the variation of the rms of any other current harmonic, I k , while it neglects any variation of the phase offset, γ k (that is the phase offset at nominal voltage is considered). A graphical representation of the proposed circuit that accounts for the previous interpolation functions is reported in Figure 9. The components in the subcircuits called "Active", "Reactive", and "kth harmonic" emulate the behaviour of, respectively, , , and in Equation (14). According the circuit model in the figure and the equations in (14), the following equations are valid: Then ( ) accounts for the constant term , ( ) accounts for the linear term and so on: The components in the subcircuits called "Active", "Reactive", and "kth harmonic" emulate the behaviour of, respectively, I P1 , I Q1 , and I k in Equation (14). According the circuit model in the figure and the equations in (14), the following equations are valid: Appl. Sci. 2019, 9, 152 12 of 31 Then i aP1 (t) accounts for the constant term a P1 , i bP1 (t) accounts for the linear term b P1 and so on: In the previous equations, the currents i aP1 (t), i aQ1 (t) and i ak (t) are independent from V 1 since they arise from the constant terms in (14). Therefore, their waveforms are emulated by means of independent current generators in the equivalent circuit ( Figure 9).
It is useful to recall that, when a constant term is negative (for example a k < 0) the related generator (i ak (t) in such an example) is in antiphase with the overall current it belongs to (i k (t) in such an example). Consequently, according to Remark 2, the other term (b k in such an example) is definitively positive because the related current (i bk (t) in such an example) has to be in phase with the overall current. Moreover, the amplitude of the "in-phase" current (i bk (t)) is greater than the amplitude of the "antiphase" current (i ak (t)) according to Remark 1.
The voltage independent generator, v Fk , with an element in series are responsible for emulating the current i bk (t). The voltage independent generator has an angular frequency k times greater than the mains voltage and the same amplitude: where γ k is the phase offset of the kth harmonic current according to Equation (6); d can assume only two values +1 or −1, it depends on the component selected by the switches. When the circuit component adopted is an inductor then d = 1, otherwise, when it is chosen a capacitor d = −1. It is worth noting that this voltage generator does not emulate the kth voltage harmonic on the mains but it is a fictitious generator belonging to the lamp model. By using superposition theorem, it can be noted that such a fictitious voltage independent generator supplies only the aforesaid component, e.g., the inductor when d = 1 (see Figure 10). Therefore, at steady-state, when an inductor L k is adopted the steady-state current trough it due to v Fk is: When b k is positive, the phase of i bk (t) is kωt + γ k and the previous equation becomes: that is i Lk (t) presents the same phase of i bk (t). These currents can present also the same amplitude by properly choosing L k : When b k is negative, the phase of i bk (t) is kωt + γ k − π since this current is in antiphase with i k (t), moreover Equation (21) becomes: Once again i Lk (t) presents the same phase offset of i bk (t) thanks to the adopted waveform of the fictitious voltage generator. These currents can present also the same amplitude by properly choosing L k : Therefore, by using a fictitious voltage generator with the waveform reported in Equation (20) and an inductor is always possible emulate the linear term b k : When b k is equal to 0, the amplitude of I k is independent from the voltage on the mains, then only the independent current generator is considered while the fictitious independent voltage generator and the inductor are removed.
When is negative, the phase of ( ) is + − since this current is in antiphase with ( ), moreover Equation (21) becomes: Once again ( ) presents the same phase offset of ( ) thanks to the adopted waveform of the fictitious voltage generator. These currents can present also the same amplitude by properly choosing Lk: Therefore, by using a fictitious voltage generator with the waveform reported in Equation (20) and an inductor is always possible emulate the linear term bk: When bk is equal to 0, the amplitude of Ik is independent from the voltage on the mains, then only the independent current generator is considered while the fictitious independent voltage generator and the inductor are removed.  When a capacitor C k is adopted (then d = −1) the steady-state current trough it due to v Fk is: When b k is positive the previous equation becomes: that is, i Ck (t) presents the same phase of i bk (t) like to the previous case where an inductor has been considered. These currents can present also the same amplitude by properly choosing C k : and, more in general, it is always possible to emulate the linear term b k also using the fictitious voltage from Equation (20) and a capacitor: In [75] and [76] have been presented, respectively, a circuit model (called "fundamental current circuit", Figure 9) of the active and reactive current as well as the related PSpice model. The model of the fundamental current has been slightly modified in this work and for sake of completeness the main considerations and relations are reported in the following.
The active current has to be in phase with the mains voltage since the lamp is a load. Notwithstanding, when the constant term, a P1 , is negative the independent current generator is in antiphase with the mains voltage. On the other hand, in such a case, the term b P1 has to be positive according to Remark 2, that is the current i bP1 must be in phase with the mains voltage. Moreover, its amplitude has to exceed the other in the voltage range of application (±10% of V nom ). Similarly, when the linear term, b P1 , is negative the current i bP1 is in antiphase with the mains voltage, but the term a P1 is positive (according to Remark 2) and enough to ensure that the overall active current is in phase with the mains voltage in the range of application of the model. It is worth noting that negative values of b P1 highlights a reduction of the active current drawn from the lamp as the mains voltage increases. Therefore, in the PSpice circuit a resistor is adopted when i bP1 is positive (to emulate an increasing current in phase with the mains voltage), otherwise a voltage controlled current source (VCCS), G1, is considered: Finally, no issues arise when both terms are positive. In such a case the independent generator is in phase with the mains voltage and a resistor is adopted to emulate the increasing active current drawn by the lamp as the voltage on the mains increases.
When I Q1 is positive, the reactive current leads the mains voltage. In such a case, if the constant term, a Q1 , is negative then the related independent current generator lags the mains voltage. Therefore, the term b Q1 has to be positive (according to Remark 2), that is the current i bQ1 must lead the mains voltage. Moreover, its amplitude has to exceed the other in the voltage range of application (±10% of V nom ). Similarly, when the linear term, b Q1 , is negative, the current i bQ1 lags the mains voltage, but the term a P1 is positive (according to Remark 2) and enough to ensure that the overall reactive current leads the mains voltage in the range of application of the model. It is worth noting that, in this specific case, negative values of b Q1 means a reduction of the reactive current drawn from the lamp as the mains voltage increases.
Dually, when I Q1 is negative, the reactive current lags the mains voltage. In such a case, if the constant term, a Q1 , is positive then the related independent current generator leads the mains voltage. Therefore, the term b Q1 has to be negative (according to Remark 2), that is the current i bQ1 must lag the mains voltage. Moreover, its amplitude has to exceed the other in the voltage range of application (±10% of V nom ). Similarly, when the linear term, b Q1 , is positive, the current i bQ1 leads the mains voltage, but the term a P1 is negative (according to Remark 2) and enough to ensure that the overall reactive current lags the mains voltage in the range of application of the model. It is worth noting that, in this specific case, a positive value of b Q1 means a reduction of the reactive current drawn from the lamp as the mains voltage increases. Figures 2 and 3 graphically represent the previous cases.
Whatever I Q1 , a capacitor may be adopted in the model when i bQ1 leads the mains voltage and an inductor when i bQ1 lags the mains voltage: It is worth noting that there is a crucial difference between these components and the others described before (L k and C k ). More specifically, when b Q1 is positive a capacitor must be used in the PSpice circuit, while when b k is positive L k and C k can be equally used in the PSpice model. On the other hand, once the component (L k or C k ) is chosen the waveform of the fictitious independent voltage generator cannot be chosen arbitrarily since the value of d is fixed by the component choice.
By using the superposition theorem, it can be noted that the voltage independent generator representing the mains voltage supplies the "fundamental current circuit" and also the components (L k , C k ) adopted for emulating the current harmonics. Figure 11 easily makes evident such a consideration. Therefore, undesired reactive currents flow through these components. These currents have to be eliminated to ensure that the reactive current is given only by the "fundamental current circuit". This goal is reached by adding a compensation component (L C or C C ) which is resonant at the fundamental frequency with the equivalent component (C EQ or L EQ ) downstream form it: PSpice circuit, while when bk is positive Lk and Ck can be equally used in the PSpice model. On the other hand, once the component (Lk or Ck) is chosen the waveform of the fictitious independent voltage generator cannot be chosen arbitrarily since the value of d is fixed by the component choice. By using the superposition theorem, it can be noted that the voltage independent generator representing the mains voltage supplies the "fundamental current circuit" and also the components (Lk, Ck) adopted for emulating the current harmonics. Figure 11 easily makes evident such a consideration. Therefore, undesired reactive currents flow through these components. These currents have to be eliminated to ensure that the reactive current is given only by the "fundamental current circuit". This goal is reached by adding a compensation component (LC or CC) which is resonant at the fundamental frequency with the equivalent component (CEQ or LEQ) downstream form it: Figure 11. Equivalent circuit when only v1 works while the other independent generators are turned off. It is apparent that a current at the fundamental frequency flows through Leq. Cc is, thus, accorded to nullify the fundamental current downstream from the "fundamental current circuit".
Starting from the previous considerations and equations, the netlist (that is the circuit description file .CIR) can be obtained and simulated in PSpice. Indeed, PSpice impedes the simulation of the considered circuit "as is" when Lk is considered due to the presence of loop with only voltage sources and inductors. This obstacle can be easily overcome by adding a resistor, Rloop, in each loop Figure 11. Equivalent circuit when only v 1 works while the other independent generators are turned off. It is apparent that a current at the fundamental frequency flows through Leq. Cc is, thus, accorded to nullify the fundamental current downstream from the "fundamental current circuit".
Starting from the previous considerations and equations, the netlist (that is the circuit description file. CIR) can be obtained and simulated in PSpice. Indeed, PSpice impedes the simulation of the considered circuit "as is" when L k is considered due to the presence of loop with only voltage sources and inductors. This obstacle can be easily overcome by adding a resistor, R loop , in each loop ( Figure 12). A small value of resistance has to be used since the resistor negatively affects the ability of the PSpice circuit in emulating the measured current.
Appl. Sci. 2019, 9,152 16 of 32 ( Figure 12). A small value of resistance has to be used since the resistor negatively affects the ability of the PSpice circuit in emulating the measured current. It is worth to underline that the proposed model enables to emulate the steady-state current drawn by the lamp while it is not able in emulating the transient (inrush current and so on [79]) when turned on. On the other hand, the waveforms in the PSpice circuit are obtained by using a transient analysis, then the simulation period has to be enough to ensure the steady-state condition is reached.
When only capacitors are used for emulating the current harmonics, the voltage across Ck is imposed by the related loop ( Figure 13): According to this Kirchhoff's voltage law (KVL), the voltage across the capacitors is imposed and then it is already at steady-state when the PSpice transient analysis starts. It is worth to underline that the proposed model enables to emulate the steady-state current drawn by the lamp while it is not able in emulating the transient (inrush current and so on [79]) when turned on. On the other hand, the waveforms in the PSpice circuit are obtained by using a transient analysis, then the simulation period has to be enough to ensure the steady-state condition is reached.
When only capacitors are used for emulating the current harmonics, the voltage across C k is imposed by the related loop ( Figure 13): (34) According to this Kirchhoff's voltage law (KVL), the voltage across the capacitors is imposed and then it is already at steady-state when the PSpice transient analysis starts. It is worth to underline that the proposed model enables to emulate the steady-state current drawn by the lamp while it is not able in emulating the transient (inrush current and so on [79]) when turned on. On the other hand, the waveforms in the PSpice circuit are obtained by using a transient analysis, then the simulation period has to be enough to ensure the steady-state condition is reached.
When only capacitors are used for emulating the current harmonics, the voltage across Ck is imposed by the related loop ( Figure 13): According to this Kirchhoff's voltage law (KVL), the voltage across the capacitors is imposed and then it is already at steady-state when the PSpice transient analysis starts. The use of these capacitors asks for inserting a compensation inductor, LC, resonant at the fundamental frequency with the equivalent capacitor CEQ. As said before a resistor has to be added in series with the inductor to avoid the loop (LC − v1) which impedes simulation starts. Unfortunately, the current across this inductor is not yet at steady-state when the PSpice transient analysis starts, and recalling the standard expression of the current in a resistor-inductor circuit: it is evident that the smaller the resistance the greater the time required to reach a steady state condition. In other words, the use of small resistance provides more accurate results but at the cost of long simulation time. To solve this problem, the initial condition value has to nullify the transient current across the compensation inductor, LC, that is: Figure 13. KVL for obtaining the voltage across a capacitor adopted in the kth harmonic circuit.
The use of these capacitors asks for inserting a compensation inductor, L C , resonant at the fundamental frequency with the equivalent capacitor C EQ . As said before a resistor has to be added in series with the inductor to avoid the loop (L C − v 1 ) which impedes simulation starts. Unfortunately, the current across this inductor is not yet at steady-state when the PSpice transient analysis starts, and recalling the standard expression of the current in a resistor-inductor circuit: (35) it is evident that the smaller the resistance the greater the time required to reach a steady state condition. In other words, the use of small resistance provides more accurate results but at the cost of long simulation time. To solve this problem, the initial condition value has to nullify the transient current across the compensation inductor, L C , that is: Given the expression of the current across the inductor at steady-state when R→0, that implies v Lc (t) → v 1 (t) : the initial condition to be set is easily obtained: To nullify the effect of R loop (which is not present in the proposed model), a voltage controlled voltage source (VCVS) is placed in series with the resistor. More specifically, it is controlled by the voltage across the resistor with a gain equal to -1, thus obtaining that the following relation is valid for any resistance value Figure 14: v L C (t) = v 1 (t) (39) To nullify the effect of Rloop (which is not present in the proposed model), a voltage controlled voltage source (VCVS) is placed in series with the resistor. More specifically, it is controlled by the voltage across the resistor with a gain equal to -1, thus obtaining that the following relation is valid for any resistance value Figure 14: Therefore, setting the initial condition equal to zero enables a steady-state current through the inductor when the PSpice transient analysis starts, regardless the value of Rloop. Moreover, nullifying the effect of the resistor enables to obtain a PSpice circuit that actually implements the proposed model. It is worth to noticing that the use of the VCVS without properly setting the initial condition enables to start the simulation but it does not address the underlining issues that lead PSpice to impede the simulation of circuit where a loop with only voltage sources and inductors is present. Finally, it is worth to recall that the steady-state current across the inductor has the same amplitude of the fundamental current flowing through the equivalent capacitor but these currents are in antiphase between them. Then the resulting fundamental current is zero which means, in turn, that the fundamental current flows only in the "fundamental current circuit".
As said before, whether bq1 is positive, a capacitor is used in the "fundamental current circuit", and then the voltage across it is equal to v1 according to the related KVL, then the voltage is also already at steady-state when the PSpice transient analysis starts. On the other hand, when bq1 is negative an inductor has to be adopted and, consequently, a resistor Rloop with the related VCVS has to be adopted and the initial condition has to be properly set (once again it has to be set equal to zero).
The mechanism adopted for these inductors can be readapted when Lk is used instead of Ck. At steady-state the voltage across the inductor is ( Figure 15): Then the steady-state current is: Figure 14. VCCS that nullifies the effect of R loop , thus obtaining a PSpice circuit that actually implements the proposed model. Therefore, setting the initial condition equal to zero enables a steady-state current through the inductor when the PSpice transient analysis starts, regardless the value of R loop . Moreover, nullifying the effect of the resistor enables to obtain a PSpice circuit that actually implements the proposed model. It is worth to noticing that the use of the VCVS without properly setting the initial condition enables to start the simulation but it does not address the underlining issues that lead PSpice to impede the simulation of circuit where a loop with only voltage sources and inductors is present. Finally, it is worth to recall that the steady-state current across the inductor has the same amplitude of the fundamental current flowing through the equivalent capacitor but these currents are in antiphase between them. Then the resulting fundamental current is zero which means, in turn, that the fundamental current flows only in the "fundamental current circuit".
As said before, whether b q1 is positive, a capacitor is used in the "fundamental current circuit", and then the voltage across it is equal to v 1 according to the related KVL, then the voltage is also already at steady-state when the PSpice transient analysis starts. On the other hand, when b q1 is negative an inductor has to be adopted and, consequently, a resistor R loop with the related VCVS has to be adopted and the initial condition has to be properly set (once again it has to be set equal to zero).
The mechanism adopted for these inductors can be readapted when L k is used instead of C k . At steady-state the voltage across the inductor is ( Figure 15): Then the steady-state current is: Consequently, the initial condition to set in order to obtain a zero transient time for the current through the inductor is: The switches in the model (Figure 9) have been emulated in PSpice with "voltage-controlled switch" (VCS) components. On the other hand, the VCS is not an ideal switch as the ones considered in the model. More specifically, a VCS is a resistor with a high resistance, R OFF , when it emulates the open-status while the closed-status is obtained by considering a low resistance, R ON . The VCS resistance is set according the voltage value of the controlling nodes. It is worth noting that, the switch SR1 and SG1 (Figure 9) have to be controlled by the same voltage but with opposite logic since when the former is open the latter is closed, and vice versa. Therefore, to drive these switches, a fictitious constant voltage generator has been considered: and: A similar mechanism can be adopted for the couple of switches SL1-SC1, SCc-SLc, and SLk-SCk.
Regardless the status of a switch, the related resistance does not belong to the proposed model. Hence, similarly to R loop , their effect should be nullified. It is worth noting, that the switch should ideally be a short-circuit when it is closed (that is, R ON should be ideally zero). Therefore, the insertion of a VCVS that nullifies the effect of R ON indeed enables to emulate a short circuit (as shown in Figure 15), thus, once again, the PSpice circuit actually implements the proposed model. On the other hand, R OFF emulates an open-circuit and, consequently, the addition of the VCVS is undesired in such a case. Notwithstanding, as the VCVS nullifies the effect of R ON , dually, a current controlled current source (CCCS) placed in parallel with R OFF enables nullifying its effect, that is, it enables obtaining the desired open circuit. More specifically, it is controlled by the current through the resistor with a gain equal to -1, thus obtaining that the circuit elements downstream from the switch have no effect on the current drawn from the lamp circuit model. through the inductor is: The switches in the model (Figure 9) have been emulated in PSpice with "voltage-controlled switch" (VCS) components. On the other hand, the VCS is not an ideal switch as the ones considered in the model. More specifically, a VCS is a resistor with a high resistance, ROFF, when it emulates the open-status while the closed-status is obtained by considering a low resistance, RON. The VCS resistance is set according the voltage value of the controlling nodes. It is worth noting that, the switch SR1 and SG1 (Figure 9) have to be controlled by the same voltage but with opposite logic since when the former is open the latter is closed, and vice versa. Therefore, to drive these switches, a fictitious constant voltage generator has been considered: and: A similar mechanism can be adopted for the couple of switches SL1-SC1, SCc-SLc, and SLk-SCk.
Regardless the status of a switch, the related resistance does not belong to the proposed model. Hence, similarly to Rloop, their effect should be nullified. It is worth noting, that the switch should ideally be a short-circuit when it is closed (that is, RON should be ideally zero). Therefore, the insertion of a VCVS that nullifies the effect of RON indeed enables to emulate a short circuit (as shown in Figure  15), thus, once again, the PSpice circuit actually implements the proposed model. On the other hand, ROFF emulates an open-circuit and, consequently, the addition of the VCVS is undesired in such a case. Notwithstanding, as the VCVS nullifies the effect of RON, dually, a current controlled current source (CCCS) placed in parallel with ROFF enables nullifying its effect, that is, it enables obtaining the desired open circuit. More specifically, it is controlled by the current through the resistor with a gain equal to -1, thus obtaining that the circuit elements downstream from the switch have no effect on the current drawn from the lamp circuit model.  It is worth to noticing that all voltage and current waveforms have been previously defined in terms of the "cosine" function while PSpice adopts the "sine" function; hence π/2 has been added in all the independent generators used in the PSpice netlist. The phase shift of the harmonics has been accordingly modified accounting for the related frequency.            Figure 16 is the main PSpice circuit of a generic ESL, where "freq" is the fundamental frequency, V1 is the rms of the voltage on the main assumed to be purely sinusoidal and d is the aforesaid parameter used for considering an inductor (d = 1) or a capacitor (d = −1) in each harmonic subcircuit. The switches models "swpos" and "swneg" are used to emulate the complementary operated switches. They are used in combination with the fictitious independent generators Vbp1, Vbq1, and Vd to drive the couple of switches SR1-SG1, SL1-SC1, and SL-SC. Finally, Xp1, Xq1, and Xksim are the instances of, respectively, the active, reactive and harmonics currents, while X1 is the instance of the compensation subcircuit. The parameters ap1, bp1, aq1, bq1, ls, cs, gamma2, a2, b2, and so on, until gamma50, a50, and b50 can be reported in an external file for each lamp and then used with a ".INC" statement. The parameters ls and cs refer to the series in Equation (33). Figure 17 reports the netlist related to the active current, where the nodes 1 and 2 are the local numbering of the lamp terminals (which are node 1 and 0 of the PSpice lamp model as evident from the instance Xp1 in Figure 16); the nodes 3 and 4 are the local numbering of the terminals (which are node 2 and 0 of the PSpice lamp model) of the voltage controlling the switches status; "freq" is the fundamental frequency (50 Hz is the default value); a and b are a P1 and b P1 . Then, the actual nodes numbering as well as the parameter values depend on the calling instance Xp1. SR1 and SG1 are the switches complementary operated to ensure that only one between the resistor, R1, and the VCCS are connected. The following explanation refers to the local numbering.
When b p1 is a positive number the voltage across terminals 3-4 is 1 V, consequently SR1 and SG1 are equivalent to resistors with resistance equal to, respectively, 1 µΩ (that is ron) and 1 GΩ (that is roff ). Moreover, the expression in the curly brackets of the VCVS ER1 is equal to −1, while it is 0 for the CCCS FR1 (it is an open circuit). Consequently, the voltage between nodes 1-6 is equal to 0, which implies a voltage across the resistor equal to the voltage on the mains (nodes 1-2) being also 0, the voltage between nodes 6-7. At the same time, the expression in the curly brackets of the VCCS G1 is equal to 0.
The behaviour of SR1 and SG1 is dual to the previous one when b q1 is a negative number because, in such a case, the voltage across the terminals 3-4 is −1 V. Moreover, the expression in the curly brackets of the CCCS FR1 is equal to −1, while is 0 for the VCVS ER1. Consequently, no current flows through R1 according the Kirchhoff's Current Law (KCL) at node 7. At the same time, the expression in the curly brackets of the VCCS G1 is equal to the value of b p1 . Therefore, only G1 is actually connected in the lamp circuit.
Similar considerations are valid for the other subcircuits. When a switch is closed, the VCVS in series with it presents a gain −1 that ensures the switch is equivalent to a short circuit (in this case the CCCS has gain equal to 0, then it has not any effect). The complementary switch is open, hence, its VCVS presents a gain equal to 0, having no effect, while the CCCS has a gain equal to −1 to ensure the switch behaves like to an open circuit.

Results
The comparison between the measured and simulated current waveforms of different ESLs have been carried out. The results have highlighted the high fidelity level of the proposed PSpice model in emulating the current drawn by the lamps under variable voltage on the mains. In the following the comparison between simulations and measurements have been reported for one CFL and one LED light bulb. Figures 21-24 report the measured voltage on the mains (blue waveform), the measured current (green waveform) and the simulated current (red waveform) for the two lamps when the rms voltage on the mains is, respectively, 212 V and 237 V. These two voltage levels have not been used for obtaining the parameters of the interpolation function, since these measurements have been performed only for model validation. They have been set by means of the variac similarly to the voltage level used for the interpolation functions as described before.
The simulated currents that are reported in the figures have been obtained using the inductors in the harmonic subcircuits (i.e., d = 1). The results confirm that the current is already at steady-state when the transient analysis starts, then the method adopted for the PSpice implementation of the current lamp model is effective. By analyzing the figures, the goodness of the proposed PSpice model is also evident. Moreover, the results shown a slightly better current estimation for the CFL with respect to the LED light bulb when the voltage on the mains is less than the rated one. On the other hand, the predicted current is more accurate for the LED light bulb in case of voltage on the mains exceeding the nominal value. As expected, there was not any difference between the voltage THD during the current measurement (lamp on) and without any load (lamp off). The THD of the voltage on the mains was in the interval 2-4% during the measurements.
been carried out. The results have highlighted the high fidelity level of the proposed PSpice model in emulating the current drawn by the lamps under variable voltage on the mains. In the following the comparison between simulations and measurements have been reported for one CFL and one LED light bulb. Figures 21-24 report the measured voltage on the mains (blue waveform), the measured current (green waveform) and the simulated current (red waveform) for the two lamps when the rms voltage on the mains is, respectively, 212 V and 237 V. These two voltage levels have not been used for obtaining the parameters of the interpolation function, since these measurements have been performed only for model validation. They have been set by means of the variac similarly to the voltage level used for the interpolation functions as described before.
The simulated currents that are reported in the figures have been obtained using the inductors in the harmonic subcircuits (i.e., d = 1). The results confirm that the current is already at steady-state when the transient analysis starts, then the method adopted for the PSpice implementation of the current lamp model is effective. By analyzing the figures, the goodness of the proposed PSpice model is also evident. Moreover, the results shown a slightly better current estimation for the CFL with respect to the LED light bulb when the voltage on the mains is less than the rated one. On the other hand, the predicted current is more accurate for the LED light bulb in case of voltage on the mains exceeding the nominal value. As expected, there was not any difference between the voltage THD during the current measurement (lamp on) and without any load (lamp off). The THD of the voltage on the mains was in the interval 2-4% during the measurements.     The total number of circuit components in the active and reactive current circuit is, respectively, 8 and 11 (Figures 17 and 18). The compensation circuit includes 10 components (Figure 19), while there are 12 components in each harmonic subcircuit ( Figure 20). Therefore, the total number of components of the lamp PSpice circuit is 617 when the current harmonics, until the 50th, are used. On the other hand, a reduced circuit can be obtained using a less general circuit where each switch with the related zero-voltage generator, VCVS, and CCCS are removed together with the elements to be disconnected. In such a case the number of components in the active current circuit is 2. The number of component in the reactive current circuit is also 2 when the capacitor has to be considered (bq1 is positive), while it is 4 when the inductor has to be considered since a resistor, Rloop, and the related VCVS have to be considered. The adoption of only capacitors or only inductors in the harmonic subcircuit reduces its number of component to three in the first case, while five components in the second one are due to the need of the resistor and VCVS. Finally, only the capacitor is adopted in the compensation circuit when the inductors are used in the harmonic subcircuits, while three components are necessary when an inductor has to compensate the equivalent capacitance of the harmonic subcircuits. Therefore, the smallest reduced lamp circuit has 154 components, while 252 components are present in the greatest reduced circuit. It is worth noting that the reduced circuits provide the same current waveform of the one with 617 (full circuit) but each reduced circuit is related only to a given lamp.
Neglecting a current harmonic enables to remove 12 components from the full circuit (three or five in the reduced ones) at the cost of worsening the model accuracy. The error on the current THD The total number of circuit components in the active and reactive current circuit is, respectively, 8 and 11 (Figures 17 and 18). The compensation circuit includes 10 components (Figure 19), while there are 12 components in each harmonic subcircuit ( Figure 20). Therefore, the total number of components of the lamp PSpice circuit is 617 when the current harmonics, until the 50th, are used. On the other hand, a reduced circuit can be obtained using a less general circuit where each switch with the related zero-voltage generator, VCVS, and CCCS are removed together with the elements to be disconnected. In such a case the number of components in the active current circuit is 2. The number of component in the reactive current circuit is also 2 when the capacitor has to be considered (bq1 is positive), while it is 4 when the inductor has to be considered since a resistor, R loop , and the related VCVS have to be considered. The adoption of only capacitors or only inductors in the harmonic subcircuit reduces its number of component to three in the first case, while five components in the second one are due to the need of the resistor and VCVS. Finally, only the capacitor is adopted in the compensation circuit when the inductors are used in the harmonic subcircuits, while three components are necessary when an inductor has to compensate the equivalent capacitance of the harmonic subcircuits. Therefore, the smallest reduced lamp circuit has 154 components, while 252 components are present in the greatest reduced circuit. It is worth noting that the reduced circuits provide the same current waveform of the one with 617 (full circuit) but each reduced circuit is related only to a given lamp.
Neglecting a current harmonic enables to remove 12 components from the full circuit (three or five in the reduced ones) at the cost of worsening the model accuracy. The error on the current THD described before has been used as criterion for choosing the harmonic to be considered. Two levels of maximum THD error have been considered: 1% and 10%. It is worth noticing that each time a group of harmonics is neglected and the related components removed from the PSpice circuit the value of L EQ (or C EQ ) changes, then the resonant (at the fundamental frequency) component in the compensation circuit has to be properly accorded. Figures 25-28 report the measured current (green waveform) and the simulated current involving a THD error of 1% (red waveform) and 10% (blue waveform) for both lamps at the two aforementioned voltage levels adopted for model validation. The harmonics neglected for achieving a given THD error refer to . It is worth noting that the reduced circuit performing a THD error of 1% contains less than 40 components. The electrical components used in the PSpice circuit to obtain the current waveforms involving a THD error of 10% are summarized in Appendix A.
At 212 V, the simulated currents involve about the same accuracy level for both lamps in case of 1% THD error. On the other hand, the comparison of the predicted currents in case of 10% THD error points out that the CFL current is more accurately esteemed. For both lamps and THD errors, the "flat zone" in the measured current waveform is poorly approximated although the CFL current is more accurate. The "hills" in the measured current waveform are well approximated for both lamps in case of 1% THD error, while a poor result is obtained in case of 10% THD error. At 237 V, the simulated currents are more accurate that the other voltage level in case of 1% THD error. In such a case, the simulated waveform of the LED current is more accurate than the. On the other hand, in case of 10% THD error, the "flat zone" in the simulated waveform of the CFL current is better than the LED one, while the LED outperforms the CFL in the "hill" estimation.
Appl. Sci. 2019, 9,152 25 of 32 components used in the PSpice circuit to obtain the current waveforms involving a THD error of 10% are summarized in Appendix A. At 212 V, the simulated currents involve about the same accuracy level for both lamps in case of 1% THD error. On the other hand, the comparison of the predicted currents in case of 10% THD error points out that the CFL current is more accurately esteemed. For both lamps and THD errors, the "flat zone" in the measured current waveform is poorly approximated although the CFL current is more accurate. The "hills" in the measured current waveform are well approximated for both lamps in case of 1% THD error, while a poor result is obtained in case of 10% THD error. At 237 V, the simulated currents are more accurate that the other voltage level in case of 1% THD error. In such a case, the simulated waveform of the LED current is more accurate than the. On the other hand, in case of 10% THD error, the "flat zone" in the simulated waveform of the CFL current is better than the LED one, while the LED outperforms the CFL in the "hill" estimation.

Conclusions
The reduction of the distorted current injected on the mains by energy-saving lamps is necessary, especially in case of large lighting systems or smart lighting systems implementing several functionalities. Optimal lighting system design aiming at harmonics cancellation is the most economical solution, but it needs a tool able to predict the current drawn from each lamp also considering the variation of the voltage on the mains. A parametric PSpice circuit has been proposed to predict the current waveform of any lamp on the market once few measurements are performed. The underlying theory, equations, rules, and procedures, as well as the parametric netlist, have been reported. The key features enabling to overcome the limitations of other circuit models is that the proposed parametric PSpice circuit does not need any information about the lamp driver and components since each lamp is treated as a black box when the lamp parameters have to be computed. A further advantage of the method over previous works is the use of a linear circuit that enables low computational cost and fast simulation. The results have confirmed the high accuracy level of the PSpice circuit in predicting the current waveform even when a reduced circuit is adopted and various harmonics are neglected.
Author Contributions: All authors contributed equally to this work. [A] kth current harmonic ( ) [A] Active current ( ) [A] Reactive current ( ) [A] Current that takes into account the term ( ) [A] Current that takes into account the term Figure 28. LED lamp: measured current (green waveform) and the simulated current involving a THD error of 1% (red waveform) and 10% (blue waveform) with an rms voltage of 237 V.

Conclusions
The reduction of the distorted current injected on the mains by energy-saving lamps is necessary, especially in case of large lighting systems or smart lighting systems implementing several functionalities. Optimal lighting system design aiming at harmonics cancellation is the most economical solution, but it needs a tool able to predict the current drawn from each lamp also considering the variation of the voltage on the mains. A parametric PSpice circuit has been proposed to predict the current waveform of any lamp on the market once few measurements are performed. The underlying theory, equations, rules, and procedures, as well as the parametric netlist, have been reported. The key features enabling to overcome the limitations of other circuit models is that the proposed parametric PSpice circuit does not need any information about the lamp driver and components since each lamp is treated as a black box when the lamp parameters have to be computed. A further advantage of the method over previous works is the use of a linear circuit that enables low computational cost and fast simulation. The results have confirmed the high accuracy level of the PSpice circuit in predicting the current waveform even when a reduced circuit is adopted and various harmonics are neglected.
Author Contributions: All authors contributed equally to this work.
Funding: This research received no external funding.

Conflicts of Interest:
The authors declare no conflict of interest.
Nomenclature v 1 (t) [V] Fundamental frequency of the voltage on the main. i 1 (t) [A] Fundamental frequency of the current drawn by the lamp. i k (t) [A] kth current harmonic i P1 (t) [A] Active current i Q1 (t) [A] Reactive current i aP1 (t) [A] Current that takes into account the term a P1 i bP1 (t) [A] Current that takes into account the term b P1 i aQ1 (t) [A] Current that takes into account the term a Q1 i bQ1 (t) [A] Current that takes into account the term b Q1 i ak (t) [A] Current that takes into account the term a k i bk (t) [A] Current that takes into account the term b k v Fk (t) [V] Fictitious voltage independent generator L EQ − C EQ [Ω] Compensation component R ON − R OFF [Ω] On/Off resistance of a Voltage Controlled Switch a P1 Intercept of the interpolation function of the active current (rms) b P1 Slope of the interpolation function of the active current (rms) a Q1 Intercept of the interpolation function of the reactive current (rms) b Q1 Slope of the interpolation function of the reactive current (rms) a k Intercept of the interpolation function of the current (rms) harmonics b k Slope of the interpolation function of the current (rms) harmonics

Appendix A
The electrical components used in PSpice circuit to obtain some current waveforms reported in the "Results" section are summarized in this appendix. In Table A1 are reported the values of the electrical components of the PSpice circuit of the CFL when it has been considered the 10% THD error, and in Table A2 the LED lamp quantities in the case.