Grating-Assisted Fiber to Chip Coupling for SOI Photonic Circuits

: Fiber to chip coupling is a critical aspect of any integrated photonic circuit. In terms of ease of fabrication as well as wafer-scale testability, surface grating couplers are by far the most preferred scheme of the coupling to integrated circuits. In the past decade, considerable effort has been made for designing efﬁcient grating couplers on Silicon-on-Insulator (SOI) and other allied photonic platforms. Highly efﬁcient grating couplers with sub-dB coupling performance have now been demonstrated. In this article, we review the recent advances made to develop grating coupler designs for a variety of applications on SOI platform. We begin with a basic overview of design methodology involving both shallow etched gratings and the emerging ﬁeld of subwavelength gratings. The feasibility of reducing footprint by way of incorporating compact tapers is also explored. We also discuss novel grating designs like polarization diversity as well as dual band couplers. Lastly, a brief description of various packaging and wafer-scale testing schemes available for ﬁber-chip couplers is elaborated. of the taper. The length z varies from 0 to 1, where 0 is the beginning of the taper (LHS or W min ) corresponding to the width of the initial waveguide and 1 is the end (RHS or W max ) corresponding to the width of the ﬁnal waveguide. The ﬁnal width proﬁle, X = f ( z , a , b , c ) is a superposition of a parabolic baseline and the square of a sine. The coefﬁcient a controls the fraction of the sinusoidal as well as the parabolic component.


Introduction
Silicon photonics platform has emerged as a key driver for building the next generation of low cost on chip optical interconnects. This has been necessitated by an ever increasing need for multichannel high performance computing as well as large capacity data storage servers along with the requirement of low energy per unit bit power consumption. Several groups have now reported significant breakthroughs in demonstrating passive and active silicon (Si) based on chip photonic components [1][2][3][4][5]. Primarily, three reasons are attributed to the preference of Si in integrated optics over other material platforms. The first being SOI architecture, characterized by the high index contrast of silicon compared to its oxide that allows for sub-micron scale single mode wire waveguides. The second being a bandgap that enables wideband transparency window over the communication channel (1.3-1.6 µm). Finally, the availability of a mature silicon complementary metal oxide semiconductor (CMOS) microfabrication infrastructure which not only allows for implementing structures of nanoscale dimensions with high accuracy and repeatability, but also integrates them at a low cost, thereby allowing for large scale commercialization of photonic integrated circuits (PICs).
A major issue facing silicon photonic chips is efficient coupling of light to and from optical fibers. The fundamental fiber mode is Gaussian in shape with a mode field diameter (MFD) of 10-11 µm while the Si single mode waveguide is about 220 × 500 nm in cross section. The huge mismatch ensures that when placed across from each other, only a tiny faction of power can realistically couple. Fiber to chip coupling can be accomplished both in-plane and out of plane ways. The former is typically done through edge coupling by means of an adiabatic spot size converter [6][7][8]. It essentially involves a lensed fiber placed at the end facet of a chip with an inverse tapered Si spot size waveguide embedded in an overlay medium that matches the fiber cross section (see Figure 1). As light propagates through the wire waveguide (which converges to a spot), the mode expands adiabatically in the overlay resulting in a near perfect overlap with the fiber mode at the spot end. Inverse tapers have been found to yield losses as low as -0.36 dB/facet [8]. In addition, edge couplers tend to have a low polarization sensitivity and exhibit a broadband response of 200-300 nm. However, significant technological constraints arise while considering mass market deploying of edge coupling solutions. For one, the end facet has to be properly cleaved, polished and taper spot sizes of about 100 nm are required. Apart from that, only fiber-chip alignment accuracies of micrometer scale are tolerated. This makes wafer level testing and hence cost per chip extremely prohibitive. Another alternative is to employ out-of-plane techniques like surface grating couplers. It involves mounting a fiber vertically over the part of the chip containing grating features. Depending on the phase matching, the gratings will then channel light into the corresponding propagating mode in the Si wire waveguide. The number of grating lines and its lateral width is designed to match the fiber mode cross section. Since fibers can be placed at multiple locations on chip, non contact optical probing at waferscale is feasible, which is a key requirement for packaging low cost photonic circuits. However, the coupling performance of surface couplers is limited in terms of insertion loss as well as operational bandwidth when compared to edge couplers. In this review, we explore various kinds of high performance grating couplers that have been demonstrated on SOI, their design considerations and state of art. In addition, a brief overview of fiber to chip coupler device packaging solutions and wafer-scale testing from an industry perspective is provided. Figure 1. Schematic of edge coupler using inverse-tapers. The fundamental Gaussian mode in lensed fiber with a mode field diameter (MFD) of 3 µm roughly matches the size of the fundamental waveguide mode at the cleaved end of the overlay region.

Coupling through Gratings: Theory and Fundamentals
Photonic single mode waveguides are usually high index regions structured to support orthogonally polarized guided fundamental modes. There is consequently a considerable mismatch between the propagating vectors of light arriving from a low index cladding and that of a guided mode in a planar waveguide. This mismatch can be compensated by wave of a grating.
Basically a grating is a periodic corrugation of high and low refractive index regions. The corrugation can either be by material or structural means. On a photonic chip, grating lines are implemented through etching of high index region. Figure 2a illustrates a typical fiber-chip surface grating coupler on SOI. The situation is better depicted by the k-space diagram in Figure 2b. The phase matching criteria for coupling from free space to guided modes is expressed as [9]: Here β is the waveguide propagating vector corresponding to an effective grating index n g , G is the reciprocal lattice corresponding to grating period Λ, k f r is the free space propagating vector in the either the upper cladding superstrate of refractive index n sup or the lower cladding substrate of index n sub , θ is the off axis fiber tilt angle and m is the diffraction order. Although phase matching allows for perfectly vertical coupling, this configuration can lead to a strong second order diffraction while exciting propagating mode from waveguide. Hence, fiber is always positioned with a slight tilt to the normal. Depending on fulfilling the above Bragg condition, light is diffracted to one of the guided waveguide modes. The phase matching equation for first order diffraction to either top or bottom cladding is simplified to obtain the grating period: where λ f r is the free space wavelength. The average effective grating index n e f f g of the fundamental propagating mode can be expressed as: where n condition. k f r n sup corresponds propagation constant of superstrate and k f r n sub of substrate and G is the grating reciprocal lattice.

Factors Affecting Grating Loss
Any propagating mode while encountering a grating coupler exhibits four principal loss mechanisms which is illustrated in Figure 3. Accordingly the power incident P inc is expressed as: where P clad denotes the diffracted power to top cladding, P sub the substrate leakage. P re f l and P tr denote the back reflection and the power transmitted through grating respectively. For a uniform grating, the scattered field exhibits an exponentially decaying profile. If we assume α to be the scattered field decaying coefficient, grating power leakage to cladding can be expressed as P clad = P 0 e −2αx . The coupling efficiency is expressed as P CE = ηP clad , where η is the mode field overlap between the diffracted grating field and the Gaussian fiber mode, which is theoretically limited to 80%. From above, it is clear that both P clad and η have to be maximized in order to boost overall coupling performance.

Directionality
The term P clad also symbolises the device directionality. On a commercial SOI, the buried oxide (BOX) thickness is optimized to reflect part of power from substrate back to waveguiding layer. However, even then, a substantial portion of power amounting to 25-30% is leaked to the substrate in a generic uniform grating coupler. We discuss the two principal ways that have been proposed to address this leakage.
One way to improve directionality is to insert a highly reflective bottom mirror in the buried oxide layer at an optimum thickness. The mirror can either be a stack of distributed Bragg reflector (DBR) consisting of alternating high and low index films or a metal layer. Part of the light leaking to substrate will be reflected back by the mirror and interfere constructively with the upper cladding diffracted light thereby substantially improving directionality. Such bottom reflectors have been shown to improve coupling performance of uniform gratings to as high as -1.6 dB [10,11]. Furthermore, it is possible to design sub -1 dB uniform grating couplers with bottom reflectors. This is due to the emission field profile from a uniform grating perhaps not being perfectly exponential, thus a slightly higher than expected overlap with the Gaussian fiber mode is feasible [12,13]. However, it may be noted that incorporation of such reflectors on SOI is challenging as it involves complex processing steps like flip chip bonding [10] or backside metallization [14]. Another way to plug the substrate leakage is by way of overlay gratings. Essentially this involves the addition of an overlay region above the high index part of grating. The overlay thickness, grating period and etch depth is optimized in order to induce an additional π phase difference among the fields diffracted towards superstrate. This in turn causes constructive interference among the diffracted fields and hence maximises the directionality. The overlay layer can be of any material as long as the required phase change is induced. In [15], a polysilicon overlay based grating coupler was demonstrated with a -1.6 dB coupling efficiency. Use of such overlays eliminates the need for any bottom reflector and thus, simplifies processing. Figure 4a,b provide a schematic representation of the two approaches described above to improve directionality. A two dimensional (2-D) finite difference time domain (FDTD) simulation of the diffracted field intensity shows the directionality of the filed between Si-substrate, Bragg mirror, and Si overlays is showcased in Figure 4c. As described above, addition of a bottom mirror or an overlay increases directionality and coupling efficiency.

Mode Overlap
The other principal source of loss in a generic uniform surface grating is that of mode mismatch between the fundamental fiber mode and that of diffracted grating field. The fiber mode is Gaussian while a uniform grating has an exponentially decaying power profile. It can be seen that coupled power P CE depends on η [16] which is expressed as S |E gr × H * f ib dS| 2 , where E gr is the grating field and H f ib is the fiber mode field and S corresponds to the surface of the fiber facet. The field overlap can be improved through implementing non-uniform grating couplers by way of apodization of individual grating scatterers. The power leakage profile of a uniform grating is expressed as: where α is the scattered field leakage coefficient described previously and is constant for a uniform grating and x is the propagation direction. For an apodized grating, the radiated field resembles a Gaussian, so the power leakage can be expressed as: where G(x) corresponds to the Gaussian distribution of the emitted field. Integrating this equation we obtain: Now substituting the variable power leakage dP(x)/dx in Equation (7) with the one in Equation (6) and assuming the field leakage parameter α as a function of x, we obtain: (9) and now substituting value of P(x) in Equation (9) with the one derived in Equation (8), we obtain: where C 0 is a constant related to the electric field strength at the start of grating. This variation of power leakage of individual grating elements can be accomplished by modulation of fill factor or periodicity along propagating direction (as illustrated in Figure 5). On shallow etched platform, non-uniform grating couplers with coupling loss of -0.62 dB [13] and -1.9 dB [17] have been shown with and without bottom mirrors respectively. The choice of fiber tilt angle of illumination θ, is highly design and application specific. It is possible to have very high efficiency non-uniform couplers with both shallow [18] as well as deep angles of incidence [19]. It may be pointed out that, for non-uniform designs, the modulation of individual grating strength results in a higher effective grating index than uniform couplers. This results in non-uniform couplers having a reduced optical bandwidth of operation when compared to the latter. Furthermore, an optimal apodized non-uniform grating design may require feature sizes ranging from a few tens to a few hundreds of nm in dimension. The coupler design thus may be limited by the patterning processes such as electron beam or deep UV lithography.

Bandwidth Scaling
Another vital figure of merit is the grating bandwidth. Since coupling through grating depends on fulfilling the Bragg condition, only a limited band of wavelengths are scattered to fiber. The diffracted field of a uniform grating has a wider angle of distribution owing to its short length and hence has a larger bandwidth compared to non-uniform gratings. Bandwidth can be enhanced by reducing effective grating length, which will widen the spectral distribution but it would be at the cost of a reduced overall coupling efficiency. The intrinsic 1dB bandwidth of a generic grating coupler can be expressed as [20], where η 1dB is a fiber dependent coefficient, θ the incidence angle and dn e f f dλ corresponds to the waveguide dispersion and n c is the cladding index. A suitable solution to increase bandwidth would be to decrease the effective grating index n e f f g (Equation (3)). For shallow etched gratings, n e f f g can be decreased by increasing the etch depth. This would however result in large grating reflection. An alternative way to tailor n e f f g can be through replacing the shallow etched feature by a subwavelength grating which we shall discuss in the next section.

Subwavelength Gratings
In recent years, a new class of grating couplers based on subwavelength structures have emerged. Basically, a subwavelength grating (SWG) is a periodically interleaved structure composed of low and high index materials which due to its subwavelength dimension and depending on incident polarization, behaves like a homogeneous medium. Although the concept of subwavelength structures behaving as homogeneous media was known for some time, it has only recently found wide ranging applications in silicon photonics. This is primarily due to the technological advances in various lithographic processes that allow patterning of subwavelength geometries with a relatively high level of accuracy and repeatability [21]. Use of SWG structures allows for artificial engineering of a wide range of optical indices from high contrasting materials. SWG based structures have also been demonstrated for various other integrated applications like grating polarizers, multimode interference splitters and ring resonators [22,23].
When it comes to surface grating couplers, a major drawback of shallow etched designs is the difficulty in tuning grating effective index (as observed from Equation (11)) which demands critical control over etch depth. SWG based couplers, however, allow for greater flexibility in design, since the structures are fully etched and waveguide index depends only on the subwavelength period and fill factor.
As per the zeroth order approximation [24], the refractive index of the composite medium consisting of Si and air for transverse electric (TE) and transverse magnetic (TM) polarizations is expressed as: where Λ y and f y are the lateral subwavelength periods and fill factors respectively. When the ratio P = n TE/TM e f f Λ y /λ 0 (n TE/TM e f f being the effective TE or TM slab mode index) approaches 1, the second order approximation of effective medium theory is considered.
n TE e f f 2 n TE 0 n air n Si n TM e f f n TM Figure 6a,b, illustrate the cross sections of a typical SWG composed of Si and air, where the olive green regions signify the subwavelength trenches. Using the above equations, the polarization dependent subwavelength indices for Si and air are plotted in Figure 6c.
Depending on the requirement of enhanced coupling or bandwidth, different kinds of SWG based couplers (either uniform or non-uniform) can be fabricated (as shown in Figure 7). As mentioned earlier in the case of shallow etched couplers, ideal coupling performance is achieved with a combination of high directionality as well as mode overlap. This was demonstrated in [25] where researchers achieved a coupling loss of only -0.58 dB using SWG with an aluminium mirror and measured a 3 dB bandwidth of 71 nm (see Figure 8). Table 1 summarizes the state of art of different kinds of experimentally demonstrated SOI based fiber to chip grating couplers.

Lowering Footprint
There is a significant lateral mismatch between a surface grating coupler patch which is a multimode waveguide about 10-11 µm wide and that of a single mode Si waveguide (about 500 nm wide). The simplest way of addressing this mismatch is by way of incorporating an adiabatic linear taper between the grating patch and the wire waveguide. However, near perfect mode conversion would entail a taper of 700 µm length that would significantly increase device footprint. In the following section we shall discuss two ways of addressing the footprint problem i.e., by using either focusing gratings or compact tapers.

Focusing Gratings
One way to reduce the tapering footprint is by incorporating focusing gratings [32]. This approach involves curving the individual grating lines in order to achieve in-plane focusing of incident plain wavefront to a single spot. Each of these grating lines behaves as a series of confocal ellipses where one of the two focal points varies with the grating number and the other point is fixed. The fixed point is typically at the starting of a wire waveguide. Focusing grating lines can be defined by modifying the phase matching condition in Equation (2) as: where x is the propagation and y, is the lateral axis (see Figure 9a) and n c is the cladding index. p corresponds to the number of grating line. The above expression is valid when n g is approximated to the fundamental effective slab mode index which may not be feasible for a deep etch. For that reason a further optimization using 3-D simulations or a design sweep of gratings with different focal lengths and periods is required. Several photonic design kits (PDKs) are now available for making design layouts for fabrication of integrated photonic components such as IPKISS and OptoDesigner (from PhoeniX). We have designed the focusing gratings using IPKISS which is a python based design tool from Luceda Photonics Inc. Figure 9 shows some of the fabricated focusing gratings. The simulated and measured coupling efficiencies for TE and TM gratings are plotted in Figure 10. For TE gratings, peak simulated fiber to chip coupling efficiency is -3.12 dB at 1.562 µm with a 3 dB bandwidth of 75 nm at 640 nm period, 50% fill factor and 15 • inclination angle. The experimentally observed peak efficiency for the same parameters with focusing gratings is -3. It is now clear that incorporation of focusing gratings has considerably reduced footprint without any significant impact on coupling performance in terms of insertion loss or bandwidth. In the next section, we discuss a newly established means of low footprint grating coupling by way of compact tapers.

Linear Grating Based Compact Tapers
Although focusing gratings are efficient, they require accurate alignment of the fiber tip and are fabrication intolerant. Linear Gratings along with adiabatic/non-adiabatic tapers are therefore preferable to couple light in photonic devices. When considering high-density circuit, it is indispensable to reduce the footprint of these tapers. Since the taper length depends predominantly on the starting and ending waveguide width and effective index, the transition between a grating coupler and a single-mode photonic waveguide in any material platform is one of the largest [33][34][35][36][37]. Thus, it is extremely advantageous to have non-adiabatic tapers along with linear GCs for a compact spot-size converter. Adiabatic tapers from waveguide to fiber dimensions have been proposed to enhance coupling efficiencies but are very long (mm) and usually suffer from strong back reflections. A taper 5.5 µm long based on high refractive index materials has been shown but its fabrication is cumbersome and requires several steps [36]. Edge coupling based inverse tapers to enhance the mode size of the waveguide through evanescent field coupling have also been designed with low loss and broadband operation but they are disadvantaged by back reflections and long lengths [37]. Almeida et al. have proposed a short taper (40 µm) for compact mode conversion with mode mismatch loss of -0.26 dB and back reflection less than -48 dB, which require a very high precision fabrication for realization of the nano-sized tip [6]. A robust fabrication based on SWG edge couplers have also been shown with coupling loss of -0.9 dB [38]. However, edge couplers, as mentioned before, can only be placed near the chip facets and hence requires precise chip arrangement and cannot be used to test individual devices on the wafer. Several designs of linear grating-based adiabatic tapers involving linear [39], exponential [40] and parabolic [41] profiles have shown. However, there is a tradeoff between the taper length and coupling efficiency due to the adiabatic transition [42]. A complex non-adiabatic taper 15.4 µm long using multimode interference (efficiency 70%) [43] and lens-assisted focusing tapers with lengths varying from 10 to 20 µm with a loss of about -1 dB for TE and -5 dB for TM mode [44] have been demonstrated. Discontinuous tapers with 90% efficiency for the fundamental quasi-TM mode [45] have been theoretically shown. However, the proposed structures are either difficult to fabricate, or suffer from low efficiencies and larger footprints. Recently, a novel design of large bandwidth, fabrication tolerant, CMOS-compatible and non-adiabatic compact tapers have been proposed and experimentally demonstrated in SOI (wire and ridge configuration) as well as Silicon Nitride platform [46][47][48]. These tapers along with linear gratings for spot-size conversion exhibits no degradation in the coupling efficiency compared to a standard focusing grating in 1.55 µm band. Table 2 shows the comparison of various adiabatic and non-adiabatic tapers in SOI platform.
The SEM image of the taper structure along with linear shallow-etched diffractive waveguide grating couplers is shown in Figure 11. Unlike an adiabatic taper, the compact taper works on multi-mode interference along the length of the taper. The length and width of the taper are optimized to obtain interference progressively between the resonance modes along the taper resulting in maximum coupling to the fundamental waveguide mode. The proposed taper structure to connect a broad waveguide section to a submicron waveguide section is defined using an interpolation formula, here a lies between 0 to 1, b lies between −1 to 1, c is any odd integer ≥3 (c = 1 creates the trivial case of half a sinusoidal oscillation). This formula meets the following boundary conditions: X(z = 0) = 0 and X(z = 1) = 1 where z is the relative length of the taper. The length z varies from 0 to 1, where 0 is the beginning of the taper (LHS or W min ) corresponding to the width of the initial waveguide and 1 is the end (RHS or W max ) corresponding to the width of the final waveguide. The final width profile, a, b, c) is a superposition of a parabolic baseline and the square of a sine. The coefficient a controls the fraction of the sinusoidal as well as the parabolic component.  For case (i) a = 0, the sinusoids are at maximum amplitude, and the entirety of the taper is determined by the sinusoidal part of the function. For case (ii) a = 1, the sinusoidal component of the tapers is eliminated, and the taper follows a simple quadratic (or linear) change in width. The parameter b controls the parabolic curvature of the baseline: case (i) b = 1, a convex parabola is obtained, case (ii) b = −1, a concave parabola is obtained, and case (iii) b = 0, a simple linear taper is obtained. Finally, c controls the number of full oscillations of the sinusoidal component part of the taper. The restriction of c (odd integers) is due to the boundary conditions that must be met at both ends of the taper's interpolation formula. All the three design parameters allow one to design an appropriate taper profile for maximum transmission between the waveguides. Thus, to summarize, a controls the amplitude of oscillations and thereby is the most critical parameter; c dictates the oscillations but is limited to 2-3 discrete values. b which controls the parabolic baseline needs to be tweaked for fine-tuning the optimal response. Figure 12a illustrates the effect of the three design parameters a, b and c on the taper profile and Figure 12b shows the optimized compact taper's optical intensity profile and the evolution of modes along the length (L) of the compact taper (14.5 µm) for SOI Platform [46,47]. The transmission with variation in waveguide width is shown in Figure 13a,b for C, L and O band. Figure 13c shows the total taper width variation for various values of b variable on SOI ridge configuration. Figure 13d,e shows the experimental results of the compact taper performance and evidently, they yield the same coupling efficiency as the adiabatic taper. The insertion loss per coupler is -5.45 dB and -6.1 dB for grating coupler with compact taper and adiabatic taper respectively. Figure 13f compares the alignment tolerance of the focusing and linear grating coupler where one of the fibers is aligned from the optimum position and the change in efficiency is measured.

Polarization Splitting Grating Couplers (PSGC)
SOI based gratings couplers are strongly polarization selective. The Si wire waveguide due to its high index contrast renders a considerable difference between effective indices of orthogonal TE and TM modes. This implies that amount of light coupled to waveguide depends on the input fiber polarization which constantly changes due to polarization mode dispersion (PMD). One way to reduce this dependence is by designing a polarization splitting grating coupler (PSGC). Such a grating can be designed with both 1-D and 2-D orientations. In case of the former, the phase matching condition of Equation (2) is applied in a way so as to couple TE modes to m = 1 order diffraction and TM modes to m = −1 order diffraction [49]. The matching leads to a common fiber tilt angle at which a single grating coupler can contra-directionally couple the two orthogonally polarized modes as depicted in Figure 14a,b. In [50], Zaoui et al. have demonstrated such a grating coupler on SOI with a bottom reflector where TE and TM polarizations exhibited an efficiency of -2 and -2.3 dB respectively with the polarization extinction ratio better than -25 dB (see Figure 14c). Even though splitting is achieved, the 1-D PSGC is highly polarization dependent and would also occupy enormous chip-estate due to the need for adiabatic tapering. Another alternative approach for achieving polarization splitting is by implementing a 2-D surface grating. Such a grating is formed by superposing two 1-D surface gratings orthogonally. The superposition creates an array of scattering elements formed by the intersection of the two gratings. The grating would decouple the incoming elliptically polarized light into its constituent linear components along orthogonally placed waveguides. Depending on whether the electric field orientation is perpendicular or parallel to the propagation axis, power is coupled into the fundamental TE or TM mode in either or both of the orthogonal waveguides, however the sum of total power coupled from fiber to the two waveguides remains almost constant in each case, making the 2D grating polarization invariant. Unlike the case of 1-D gratings, the fiber is tilted at 45 • along the bisector axis of the superposed gratings in order to break symmetry. In this kind of splitting, both adiabatic tapering [51,52] as well as focusing grating schemes [53,54] were demonstrated. In the case of the latter, the scatterers lie along the intersection points of two families of orthogonally oriented confocal ellipses (see Figure 15). The fiber projection along bisector axis would then be an additional factor to be incorporated in the eccentricity of ellipses defined by the phase matching condition of Equation (16) as: The common focal points of this confocal family of ellipses lie along the co-ordinates defining the corresponding waveguide entrances. In this configuration, combined power coupled into the two waveguide arms is independent of the input polarization. An important performance metric of PSGCs is the polarization dependent loss (PDL) [55]. Perfectly vertical coupling ensures total decoupling of input orthogonal polarizations, although at the cost of enhanced second order back reflection. However, PDL is always expected for near vertical coupling due to orthogonal polarizations not experiencing the same grating. PDL can be reduced by inducing π phase shift in one arm of the polarization splitter [56]. This would bring in-phase modes that are excited in the two orthogonal arms of the 2D splitter, which were initially out of phase due to the fiber tilt of one of the polarization states. Another way to reduce PDL as suggested in [54] is by using more complex diamond shaped scatterers for gratings. Table 3 summarizes the various kinds of SOI based experimentally demonstrated PSGCs.

Dual Band Grating Couplers
Due to their diffractive nature, surface gratings are inherently bandwidth limited. Typically, a generic grating coupler exhibits 3 dB optical bandwidth of more or less 60 nm. This would be insufficient for applications requiring a wide band operation. One such application envisaged is fiber to the home networks (FTTH), where upstream signals are channelled through O-band and downstream signals through C-band. A single on-chip grating that simultaneously couples and splits both of these bands would significantly reduce both cost and footprint of an optical transceiver.
As observed in the case of polarization splitting couplers, the Bragg condition for gratings can be tailored to couple two distinct bands. The analogy used here is similar to the 1-D and 2-D PSGCs described above except that instead of polarization, it is the corresponding wavelength determining the phase matching criteria. A 1-D dual band single polarization duplexer was proposed in [57] with polysilicon overlays (see Figure 16). In this case, a 1-D grating with 520 nm period at an identical inclination angle of 14.3 • diffracts 1.31 µm to m = 1 order and 1.49 µm to m = −1 order. The calculated theoretical coupling efficiency was estimated to be -2.5 dB for both 1.31 and 1.49 µm wavelengths with a 3 dB bandwidth of 55 nm in each band. A 2-D variant of polarization splitting focusing dual band grating coupler was demonstrated in [58]. Here two focusing gratings are overlapped to produce scatters that couple into orthogonally placed waveguides similar to the polarization splitting configuration described above. Except in this case, cross mode phase matching using Equation (18) ensures that the device co-directionally couples fundamental TE mode of C-band and the corresponding TM mode of O-band into either waveguides. This would imply that, the sum of power coupled to corresponding fundamental mode in both arms of the orthogonally placed waveguides is invariant of the incoming polarizations of either band. The experimental results of this 2-D design are plotted in Figure 17b. Table 4 summarizes the few experimentally demonstrated dual band couplers on SOI.

Packaging and Testing
For silicon based PICs, the route from proof of concept design to a commercially viable prototype is incomplete without a robust packaging platform. Most developments in silicon photonics is centered around research and development, although emphasis on packaging and assembly is steadily gaining importance. If the full potential of silicon photonics is to be realized, it is essential to incorporate durable, low cost and high volume packaging solutions. Compared to electronic prototypes, packaging photonic chips demands much higher alignment accuracies, thermal management and integration of a host of complex active and passive optical elements [61]. As elaborated before, the main challenge associated with packaging of PICs is the large size mismatch between the fiber core and a single mode SOI waveguide. Typically both edge coupling and grating based packaging solutions have been available with the former already emerging as an industry standard for III-V device integration. Packaging of edge coupling schemes can be accomplished through fiber pigtailing at the input and out waveguide facets through laser welding of lensed fibers mounted on a metallic ferrule. However, owing to tight alignment requirements (0.5 µm 1 dB power penalty) and complex post processing steps of polishing, cleaving and dicing, edge coupler packages are only being offered with single fiber mounts. Edge coupling is primarily preferred by research groups working on high power, broadband applications such as nonlinear signal processing. Having said that, recently a new in-plane technique based on evanescent coupling has been demonstrated by IBM Zurich in which optical mode from SOI PIC initially couples evanescently to a second chip with a polymer waveguide before being transmitted to the output fiber port [62]. This scheme promises edge-coupler like performance with much more relaxed alignment and processing requirements.
Consequently, most fiber-chip packaging services for SOI platform are offered via grating couplers. Grating couplers have much a better alignment tolerance amounting to ±2.5 µm 1 dB power penalty and a CMOS compatible planar processing that is suitable for high volume manufacturing and wafer-scale testing. Commercial packaging service ePIXpack offers multiport fiber array connector of up to 32 ports [63][64][65]. The fibers are mounted vertically on a v-groove bottom with a glass lid that is polished at near normal coupling angle to the SOI chip, along with a glob-top encapsulation (see Figure 18a). Post packaging, fiber to grating coupling efficiencies of up to 30% has been reported in this technique. Vertical based mount packaging can be fragile and faces mechanical stability issues. To address this, a new kind of quasi-planar packaging approach using angle-polished fibers has recently emerged [66][67][68]. In this approach, propagating light in fiber core undergoes total internal reflection (TIR) at the core cladding interface at the polished fiber facet leading to near-normal incidence at the grating on SOI chip placed in the base. This packaging scheme has been demonstrated to yield a peak fiber to chip coupling efficiency of up to -4.5 dB [67]. Angle polished fiber packaging service is currently offered by ePIXfab (see Figure 18b). The design incorporates use of input and output shunt waveguides which need only a single active alignment for a fiber array.
Broadly speaking, packaging can be done using both an active and passive alignment process [69]. In active alignment scheme, coupling from fiber to chip is constantly monitored as a function of fiber freespace position with the help of a source and a detector for precise alignment. However, this considerably increases cost and cycle time and presents a significant impediment to adapting for mass manufacturing. Conversely, vision based passive alignment packaging can be implemented where the fiber core and grating images are aligned before being bought into contact. Such passive alignment schemes can be implemented on both planar and vertical coupling and is faster, cost effective and provides for sub-micrometer alignment accuracies.
Like packaging, wafers-scale assembly and testing also form an integral part of the product cycle. In electronics foundries, most chips on a wafer are tested on probe stations before being diced and packaged. Although grating couplers enable non-contact based optical probing, a precise control over fiber-device positioning is a prerequisite. Luxtera offers a grating coupler enabled wafer scale test platform with active alignment [54]. The system consists of a probe with a single mode fiber array connected to a tunable laser source and detector. The total measurement time per passive device is 30 s which includes a 4 s active alignment of fiber over device is performed via piezoelectric stage motors which enable a positioning accuracy of 1 µm. Such wafer probing scans enable a statistical analysis of devices comprised of similar design in different regions of the wafer. This in turn helps in identifying the good and bad dies, which is critical for rationalizing cost per device.
(a) (b) Figure 18. Two prominent fiber-chip packaging schemes. (a) Vertically mounted rigid fiber array coupling from g-pack, a packaging service offered by ePIXpack ( image reprinted with permission from [65]). (b) Multiarrayed fiber packaging with quasi-planar coupler at input and output ends of a photonic integrated circuit (Image courtesy of Tyndall National Institute).

Conclusions
In summary, we review the recent advances on SOI based surface grating couplers. To date, grating couplers have proven to be the most versatile way of ensuring on-chip fiber coupling; they are compatible with both CMOS fabrication and large scale assembly and testing. Although still lagging in coupling performance compared to in-plane edge couplers, newer non-uniform designs based on both shallow-etched as well as subwavelength gratings, promise to bridge this divide at least in terms of efficiency, if not bandwidth. Moreover, emerging concepts like compact tapers paves the way for a significantly reduced footprint with much more relaxed fabrication constraints. A grating based approach to fiber-chip coupling offers numerous benefits such as compatibility with planar processing and facilitating wafer-scale testing and assembly. In addition, the relaxed fabrication and alignment tolerances of gratings couplers could offer low-cost packaging solutions.
Author Contributions: S.K.S. conceived, devised and supervised the manuscript preparation; S.N. designed, fabricated, performed experiments and analyzed data on subwavelength and focusing gratings; P.S. designed, fabricated, performed experiments and analyzed data on linear grating based compact tapers; S.N. and P.S. performed numerical modelling and simulations; S.N. and P.S. wrote the manuscript in consultation with S.K.S.
Funding: This research was in part funded by DRDO, MeitY and DST Nano Mission. P.S. would like to acknowledge N-PDF fellowship from DST-SERB.
Acknowledgments: Use of the following facilities at CeNSE; National nanofabrication center (NNFc) and Micro and nano characterization facility (MNCF) is acknowledged. The authors would like to acknowledge assistance of Hemalatha M. and Rakshitha K. in carrying out some of the device fabrication and characterization.

Conflicts of Interest:
The authors declare no conflict of interest.

Abbreviations
The following abbreviations are used in this manuscript:

SOI
Silicon-on-Insulator DBR distributed Bragg reflector PSGC polarization splitting grating coupler PDL polarization dependent loss TE transverse electric TM transverse magnetic SWG subwavelength grating