Bias Stability Enhancement in Thin-Film Transistor with a Solution-Processed ZrO 2 Dielectric as Gate Insulator

In this paper, a high-k metal-oxide film (ZrO2) was successfully prepared by a solution-phase method, and whose physical properties were measured by X-ray diffraction (XRD), X-ray reflectivity (XRR) and atomic force microscopy (AFM). Furthermore, indium–gallium–zinc oxide thin-film transistors (IGZO-TFTs) with high-k ZrO2 dielectric layers were demonstrated, and the electrical performance and bias stability were investigated in detail. By spin-coating 0.3 M precursor six times, a dense ZrO2 film, with smoother surface and fewer defects, was fabricated. The TFT devices with optimal ZrO2 dielectric exhibit a saturation mobility up to 12.7 cm2 V−1 s−1, and an on/off ratio as high as 7.6 × 105. The offset of the threshold voltage was less than 0.6 V under positive and negative bias stress for 3600 s.


Introduction
Due to their high mobility, good transparency to visible light, good uniformity and reasonable electrical stability, metal-oxide thin-film transistors (TFTs) have attracted great attention in the field of active matrix devices such as liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs) [1][2][3][4].The gate dielectric plays an important role in TFTs because it manipulates the conductance of the semiconducting channel by accumulating charge carriers.Moreover, its electrical insulation to minimize a leakage current is another critical requirement for minimal static dissipation [5], which simultaneously affects the transfer performance and the stability and lifetime of TFT devices.
Recently, considerable efforts have been devoted to fabricating metal-oxide-based TFTs with high dielectric constant (high-k) gate dielectrics.High-k dielectrics can increase the capacitive coupling between the gate and the active channel layer, which not only increases the driving current, but also reduces the operating voltage.Moreover, high-k materials are highly desirable for improving the electrical performance, reducing the size of the device, as well as reducing energy consumption [6].Nowadays, a number of high-k metal-oxide dielectrics (such as Al 2 O 3 [7], ZrO 2 [8], HfO 2 [9], TiO 2 , Y 2 O 3 [10], Ta 2 O 5 and CeO 2 ) have been widely studied and used as an alternative to conventional SiO 2 dielectric layers (k = 3.9) with low leakage current density.Among these gate oxides, zirconium oxide (ZrO 2 ) is one of the attractive materials because of its excellent physical properties, for example, high dielectric constant (23-29), good thermal stability, wide band gap (5-7 eV), and large transparency in the visible and infrared ranges [11,12].
Various vacuum preparation technologies (such as sputter deposition) have been used to prepare metal-oxide films.However, these methods require high-vacuum conditions and a photolithography patterning process that leads to high costs and cumbersome fabrication procedures [2,5,13,14].To overcome these problems, alternative film-deposition methods have been proposed [15].The solution-phase processes (such as spin-coating, spray-coating and ink-jet printing) possess many advantages of scalability, roll-to-roll manufacturing and low-cost fabrication processability.For instance, solution-processed ZrO 2 films has attracted much interest, since they have the advantages of low cost, easy chemical composition control and compatibility for large-scale roll-to-roll production [16].Gong et al. [17] fabricated high-quality ZrO 2 films by a combination of a solution-phase process and ultraviolet (UV) irradiation.The ZrO 2 films with 1 h UV curing showed a leakage current of 1.7 × 10 −6 A/cm 2 at −3 V, a bandgap of 6.13 eV, and a high dielectric constant of 17.8.Naik et al. [18] reported on solution-processed bottom-gate, bottom-contact indium-zinc-tin oxide (IZTO) TFTs with a mobility of >2 cm 2 V −1 s −1 .The solution-processed ZrO x film, with a thickness of 40 nm, showed a leakage current less than 10 −10 A/µm.However, solution-processed TFTs suffer from severe bias-stress instability for device operation because of inherently rich and undefined defect states, such as pores and organic impurities [19].For instance, Kim et al. [20] fabricated a zinc-tin oxide (ZTO)/indium-gallium-zinc oxide (IGZO) dual-active-layered ZTO/IGZO TFT (DALZI TFT) and an unpassivated IGZO TFT, which exhibited voltage shifts of −1.86 V and −19.59 V, respectively, under negative bias illumination stress conditions (stress time = 1000 s). Lee et al. [21] reported on an IGZO TFT with a solution-processed Al 2 O 3 gate dielectric, and the threshold voltage shift of the IGZO TFT was +3.66 V under a gate bias of +20 V for 3600 s.Some methods, such as increasing annealing temperature or using a UV/ozone treatment, have been used to solve this problem [22][23][24].Liu et al. [23] reported an In 2 O 3 thin-film transistor using a solution-processed ZrO 2 dielectric.The ZrO 2 film, with a leakage current density of 10 −9 A/cm 2 at 2 MV/cm, was processed by a UV/ozone treatment and annealed at 500 • C. The threshold voltage shift was 0.22 V for In 2 O 3 TFTs under PBS with a V GS value of 1.5 V for 7200 s.Solution-processed amorphous indium-zinc-tin oxide (a-IZTO) thin-film transistors (TFTs) with spin-coated zirconium oxide (ZrO x ) as the gate insulator were presented by Naik et al. [18].The ZrO x gate insulator was processed without and with UV/O 3 treatment.The threshold voltage shift was 1.13 V for the untreated ZrO x -based TFT and was 0.64 V for the UV/O 3 -treated ZrO x -based TFTs.Ha et al. [24] reported on a solution-processed zinc-tin-oxide (ZTO)/ZrO 2 TFT with a 90-nm-thick ZrO2 dielectric annealed at 500 • C for 1 h.The TFT exhibited very small hysteresis windows in both dark and illuminated conditions, and the shift in V th was 0.4 V of negative bias-stress under illumination over 5000 s.
In this paper, solution-processed ZrO 2 dielectric films were demonstrated at a deposition temperature of 400 • C. The electrical properties of ZrO 2 films were characterized by using metal-insulator-metal (MIM) structures, and the physical properties were measured by X-ray diffraction (XRD), X-ray reflectivity (XRR) and atomic force microscopy (AFM).IGZO-TFTs with solution-processed ZrO 2 dielectrics were fabricated on glass substrates.By decreasing the precursor concentration and increasing the spin-coating times, an optimal thickness of ZrO 2 film was achieved, which showed a smooth surface and reduced internal defects.Consequently, the resulting TFT devices had not only good electrical properties but also improved bias stability.When under positive bias and negative bias stress over 3600 s, the offset of threshold voltage was less than 0.6 V. Compared with the previous reports of other groups, our work proposes a simple and feasible way to reduce the defect state of the insulating thin films without a special thermal annealing process such as UV treatment.Therefore, it will help improve the bias stability of TFTs and promote the development of solution-method TFTs in practical applications.

Preparation of ZrO 2 Film
ZrO 2 solution was synthesized by dissolving ZrCl 2 O•8H 2 O (Richjoint, Shanghai, China) in a 2-methoxyethanol (2ME) (Fuyu Fine Chemical, Tianjin, China) solvent.The solution was stirred at 300 r/min at room temperature for 2 h, and was then aged for at least one day [25].The precursor solution was spin-coated on the indium tin oxide (ITO) substrate at 5000 rpm for 40 s.If multiple spin-coating was used, the wet films were pre-annealed at 300 • C for 5 min after each spin.Finally, the films were post-annealed at 400 • C on the hotplate for 1 h to drive off the solvent and promote the oxidation reaction.

Fabrication of TFTs
A 150-nm-thick ITO deposited by direct current (DC) sputtering on glass substrates was used as a bottom electrode.ZrO 2 films were formed by spin-coating several times to acquire a certain thickness.10-nm-thick IGZO was deposited by direct current (DC) pulse sputtering with a pressure of 1 mTorr (O:Ar = 5%) and patterned by shadow mask.Then, the IGZO film was annealed at 300 • C for 1 h.The IGZO target is composed of the atomic ratio of In:Ga:Zn:O = 1:1:1:4.Finally, the Al source/drain electrodes with 100-nm-thickness were deposited by direct current (DC) sputtering at room temperature.The channel width (W) and length (L) of TFTs were 530 µm and 270 µm, thus the W/L ratio was 1.96.

Characterization
An MIM structure (ITO/ZrO 2 /Al) was used to measure the leakage current density and capacitance of the ZrO 2 films.X-ray diffraction (XRD) (EMPYREAN, PANalytical, Almelo, The Netherlands) was used to investigate the crystalline phase of the ZrO 2 film fabricated on the glass substrate.The thickness and roughness of the ZrO 2 films were measured by X-ray reflectivity (XRR) using the same equipment.The thickness can be obtained by fitting the interference fringe of the X-ray.The surface topography of the films was evaluated by atomic force microscopy (AFM) (BY3000, Being Nano-Instruments, Beijing, China) in noncontact mode.The electrical characteristics of TFTs were measured using a semiconductor parameter analyzer (Agilent4155C, Agilent, Santa Clara, CA, USA) under an ambient atmosphere.The current-voltage (I-V) and capacitance-frequency (C-f) characteristics of the MIM capacitor were measured by the Keithley4200 (Tektronix, Beaverton, OR, USA) parameter analyzer under an ambient condition.

Results and Discussion
In our experiment, we spun the 0.3 M zirconia precursor on glass substrates one, two, three, four, five and six times.It was found that the thickness of ZrO 2 films increased almost linearly with increasing spin-coating times.Figure 1 is the XRR fitting results of the ZrO 2 films with varying thicknesses.From the fitting results, the thickness of the single-spin-coating film was about 22 nm, and a 130 nm ZrO 2 film can be obtained by six-times spin-coating.Obviously, a thicker film would render a smaller leakage current density.Also, the 0.6 M ZrO 2 precursor was swirled for one, two and three times.The thickness of the ZrO 2 film obtained by using the 0.6 M precursor is about two-fold thicker than that of the ZrO 2 film obtained by using 0.3 M precursor.Additional details are listed in Table 1.The crystalline phase of the ZrO 2 films with dissimilar thicknesses (67 nm, 130 nm) annealed at different temperatures was investigated by XRD. Figure 2 is the XRD spectra of the ZrO 2 films.The 67-nm-thick film annealed at 400 • C had a clear crystal peak, while the 130-nm-film was still amorphous.We presumed that the thicker film may inhibit the transfer of heat and the crystallization of ZrO 2 film in the post-annealing processing.
To increase the thickness of ZrO 2 film, increasing the concentration of precursor or spin-coating times is an effective method.From the XRR fitting results, the ZrO 2 films obtained by spin-coating 0.6 M precursor for three times, and 0.3 M precursor for three and six times, show a corresponding thickness of 132 nm, 67 nm and 130 nm, respectively.Figure 3 shows the leakage current density of the above ZrO 2 films.The ZrO 2 film with 67 nm thickness demonstrated the largest leakage current density.For ZrO 2 films with 132 nm and 130 nm thicknesses, they exhibited comparable leakage current density despite the difference in the precursor concentration and times.A thick ZrO 2 film may inhibit the crystallization of the film that led to the reduction in leakage current density.To increase the thickness of ZrO2 film, increasing the concentration of precursor or spin-coating times is an effective method.From the XRR fitting results, the ZrO2 films obtained by spin-coating 0.6 M precursor for three times, and 0.3 M precursor for three and six times, show a corresponding thickness of 132 nm, 67 nm and 130 nm, respectively.Figure 3 shows the leakage current density of the above ZrO2 films.The ZrO2 film with 67 nm thickness demonstrated the largest leakage current density.For ZrO2 films with 132 nm and 130 nm thicknesses, they exhibited comparable leakage current density despite the difference in the precursor concentration and times.A thick ZrO2 film may inhibit the crystallization of the film that led to the reduction in leakage current density.Figure 4 shows the device architecture of IGZO-TFTs.IGZO-TFTs were prepared based on the dielectric films obtained by spin-coating with 0.6 M precursor for three times and 0.3 M precursor for six times.The corresponding bias stability is illustrated in Figures 5 and 6.The field effect mobility in the saturation region (Vds ≥ Vgs − Vth) and subthreshold swing (SS) were separately obtained by using the following equations: Figure 4 shows the device architecture of IGZO-TFTs.IGZO-TFTs were prepared based on the dielectric films obtained by spin-coating with 0.6 M precursor for three times and 0.3 M precursor for six times.The corresponding bias stability is illustrated in Figures 5 and 6.The field effect mobility in the saturation region (V ds ≥ V gs − V th ) and subthreshold swing (SS) were separately obtained by using the following equations: The TFT with the ZrO2 film achieved by spin-coating with 0.3 M precursor for six times (device A) had a saturation mobility of 12.7 cm 2 V −1 s −1 and an on/off ratio of 7.6 × 10 5 , while the TFT with the ZrO2 film achieved by spin-coating with 0.6 M precursor for three times (device B) exhibited a saturation mobility of 10 cm 2 V −1 s −1 and an on/off ratio of 6.4 × 10 5 .Also, the device A had excellent bias stability, with an offset of the threshold voltage less than 0.6 V under positive bias, and negative bias stress over 3600 s.For comparison, Ding et al. [26] fabricated the IGZO-TFT with bottom gate and staggered electrodes using atomic-layer-deposited Al2O3 as gate insulator.The TFT device showed a threshold voltage shift of 1.5 V under 10 V gate voltage for 1 h.Li et al. [27] reported on the SiNx/IGZO-TFT with reactive sputtered SiOx as passivation layer, and the device exhibited a Vth shift of 1.3 V after applying positive bias stress of 20 V for 10,000 s.However, in our study, the device B not only had a lower saturation mobility, but exhibited a larger threshold voltage shifting under the bias stress test, with a voltage shifting of 1.6 V under positive bias stress over 3600 s.Additional details are listed in Table 2.The trend of parameters in Table 2 is shown in Figures 7 and 8.     W, L, µ sat , C i , V th and I ds are the channel width, channel length, saturation mobility, capacitance, threshold voltage and drain current, respectively, and V ds and V gs separately represent the source-drain voltage and gate-source voltage.The regions from which SS has been extracted are noted on the figures.The capacitance of the ZrO 2 film is around 130 nF/cm 2 .The channel width (W) is 530 µm and the length (L) is 270 µm (W/L ratio is 1.96).
The TFT with the ZrO 2 film achieved by spin-coating with 0.3 M precursor for six times (device A) had a saturation mobility of 12.7 cm 2 V −1 s −1 and an on/off ratio of 7.6 × 10 5 , while the TFT with the ZrO 2 film achieved by spin-coating with 0.6 M precursor for three times (device B) exhibited a saturation mobility of 10 cm 2 V −1 s −1 and an on/off ratio of 6.4 × 10 5 .Also, the device A had excellent bias stability, with an offset of the threshold voltage less than 0.6 V under positive bias, and negative bias stress over 3600 s.For comparison, Ding et al. [26] fabricated the IGZO-TFT with bottom gate and staggered electrodes using atomic-layer-deposited Al 2 O 3 as gate insulator.The TFT device showed a threshold voltage shift of 1.5 V under 10 V gate voltage for 1 h.Li et al. [27] reported on the SiNx/IGZO-TFT with reactive sputtered SiOx as passivation layer, and the device exhibited a V th shift of 1.3 V after applying positive bias stress of 20 V for 10,000 s.However, in our study, the device B not only had a lower saturation mobility, but exhibited a larger threshold voltage shifting under the bias stress test, with a voltage shifting of 1.6 V under positive bias stress over 3600 s.Additional details are listed in Table 2.The trend of parameters in Table 2 is shown in Figures 7 and 8.The leakage current densities (shown in Figure 3) of ZrO 2 films obtained by spin-coating with 0.6 M and 0.3 M precursor for three and six times, respectively, were quite similar.However, the bias stability of the TFTs based on them were greatly different.Figure 9 shows the top view and polarizing graphs of the MIM structure.In order to compare the electrical homogeneity of the insulating films mentioned above, we select nine feature points on the insulating film to measure the leakage current density, as shown in Figure 9. Figure 10 shows the leakage current density of each feature point.Table 3 shows the statistics of electrical properties of each feature point.It can be seen that the ZrO 2 film achieved by spin-coating with 0.3 M precursor for six times had better electrical uniformity.
Appl.Sci.2018, 8, x; doi: FOR PEER REVIEW 9 of 13 The leakage current densities (shown in Figure 3) of ZrO2 films obtained by spin-coating with 0.6 M and 0.3 M precursor for three and six times, respectively, were quite similar.However, the bias stability of the TFTs based on them were greatly different.Figure 9 shows the top view and polarizing graphs of the MIM structure.In order to compare the electrical homogeneity of the insulating films mentioned above, we select nine feature points on the insulating film to measure the leakage current density, as shown in Figure 9. Figure 10 shows the leakage current density of each feature point.Table 3 shows the statistics of electrical properties of each feature point.It can be seen that the ZrO2 film achieved by spin-coating with 0.3 M precursor for six times had better electrical uniformity.Figure 11 is the AFM diagram of ZrO2 films fabricated by spin-coating with 0.6 M precursor for three times and 0.3 M precursor for six times.Both of them had low roughness, and the root mean square of ZrO2 films in devices A and B were 0.16 nm and 0.18 nm, respectively.After the precursor was spin-coated, a wet film was formed containing a large number of ions.The high-concentration precursor (0.6 M) might lead to high surface roughness due to the irregular arrangement of atoms during the annealing process, during which Zr and O elements moved and recombined to form Zr-O bonding.From the results above, the ZrO2 films in device A showed smoother surface, lower leakage current density and better electrical uniformity.A smooth surface morphology may result in The leakage current densities (shown in Figure 3) of ZrO2 films obtained by spin-coating with 0.6 M and 0.3 M precursor for three and six times, respectively, were quite similar.However, the bias stability of the TFTs based on them were greatly different.Figure 9 shows the top view and polarizing graphs of the MIM structure.In order to compare the electrical homogeneity of the insulating films mentioned above, we select nine feature points on the insulating film to measure the leakage current density, as shown in Figure 9. Figure 10 shows the leakage current density of each feature point.Table 3 shows the statistics of electrical properties of each feature point.It can be seen that the ZrO2 film achieved by spin-coating with 0.3 M precursor for six times had better electrical uniformity.Figure 11 is the AFM diagram of ZrO2 films fabricated by spin-coating with 0.6 M precursor for three times and 0.3 M precursor for six times.Both of them had low roughness, and the root mean square of ZrO2 films in devices A and B were 0.16 nm and 0.18 nm, respectively.After the precursor was spin-coated, a wet film was formed containing a large number of ions.The high-concentration precursor (0.6 M) might lead to high surface roughness due to the irregular arrangement of atoms during the annealing process, during which Zr and O elements moved and recombined to form Zr-O bonding.From the results above, the ZrO2 films in device A showed smoother surface, lower leakage current density and better electrical uniformity.A smooth surface morphology may result in  Figure 11 is the AFM diagram of ZrO 2 films fabricated by spin-coating with 0.6 M precursor for three times and 0.3 M precursor for six times.Both of them had low roughness, and the root mean square of ZrO 2 films in devices A and B were 0.16 nm and 0.18 nm, respectively.After the precursor was spin-coated, a wet film was formed containing a large number of ions.The high-concentration precursor (0.6 M) might lead to high surface roughness due to the irregular arrangement of atoms during the annealing process, during which Zr and O elements moved and recombined to form Zr-O bonding.From the results above, the ZrO 2 films in device A showed smoother surface, lower leakage current density and better electrical uniformity.A smooth surface morphology may result in the alleviation of electron trapping at the channel-insulator interface, which is a great contribution to improve the electrical properties and bias stability of TFTs [28][29][30].
where q, ρ, ρ1 and ρ2 represent the relative porosity volume, film density, bulk ZrO2 density (5.68 g/cm 3 ) and void density (air), respectively.The calculated relative porosity volume of 0.3 M ZrO2 dielectric layer and 0.6 M ZrO2 dielectric layer were 16.02% and 17.26%, respectively.Figure 12 shows a schematic diagram describing the internal defects of ZrO2 films.The solution-processed films may have many pores and impurities, which were possibly formed during vaporization, decomposition and condensation processes [31].The advantage of multilayered stacks of ZrO2 films is that the pinholes and pore regions of the sub layers may be filled by the subsequent solution process.Another advantage is that the multilayer structure can make the direct penetration of each layer more random, and it is not easy to form a direct penetration channel that runs through all layers.Furthermore, the wet film obtained by low-concentration precursor is thinner during each spin-coating.The conduction of heat is more efficient in a thinner wet film during the pre-annealing process, which is helpful to reduce the impurities and defects.From the XRR fitting results, the densities of ZrO 2 films fabricated by spin-coating with 0.3 M precursor for six times and 0.6 M precursor for three times were 4.77 and 4.70 g/cm 3 , respectively.The relative porosity volume can be calculated from the densities of ZrO 2 films using the following equation: where q, ρ, ρ1 and ρ2 represent the relative porosity volume, film density, bulk ZrO 2 density (5.68 g/cm 3 ) and void density (air), respectively.The calculated relative porosity volume of 0.3 M ZrO 2 dielectric layer and 0.6 M ZrO 2 dielectric layer were 16.02% and 17.26%, respectively.Figure 12 shows a schematic diagram describing the internal defects of ZrO 2 films.The solution-processed films may have many pores and impurities, which were possibly formed during vaporization, decomposition and condensation processes [31].The advantage of multilayered stacks of ZrO 2 films is that the pinholes and pore regions of the sub layers may be filled by the subsequent solution process.Another advantage is that the multilayer structure can make the direct penetration of each layer more random, and it is not easy to form a direct penetration channel that runs through all layers.Furthermore, the wet film obtained by low-concentration precursor is thinner during each spin-coating.The conduction of heat is more efficient in a thinner wet film during the pre-annealing process, which is helpful to reduce the impurities and defects.

Conclusions
In this paper, we explored the influence of the spin-coating times and the precursor concentration on the dielectrics of solution-processed ZrO 2 films.It is interesting that a thicker film may inhibit the crystallization of the film during the post-annealing process, thus improving the dielectric properties.Moreover, ZrO 2 films fabricated by spin-coating with 0.3 M precursor for six times had lower leakage current density and better electrical uniformity than the film fabricated by spin coating with 0.6 M precursor for three times, thus rendering excellent electrical properties and bias stability of the TFT device.Two possible mechanisms for the improvement of device characteristics have been concluded.
(1) The pinholes or pore sites of the sublayer may be filled by a subsequent solution process in the multilayered structure, so there are fewer impurities and defects in the films.(2) The conduction of heat is more efficient in a thinner wet film during vaporization, decomposition and condensation processes, which is beneficial to the reduction of impurities and defects.

Figure 1 .
Figure 1.X-ray reflectivity measurements of 0.3 M precursor-based ZrO2 films of different coating times.

Figure 1 .
Figure 1.X-ray reflectivity measurements of 0.3 M precursor-based ZrO 2 films of different coating times.

Figure 3 .
Figure 3.The leakage current density of the ZrO2 films with altering thicknesses.

Figure 3 .
Figure 3.The leakage current density of the ZrO 2 films with altering thicknesses.

Figure 4 .
Figure 4. (a) Schematic showing the cross-section of IGZO-TFT with ZrO2 dielectric layer.(b) Thickness of each layer.(c) Photograph of the fabricated TFT.

Table 2 .
Electrical characteristics of the devices.Device A: The TFTs with the ZrO2 films obtained by spin-coating with 0.3 M precursor for 6 times.Device B: The TFTs with the ZrO2 films obtained by spin-coating with 0.6 M precursor for 3 times.

Figure 6 .
Figure 6.Bias stability of the TFT with ZrO2 film fabricated by 0.6 M precursor spin-coating 3 times.(a) Output curves and gate capacitance as a function of voltage.(b) Transfer curves with gate-leakage current curves of positive bias stress.(c) Plots of sqrt Ids (drain/source current) versus gate overdrive of positive bias stress.(d) Output curves and gate capacitance as a function of voltage.(e) Transfer curves with gate-leakage current curves of negative bias stress.(f) Plots of sqrt Ids (drain/source current) versus gate overdrive of negative bias stress.

Figure 5 .
Figure 5. Bias stability of the TFT with ZrO 2 film fabricated by spin-coating of 0.3 M precursor for 6 times.(a) Output curves and gate capacitance as a function of voltage.(b) Transfer curves with gate-leakage current curves of positive bias stress.(c) Plots of sqrt I ds (drain/source current) versus gate overdrive of positive bias stress.(d) Output curves and gate capacitance as a function of voltage.(e) Transfer curves with gate-leakage current curves of negative bias stress.(f) Plots of sqrt I ds (drain/source current) versus gate overdrive of negative bias stress.

Figure 5 .
Figure 5. Bias stability of the TFT with ZrO2 film fabricated by spin-coating of 0.3 M precursor for 6 times.(a) Output curves and gate capacitance as a function of voltage.(b) Transfer curves with gateleakage current curves of positive bias stress.(c) Plots of sqrt Ids (drain/source current) versus gate overdrive of positive bias stress.(d) Output curves and gate capacitance as a function of voltage.(e) Transfer curves with gate-leakage current curves of negative bias stress.(f) Plots of sqrt Ids (drain/source current) versus gate overdrive of negative bias stress.

Figure 6 .
Figure 6.Bias stability of the TFT with ZrO2 film fabricated by 0.6 M precursor spin-coating 3 times.(a) Output curves and gate capacitance as a function of voltage.(b) Transfer curves with gate-leakage current curves of positive bias stress.(c) Plots of sqrt Ids (drain/source current) versus gate overdrive of positive bias stress.(d) Output curves and gate capacitance as a function of voltage.(e) Transfer curves with gate-leakage current curves of negative bias stress.(f) Plots of sqrt Ids (drain/source current) versus gate overdrive of negative bias stress.

Figure 6 .
Figure 6.Bias stability of the TFT with ZrO 2 film fabricated by 0.6 M precursor spin-coating 3 times.(a) Output curves and gate capacitance as a function of voltage.(b) Transfer curves with gate-leakage current curves of positive bias stress.(c) Plots of sqrt I ds (drain/source current) versus gate overdrive of positive bias stress.(d) Output curves and gate capacitance as a function of voltage.(e) Transfer curves with gate-leakage current curves of negative bias stress.(f) Plots of sqrt I ds (drain/source current) versus gate overdrive of negative bias stress.

Figure 7 .
Figure 7.The trend of electrical characteristics of the TFT with ZrO2 film fabricated by 0.3 M precursor spin-coating 6 times.(a) Positive bias stress.(b) Negative bias stress.

Figure 8 .
Figure 8.The trend of electrical characteristics of the TFT with ZrO2 film fabricated by 0.6 M precursor spincoating 3 times.(a) Positive bias stress.(b) Negative bias stress.

Figure 7 . 13 Figure 7 .
Figure 7.The trend of electrical characteristics of the TFT with ZrO 2 film fabricated by 0.3 M precursor spin-coating 6 times.(a) Positive bias stress.(b) Negative bias stress.

Figure 8 .
Figure 8.The trend of electrical characteristics of the TFT with ZrO2 film fabricated by 0.6 M precursor spincoating 3 times.(a) Positive bias stress.(b) Negative bias stress.

Figure 8 .
Figure 8.The trend of electrical characteristics of the TFT with ZrO 2 film fabricated by 0.6 M precursor spin-coating 3 times.(a) Positive bias stress.(b) Negative bias stress.

Figure 9 .
Figure 9.The overlook view of the MIM structure.(a) Overlook view.(b) Polarizing photograph.

Figure 9 .
Figure 9.The overlook view of the MIM structure.(a) Overlook view.(b) Polarizing photograph.

Figure 9 .
Figure 9.The overlook view of the MIM structure.(a) Overlook view.(b) Polarizing photograph.

Figure 10 .
Figure 10.The leakage current density of each feature point on the ZrO 2 film.(a) 0.3 M precursor spin-coating 6 times.(b) 0.6 M precursor spin-coating 3 times.

Figure 12 .
Figure 12.Cross-sectional schematic diagrams of ZrO2 films.(a) 0.3 M precursor spin-coating 6 times.(b) 0.6 M precursor spin-coating 3 times.The interfacial pores and pinholes in the sublayer filled by solution to form an upper layer.

Figure 12 .
Figure 12.Cross-sectional schematic diagrams of ZrO2 films.(a) 0.3 M precursor spin-coating 6 times.(b) 0.6 M precursor spin-coating 3 times.The interfacial pores and pinholes in the sublayer filled by solution to form an upper layer.

Figure 12 .
Figure 12.Cross-sectional schematic diagrams of ZrO 2 films.(a) 0.3 M precursor spin-coating 6 times.(b) 0.6 M precursor spin-coating 3 times.The interfacial pores and pinholes in the sublayer filled by solution to form an upper layer.

Table 1 .
The density, thickness and roughness of 0.3 M precursor-based ZrO2 films of different coating times.The roughness for glass substrate is 0.79 ± 0.32 nm.

Table 1 .
The density, thickness and roughness of 0.3 M precursor-based ZrO 2 films of different coating times.The roughness for glass substrate is 0.79 ± 0.32 nm.ConcentrationLayer Density (g/cm 3 ) Thickness (nm) Roughness (nm)

Table 2 .
Electrical characteristics of the devices.Device A: The TFTs with the ZrO 2 films obtained by spin-coating with 0.3 M precursor for 6 times.Device B: The TFTs with the ZrO 2 films obtained by spin-coating with 0.6 M precursor for 3 times.

Table 3 .
The statistics of electrical properties of each feature point.