An Efficient Approach for Fast and Accurate Voltage Stability Margin Computation in Large Power Grids

This paper proposes an efficient approach for the computation of voltage stability margin (VSM) in a large-scale power grid. The objective is to accurately and rapidly determine the load power margin which corresponds to voltage collapse phenomena. The proposed approach is based on the impedance match-based technique and the model-based technique. It combines the Thevenin equivalent (TE) network method with cubic spline extrapolation technique and the continuation technique to achieve fast and accurate VSM computation for a bulk power grid. Moreover, the generator Q limits are taken into account for practical applications. Extensive case studies carried out on Institute of Electrical and Electronics Engineers (IEEE) benchmark systems and the Taiwan Power Company (Taipower, Taipei, Taiwan) system are used to demonstrate the effectiveness of the proposed approach.


Introduction
Voltage stability is a major concern and is the main factor that limits power transfers in today's grid operations.For this reason, significant research efforts have been devoted to understanding the voltage instability phenomenon and proposing corresponding countermeasures [1][2][3].Voltage stability is an essential dynamic phenomenon.If analysis targets system load margin, critical bus identification, or reactive power compensation, then the use of static model is adequate.A large portion of studies have focused on the steady-state aspects of voltage stability.While static analysis is simple, it still provides some practical advantages over dynamic analysis, providing results with acceptable accuracy and little computational effort [4,5].
In several recent large-scale blackout events, such as in Scandinavia (2003), the northeastern United States (2003), southern Sweden (2003), eastern Denmark (2003), Italy (2003), Athens (2004), and Brazil (2009), voltage collapse has played a major role [6][7][8].In view of this, it is essential for system operators to identify whether a current operating state is prone to voltage collapse or not.In order to measure system long-term voltage stability, the concept of voltage stability margin (VSM) has been proposed to demonstrate the closeness of current operating point to voltage collapse point [9,10].A review of literature reveals that various VSM evaluation approaches are based on different kinds of techniques, such as sensitivity techniques [11,12], singular value decomposition techniques [13,14], machine learning techniques [15,16], impedance-based techniques [17][18][19][20], continuation techniques [21][22][23][24], and line voltage stability indices [25,26].It is noteworthy that different voltage stability indices may give different results, i.e., they may not show the true distance to voltage collapse.An extensive comparison study on voltage stability indices can be found in the works [27,28].
In fact, voltage stability is related to saddle-node bifurcation, which corresponds to the maximum loading point [23].When the generation-transmission system is unable to meet the continuous increase in load demand, voltage instability and even voltage collapse situations are more likely to take place.In this regard, load power margin is often associated with VSM, as illustrated in Figure 1.Indeed, a number of methods proposed in works [21][22][23][24] utilize this kind of measure as a monitoring index of voltage stability.
Appl.Sci.2016, 6, 335 2 of 17 continuous increase in load demand, voltage instability and even voltage collapse situations are more likely to take place.In this regard, load power margin is often associated with VSM, as illustrated in Figure 1.Indeed, a number of methods proposed in works [21][22][23][24] utilize this kind of measure as a monitoring index of voltage stability.To determine load power margin under a certain load level, P-V curves are widely utilized by power companies.Generally, such curves are generated by means of a series of power flow solutions for different load levels.However, successive computation using the traditional power flow approach may lead to a divergence problem near the voltage stability boundary.Thus, continuation power flow (CPFLOW)-based methods have been used to cope with the numerical difficulties caused by the singularity of the power-flow Jacobian matrix at and around the critical point [21][22][23][24].Although CPFLOW based methods are able to track the exact voltage collapse point, these methods are timeconsuming, especially for a large power grid model.Recently, some impedance match methods [17][18][19][20] have been proposed to determine the voltage collapse point.To the author's knowledge, most of these can quickly provide the results with acceptable accuracy.
The main contribution of this paper is the development of a new method for fast and accurate VSM computation in a large-scale power system.To this end, an efficient framework based on the impedance match-based technique and the model-based technique is proposed.In the proposed framework, the Thevenin equivalent (TE) network approach with cubic spline extrapolation technique and continuation technique are employed to determine the voltage collapse point.In addition, the developed approach is capable of dealing with the cases that cause generators to reach the Q limits.This paper is structured as follows: Section 2 presents the proposed algorithm for fast determination of voltage collapse point; this algorithm is applied to some Institute of Electrical and Electronics Engineers (IEEE) systems and the Taipower system, and the results are illustrated in Section 3.This paper finishes with some concluding remarks, drawn in Section 4.

Proposed Approach
In this research, an efficient method for fast as well as accurate VSM computation in large power grids is developed.This method combines both impedance match-based technique and model based technique.In addition, some practical operating conditions such as generator Q limit are taken into account for practical applications.The proposed framework is illustrated in Figure 2.
The following subsections present the detailed principles and methods used in the proposed framework.To determine load power margin under a certain load level, P-V curves are widely utilized by power companies.Generally, such curves are generated by means of a series of power flow solutions for different load levels.However, successive computation using the traditional power flow approach may lead to a divergence problem near the voltage stability boundary.Thus, continuation power flow (CPFLOW)-based methods have been used to cope with the numerical difficulties caused by the singularity of the power-flow Jacobian matrix at and around the critical point [21][22][23][24].Although CPFLOW based methods are able to track the exact voltage collapse point, these methods are time-consuming, especially for a large power grid model.Recently, some impedance match methods [17][18][19][20] have been proposed to determine the voltage collapse point.To the author's knowledge, most of these can quickly provide the results with acceptable accuracy.
The main contribution of this paper is the development of a new method for fast and accurate VSM computation in a large-scale power system.To this end, an efficient framework based on the impedance match-based technique and the model-based technique is proposed.In the proposed framework, the Thevenin equivalent (TE) network approach with cubic spline extrapolation technique and continuation technique are employed to determine the voltage collapse point.In addition, the developed approach is capable of dealing with the cases that cause generators to reach the Q limits.This paper is structured as follows: Section 2 presents the proposed algorithm for fast determination of voltage collapse point; this algorithm is applied to some Institute of Electrical and Electronics Engineers (IEEE) systems and the Taipower system, and the results are illustrated in Section 3.This paper finishes with some concluding remarks, drawn in Section 4.

Proposed Approach
In this research, an efficient method for fast as well as accurate VSM computation in large power grids is developed.This method combines both impedance match-based technique and model based technique.In addition, some practical operating conditions such as generator Q limit are taken into account for practical applications.The proposed framework is illustrated in Figure 2.
The following subsections present the detailed principles and methods used in the proposed framework.

Multi-Node Thevenin Equivalent Circuit Model
A general multi-node network power system model is shown in Figure 3, where G n generators and L n loads are outside the transmission network.Such complex network can be converted into a multi-note TE network model.Let us begin with the relationship between the injected node currents and the node voltages given by bus where I is the vector of injected node currents; V is the vector of node voltages; bus Y is the bus admittance matrix.Due to three types of buses in the system, Equation (1) can be expressed as in which the subscripts G, L, and T are utilized to denote generator bus, load bus, and tie bus, respectively.From Equation (2), L V can be expressed as where   In Equation ( 4), Z denotes the impedance matrix, and can be computed from bus Y .

Multi-Node Thevenin Equivalent Circuit Model
A general multi-node network power system model is shown in Figure 3, where n G generators and n L loads are outside the transmission network.Such complex network can be converted into a multi-note TE network model.Let us begin with the relationship between the injected node currents and the node voltages given by where I is the vector of injected node currents; V is the vector of node voltages; Y bus is the bus admittance matrix.Due to three types of buses in the system, Equation (1) can be expressed as in which the subscripts G, L, and T are utilized to denote generator bus, load bus, and tie bus, respectively.From Equation (2), V L can be expressed as where In Equation (4), Z denotes the impedance matrix, and can be computed from Y bus . where th E i and th i Z correspond to TE voltage and TE impedance at load bus i, respectively.ij Z is the i-j element of Z and ii Z is the diagonal element of Z.In addition, the load impedance of the complex load power L i S is given by where th E i and th i Z correspond to TE voltage and TE impedance at load bus i, respectively.ij Z is the i-j element of Z and ii Z is the diagonal element of Z.In addition, the load impedance of the complex load power L i S is given by where E th i and Z th i correspond to TE voltage and TE impedance at load bus i, respectively.Z ij is the i-j element of Z and Z ii is the diagonal element of Z.In addition, the load impedance of the complex load power S L i is given by where S L i * denotes the conjugate of S L i .

Cubic Spline Extrapolation Technique
In Figure 4, as voltage collapse occurs at bus i, the impedance-matching criterion holds; i.e., Z L i = Z th i .Thus, the estimated maximum loading point at which voltage collapses can be made by equating an approximate function, that extrapolates the trajectory of Z L i , to Z th i .A cubic spline function is selected as the approximate function in this study.The fundamental idea behind constructing a spline function is to divide the interval into a collection of subintervals and construct a different approximating low-order polynomial in each subinterval.In cubic splines, third-order polynomials are used in the subintervals between each pair of data points.Thus, the curves obtained from each subinterval are smooth.
For example, given m data points, there are m − 1 subintervals, and the equation of the polynomial in the jth subinterval is expressed as Overall, there are m − 1 equations.Since each third-order polynomial has four coefficients, a total of 4 (m − 1) = 4m − 4 unknowns have to be determined.All of the coefficients a j , b j , c j , and d j can be found by applying the method proposed in [29].In this work, the variable x in Equation ( 10) is replaced with the calculated Z L i , and m is set to three.The cubic spline extrapolation function is constructed by the coordinates of the given data points Z L i , λ , where λ denotes the load increase parameter.The function is then used for calculating the extrapolated value of Since m is set to three, the inputs to the function are three sets of data points Z L i , λ and the point of Z th i .The output from the function is the estimated maximum load point λ es .

Generator Q-Limit Index
Figure 5a depicts Z L and Z th as a function of load increase without violations of generator Q limits.The solid line shown in Figure 5a denotes the function curve for extrapolation with cubic splines.Observations from extensive simulations on power systems ranging from small to large power grids indicate that, using the approach above, the estimated λ es (which is close to but a little less than the exact λ max ), can be acquired.
For those cases with generator Q limit violation during load increase, Z in Equation ( 5) must be updated based on the change of bus type status (PV bus to PQ bus) before the estimation of λ es .An illustrative example of Q limit violation is depicted in Figure 5b, where the sharp jump in Z th coincides with the generator reaching its capacity limits.In this study, a Q-limit index Q ex Gi proposed in [20] is used to measure the extreme Q for each generator based on the given load increase direction (LID).The process for identifying generator Q limit violation is summarized in Algorithm 1.According to [20], the approximation quadratic model of λ − Q G curve can be described , where α i , β i , and γ i can be obtained by utilizing three sets of λ and Q Gi .Once the coefficients are determined, the extreme value of Q Gi , denoted by Q ex Gi , can be estimated.
generator Q limits occur at PV bus i, in which Q min Gi and Q max Gi are the lower and upper limits of the ith generator.Otherwise, there is no generator Q limit violation at PV bus i.After the execution of Algorithm 1 for {Q Gi } n G i=1 , a list of Q limit violations at PV buses is obtained.Algorithm 1. Identify generator Q limit violations. Input: Bus type change for bus i (PV bus to PQ bus); 6: end if 7: return List of Q limit violations 8: end function

Continuation Technique
Although the proposed approach for determination of max  is independent of the model-based tool selected, the continuation method proposed in [22] was applied in this work.One feature of this approach is that it remains well-conditioned at all possible loading conditions in power flow calculation.
Consider the following steady-state power system models Algorithm 1. Identify generator Q limit violations.
Gi then 5: Bus type change for bus i (PV bus to PQ bus); 6: end if 7: return List of Q limit violations 8: end function

Continuation Technique
Although the proposed approach for determination of λ max is independent of the model-based tool selected, the continuation method proposed in [22] was applied in this work.One feature of this approach is that it remains well-conditioned at all possible loading conditions in power flow calculation.
Consider the following steady-state power system models F (y, λ) = 0 (11) where y denotes the vector of bus voltage phasors; λ represents the load increase parameter.The continuation approach is based on a locally parameterized continuation technique.Indeed, it is an iterative calculation process which starts from a known operating point and is solved as F (y, λ) = 0 as λ changes.In addition, the predictor-corrector scheme is utilized to find each solution of the manifold.
A widely accepted voltage stability measure can be expressed by the load power margin, i.e., λ max − λ 0 , where λ 0 represents the base case loading point.Hence, VSM defined by the percentage of In summary, the proposed method aims to quickly determine the proximity to voltage collapse.It can cope with the cases that cause generators reaching their Q limits.The computation process to determine VSM is summarized in Algorithm 2. The input of this algorithm is Y bus and three sets of Z L , λ, and Q G , and the output is VSM.
The main steps in Algorithm 2 for finding VSM are described as follows: (1) Compute Q ex Gi for i ∈ {PV} to create a list of Q limit violations L PQ PV ; (2) Employ a multi-node Thevenin equivalent network to model a power system.Next, calculate Z th j and Z L j for j ∈ {PQ} based on L PQ PV ; (3) Utilize cubic spline extrapolation technique to estimate λ es based on Z th j and Z L j ; (4) Execute a continuation program to determine the exact λ max through the information of λ es ; (5) Compute VSM via Equation (12).

Simulation Results
The proposed approach is applied to some IEEE test systems and a real power system.The scenarios, that are evaluated, are summarized in Figure 6.The experiments are implemented in MATLAB ® (R2009b, Torrance, CA, USA, 2009), and run on an Intel ® Core™2 Duo 2.66 GHz computer (ASUS, Taipei, Taiwan) with 4 GB of RAM (random access memory).In addition, CPU (central processing unit) time is an important metric for verifying the performance of the proposed approach.The CPU time was measured by using the MATLAB cputime function [30] in our program.The simulation results obtained were all compared with those found by the conventional CPFLOW approach.More details are illustrated and discussed in the cases below.

Effects of Different Load Increase Scenarios
In this research, the single load bus variation and multiple load bus variation are considered.Also, the load increase direction simulated in the experiments is based on the initial load level at each bus.

IEEE 30-Bus System
The first test system is concerned with the IEEE 30-bus system that consists of 6 generators, 24 loads, and 41 lines [31].
In the first phase of the simulation, single load change case is tested wherein the load at the specific bus is increased proportionally until the load flow equations fail to converge.In this simulation, the load at bus 30 is selected.Figure 7 shows the comparison with max  and CPU time with the proposed method and conventional CPFLOW method, where max  denotes the critical point at which voltage collapses.From the shown figure, one can see that both the proposed approach and conventional CPFLOW approach can achieve the actual value max 1.8777   .The CPU time, however, is quite different from each method.Specifically, the proposed method takes 0.23 s in the execution, while the conventional CPFLOW method takes 0.86 s.
In the second phase of the simulation, a multiple load change case is considered.In this case, all the loads in the test system are simultaneously increased with a constant load power factor.The trajectories of searching max  using the two compared methods are given in Figure 8.It indicates that the proposed method quickly finds the accurate solution of max 2.9493   in 0.29 s.Meanwhile, for the conventional CPFLOW method, it still requires 1.15 s to reach the same point.

Effects of Different Load Increase Scenarios
In this research, the single load bus variation and multiple load bus variation are considered.Also, the load increase direction simulated in the experiments is based on the initial load level at each bus.

IEEE 30-Bus System
The first test system is concerned with the IEEE 30-bus system that consists of 6 generators, 24 loads, and 41 lines [31].
In the first phase of the simulation, single load change case is tested wherein the load at the specific bus is increased proportionally until the load flow equations fail to converge.In this simulation, the load at bus 30 is selected.Figure 7 shows the comparison with λ max and CPU time with the proposed method and conventional CPFLOW method, where λ max denotes the critical point at which voltage collapses.From the shown figure, one can see that both the proposed approach and conventional CPFLOW approach can achieve the actual value λ max = 1.8777.The CPU time, however, is quite different from each method.Specifically, the proposed method takes 0.23 s in the execution, while the conventional CPFLOW method takes 0.86 s.
In the second phase of the simulation, a multiple load change case is considered.In this case, all the loads in the test system are simultaneously increased with a constant load power factor.The trajectories of searching λ max using the two compared methods are given in Figure 8.It indicates that the proposed method quickly finds the accurate solution of λ max = 2.9493 in 0.29 s.Meanwhile, for the conventional CPFLOW method, it still requires 1.15 s to reach the same point.

IEEE 118-Bus System
The IEEE 118-bus system is also used as a test model to illustrate the applicability of the proposed approach to large power grids.This test system composes of 54 generators, 64 loads, and 186 lines [31].
An illustrative example of the single load bus variation (load increase at bus 118) is shown in Figure 9.The CPU times are 1.95 s for the proposed method and 11.27 s for the conventional CPFLOW method.Figure 10 illustrates another test result for the multiple load bus variation (load increase at Comparison with λ max and CPU (central processing unit) time between the proposed approach and conventional continuation power flow (CPFLOW) approach under single load change scenario on IEEE 30-bus system: proposed approach, λ max = 1.8777,CPU = 0.23 s: conventional CPFLOW approach, λ max = 1.8777,CPU = 0.86 s.

IEEE 118-Bus System
The IEEE 118-bus system is also used as a test model to illustrate the applicability of the proposed approach to large power grids.This test system composes of 54 generators, 64 loads, and 186 lines [31].
An illustrative example of the single load bus variation (load increase at bus 118) is shown in Figure 9.The CPU times are 1.95 s for the proposed method and 11.27 s for the conventional CPFLOW method.Figure 10 illustrates another test result for the multiple load bus variation (load increase at Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on an IEEE 30-bus system: proposed approach, λ max = 2.9493, CPU = 0.29 s; conventional CPFLOW approach, λ max = 2.9493, CPU = 1.15 s.

IEEE 118-Bus System
The IEEE 118-bus system is also used as a test model to illustrate the applicability of the proposed approach to large power grids.This test system composes of 54 generators, 64 loads, and 186 lines [31].
An illustrative example of the single load bus variation (load increase at bus 118) is shown in Figure 9.The CPU times are 1.95 s for the proposed method and 11.27 s for the conventional CPFLOW method.Figure 10 illustrates another test result for the multiple load bus variation (load increase at all buses).The CPU time from this case for the proposed method and CPFLOW method are 2.15 and 6.58 s, respectively.From the two cases presented, it is clearly observed that the proposed approach is faster and runs more efficiently, compared to the conventional CPFLOW approach.
Appl.Sci.2016, 6, 335 10 of 17 all buses).The CPU time from this case for the proposed method and CPFLOW method are 2.15 and 6.58 s, respectively.From the two cases presented, it is clearly observed that the proposed approach is faster and runs more efficiently, compared to the conventional CPFLOW approach.

Effects of Q Limits Violation
To investigate the impact of Q limit violations on VSM computation, we have studied many cases, including various load patterns, various load levels, and various Q limit violations.Among those investigated cases, some selected simulation scenarios are listed in Table 1.Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under single load change scenario on IEEE 118-bus system: proposed approach, λ max = 0.9868, CPU = 1.95 s; conventional CPFLOW approach, λ max = 0.9868, CPU = 11.27s. all buses).The CPU time from this case for the proposed method and CPFLOW method are 2.15 and 6.58 s, respectively.From the two cases presented, it is clearly observed that the proposed approach is faster and runs more efficiently, compared to the conventional CPFLOW approach.

Effects of Q Limits Violation
To investigate the impact of Q limit violations on VSM computation, we have studied many cases, including various load patterns, various load levels, and various Q limit violations.Among those investigated cases, some selected simulation scenarios are listed in Table 1.Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on IEEE 118-bus system: proposed approach, λ max = 3.1871, CPU = 2.15 s: conventional CPFLOW approach, λ max = 3.1871, CPU = 6.58 s.

Effects of Q Limits Violation
To investigate the impact of Q limit violations on VSM computation, we have studied many cases, including various load patterns, various load levels, and various Q limit violations.Among those investigated cases, some selected simulation scenarios are listed in Table 1.The simulation results for the IEEE 30-bus and IEEE 118-bus are presented in Tables 2 and 3, respectively.The output is organized in five columns: the first column depicts the test case which scenario is listed in Table 1.The simulation results of λ max computed by the proposed approach and CPFLOW approach are given in column 2 and column 3. The last two columns depict the results of CPU time (s) computed by the proposed approach and CPFLOW approach.From Tables 2 and 3, it is once again shown that the proposed approach is able to provide an accurate solution with a shorter computation time.The proposed algorithm has been tested on a real power system, the Taipower system, which is a narrow and long power grid covering a distance of 400 km from north to south.Usually it is divided into three areas: north, center, and south.Different areas are connected together via a number of 345 kV transmission lines, as shown in Figure 11.This sample system is composed of 1821 buses and 3319 lines.

Taiwan Power (Taipower) System
The proposed algorithm has been tested on a real power system, the Taipower system, which is a narrow and long power grid covering a distance of 400 km from north to south.Usually it is divided into three areas: north, center, and south.Different areas are connected together via a number of 345 kV transmission lines, as shown in Figure 11.This sample system is composed of 1821 buses and 3319 lines.

Statistical Evalution
Extensive case studies with respect to various test systems, various load patterns, various load levels, and various Q-limit violations have been conducted.The proposed approach can accurately and rapidly determine the point of voltage collapse for all tested cases.The statistical results are summarized in the following.
The average timing results under the selected 500 simulation runs for each test system are listed in Table 5, showing the average CPU time of the proposed approach is about three to four times faster than that of the the conventional CPFLOW approach.This means that a fast computation of voltage collapse point can be achieved by using the proposed method.

N-1 Contingency Analysis
The effectiveness of the proposed approach to N-1 contingency situation, which is the normal system minus one component, was evaluated.In this work, the considered single contingency conditions are outages of lines and outages of generators.
The IEEE 30-bus system was selected as an example to illustrate the performance of the proposed method to branch outages.Table 6 summarizes the contingency ranking list for the IEEE 30-bus test system.In this table, column 2 denotes different branch outage scenarios and these contingencies are ranked by severity order in terms of λ max given in column 3. A smaller value of λ max results in a more severe branch contingency with the higher rank.The obtained results indicate that outages of branches 1-2, 28-27, and 27-30 are identified as the most severe contingencies among the other branch outage cases.The last two columns of Table 6 represent the execution times required for the proposed approach and conventional CPFLOW approach.It indicates that the proposed method can highly reduce the computation burden while maintaining λ max accuracy.
Table 7 shows some selected simulation results of single contingency cases for the test systems.An inspection of this table clearly observes that the proposed method can work properly not only for line outage cases but also for generator outage cases.

Comparison with Machine Learning Tools
The performance of the proposed method has been compared with two machine learning methods: the artificial neural network (ANN) method [15] and regression tree (RT) method [16].Note that both the ANN method [15] and RT method [16] use VSM determined by CPFLOW as target output.In other words, both the ANN method [15] and RT method [16] can only give the results that are very close to or equal to those of CPFLOW.
Table 8 demonstrates the prediction of the VSM via the proposed method, ANN method [15], and RT method [16] under the selected cases listed in Table 1 for Taipower system.On comparing the predicted VSMs for the cases in Table 8, it is clearly seen that the proposed method was able to provide the best results, which were the same as the actual ones.

Comparison with Line Voltage Stability Index
As mentioned previously, different voltage stability indices may give different results, especially for large-scale power grids [27].A comparison study of the results obtained by the proposed method and voltage collapse proximity indicator (VCPI) method [26] for line outage contingency ranking is demonstrated here.Note that theoretically the value of VCPI ranges from 0 to 1, and it approaches 1 when the operating point is close to the voltage-collapse point [26].
In the simulation, all the loads including active and reactive powers in the test system are increased simultaneously based on their initial load levels.Table 9 illustrates the comparison results of the most critical lines under heavy load condition for Taipower system.In Table 9, one can see that different methods indeed give different ranking of critical lines.However, the results of the most critical lines obtained by the two compared methods are almost the same.

Conclusions
A computationally efficient method for the determination of VSM in a large-scale power grid is proposed.This method combines both impedance match-based technique and model-based technique to quickly estimate the voltage collapse point.It also considers the generator Q limits for practical operation.Numerical examples for some standard IEEE test systems and Taipower system have been conducted.The simulation results are promising and confirm the effectiveness of the proposed method.Furthermore, a comparative study and analysis of the proposed method and VCPI method for line outage contingency ranking of Taipower system was carried out, showing that the results of the most critical lines obtained from both methods are almost the same.

Figure 1 .
Figure 1.Illustration of voltage stability margin (VSM) in a load power parameter space.

Figure 1 .
Figure 1.Illustration of voltage stability margin (VSM) in a load power parameter space.

Figure 2 .
Figure 2. Proposed framework for determination of VSM.LID: the load increase direction;  : the load increase parameter; QG: generator Q limits.

Figure 2 .
Figure 2. Proposed framework for determination of VSM.LID: the load increase direction; λ: the load increase parameter; Q G : generator Q limits.

Figure 3 .
Figure 3. Multi-node network power system model.G V , generator bus voltage; L S , complex load

Figure 4
Figure 4 illustrates a multi-node TE network model for the representation of Equation (3).For any load bus

Figure 3 .Figure 3 .Figure 4 .
Figure 3. Multi-node network power system model.V G , generator bus voltage; S L , complex load power; n G , number of generators; n L , number of loads.

Figure 4
Figure 4 illustrates a multi-node TE network model for the representation of Equation (3).For any load bus

Figure 4
Figure 4 illustrates a multi-node TE network model for the representation of Equation (3).For any load busi ∈ {1, • • • , n L }, we have V L i = E th i − Z th i I L

Figure 5 .
Figure 5. Illustration of the cubic spline extrapolation technique for estimation of max  .(a) Case

Figure 5 .
Figure 5. Illustration of the cubic spline extrapolation technique for estimation of λ max .(a) Case without Q limit violations; (b) Case with a Q limit violation.

Figure 6 .
Figure 6.Summary of scenarios and events during the experiments.IEEE: Institute of Electrical and Electronics Engineers.

Figure 6 .
Figure 6.Summary of scenarios and events during the experiments.IEEE: Institute of Electrical and Electronics Engineers.

Figure 8 .
Figure 8.Comparison with max and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on an IEEE 30-bus system: proposed approach, max 

Figure 7 .
Figure 7.Comparison with λ max and CPU (central processing unit) time between the proposed approach and conventional continuation power flow (CPFLOW) approach under single load change scenario on IEEE 30-bus system: proposed approach, λ max = 1.8777,CPU = 0.23 s: conventional CPFLOW approach, λ max = 1.8777,CPU = 0.86 s.

Figure 7 .Figure 8 .
Figure 7.Comparison with max and CPU (central processing unit) time between the proposed approach and conventional continuation power flow (CPFLOW) approach under single load change scenario on IEEE 30-bus system: proposed approach, max 

Figure 8 .
Figure 8.Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on an IEEE 30-bus system: proposed approach, λ max = 2.9493, CPU = 0.29 s; conventional CPFLOW approach, λ max = 2.9493, CPU = 1.15 s.

Figure 9 .
Figure 9.Comparison with max and CPU time between the proposed approach and conventional CPFLOW approach under single load change scenario on IEEE 118-bus system: proposed approach, max 

Figure 10 .
Figure 10.Comparison with max  and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on IEEE 118-bus system: proposed approach, max 

Figure 9 .
Figure 9.Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under single load change scenario on IEEE 118-bus system: proposed approach, λ max = 0.9868, CPU = 1.95 s; conventional CPFLOW approach, λ max = 0.9868, CPU = 11.27s.

Figure 9 .
Figure 9.Comparison with max and CPU time between the proposed approach and conventional CPFLOW approach under single load change scenario on IEEE 118-bus system: proposed approach, max 

Figure 10 .
Figure 10.Comparison with max  and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on IEEE 118-bus system: proposed approach, max 

Figure 10 .
Figure10.Comparison with λ max and CPU time between the proposed approach and conventional CPFLOW approach under multiple load change scenario on IEEE 118-bus system: proposed approach, λ max = 3.1871, CPU = 2.15 s: conventional CPFLOW approach, λ max = 3.1871, CPU = 6.58 s.

Table 1 .
Scenarios for the test system.Load Pattern: Load_All, Load_Odd, Load_Even and Load_One denote load increases at all load buses, at odd load buses, at even load buses, and at a load bus, respectively; 2 QG: generator Q limits.Q Limit: QG_All, QG_Odd, and QG_Even denote Q limits at all generator buses, at odd generator buses, and at even generator buses, respectively.

Table 2 .
Performance comparison between the proposed approach and CPFLOW approach for IEEE 30-Bus system 1 .

Table 3 .
Performance comparison between the proposed approach and CPFLOW approach for IEEE 118-Bus system.

Table 3 .
Performance comparison between the proposed approach and CPFLOW approach for IEEE 118-Bus system.

Table 4 .
Performance comparison between the proposed approach and CPFLOW approach for Taipower system.

Table 5 .
Comparison of average CPU time (s) under 500 simulation runs for the test system.

Table 6 .
Results of the branch outage contingency ranking for IEEE 30-Bus system.

Table 7 .
Selected Results of single contingency cases for test systems.

Table 8 .
Performance evaluation between the compared methods under the selected cases for Taipower system 1 .

Table 9 .
Results of the most critical lines under heavy load condition for Taipower system 1 .