Error Correction Method of TIADC System Based on Parameter Estimation of Identiﬁcation Model

: The performance of analog-to-digital converters (ADCs) has reached a bottleneck due to the limitations of the manufacturing process and testing environment. Time-interleaved ADC (TIADC) technology can increase the sampling rate without changing the resolution. However, channel mismatch severely degrades the dynamic performance of the TIADC system. For the channel mismatch problem of TIADC, most of the current solutions have preconditions, such as eliminating only some kind of error or increasing the complexity of the hardware. A few methods can estimate multiple errors without changing the hardware circuit. To improve the dynamic performance of the TIADC system, on the basis of an in-depth study of the channel mismatch error of TIADC, according to the system identiﬁcation theory, an identiﬁcation model is designed to characterize the frequency characteristics of TIADC. Using the system observation data, the transfer function parameters of the system are recursively estimated. By constructing and verifying the identiﬁcation model of the TIADC system, and then through the frequency domain correction method, a digital compensation ﬁlter is established to complete the error correction of the system. The test results of the four-channel TIADC high-speed data acquisition system show that the actual input and output characteristics of the test system are consistent with the nature of the identiﬁcation model. The four channels of the TIADC system are provided by four sub-channels of two AD9653 chips, and the highest sampling rate of a single channel is 125MSPS. For sinusoidal input signals from 20 MHz to 150 MHz, the sampling system can achieve a signal-to-noise ratio (SNR) above 56.8 dB and spurious free dynamic range (SFDR) above 69.7 dB. The dynamic performance of the sampling system is nearly equivalent to that of its sub-ADC; the feasibility of the model identiﬁcation method and the effectiveness of error correction are veriﬁed in simulation and experiment. Author and J.L.; methodology, D.Z.; software, J.J.; validation, N.S., D.Z. and J.J.; formal analysis, X.P.; investigation, S.W.; resources, Z.Z.; data curation, W.C.; writing—original draft preparation, N.S.; writing—review and editing, N.S.; visualization, C.H.; supervision, D.Z.; administration,


Introduction
Data acquisition systems have been widely used in instrument measurement, communication, aerospace and medical fields [1][2][3][4][5][6][7][8]. As the core component of a data acquisition system, an analog-to-digital converter (ADC) is the only way to achieve analog/digital conversion, the performance of the ADC has a direct impact on the performance of the data acquisition system [9]. With the development of electronic information technology and the increase in the complexity of the testing environment, the frequency and bandwidth of the simulated signal to be tested are getting higher and higher, and at the same time, our bandwidth of the simulated signal to be tested are getting higher and higher, and at the same time, our requirements for the observation of signal details are also increasing. Forasmuch as these practical factors, we put forward higher requirements for the performance of ADC. The ADC's performance is primarily determined by two factors: sampling speed and sampling accuracy [10]; the higher the sampling speed of ADC, the higher the frequency of the analog signal that can be collected and the more accurate the real-time change of the analog signal that can be observed; and the higher the sampling accuracy of the ADC, the more accurate the digital quantization of the analog signal. To meet the requirements of real-time sampling and processing of analog signals, the sampling rate of ADC should be improved as much as possible under the condition of a certain sampling accuracy.
Most data acquisition systems designed in practical engineering applications use the multi-channels of a single ADC to complete synchronous acquisition. However, the single-channel performance of ADC has reached a bottleneck, which greatly limits the improvement in the performance of the data acquisition system. For ADC to consider both the high sampling rate and high resolution, high circuit design and manufacturing processes are needed, which greatly increases the cost of data acquisition systems. Therefore, based on the consideration of cost, if we want to maximize the acquisition ability of the data acquisition system, the sampling theory of Time-Interleaved ADC (TIADC) proposed by W.C. Black and D.A. Hodges, in 1980, can be used [11]. The basic principle of TIADC is to use several ADCs with low sampling rates to sample a simulated signal under the same clock frequency and different clock phases to improve the sampling rate of the data acquisition system. In the ideal state, the sampling rate of the n-channel TIADC system is n times that of a single sub-ADC. As shown in Figure 1, the working principle diagram of the TIADC system in the ideal state is shown. Using TIADC sampling technology can greatly improve data acquisition system performance, but it also introduces a new issue-channel mismatch. Bias mismatch, gain mismatch, time mismatch, and bandwidth mismatch are the most common types of channel mismatch [1,[12][13][14]. Channel mismatch will seriously reduce the spurious-free dynamic range (SFDR), signal-to-noise ratio (SNR) and distortion rate (SNDR) of the TIADC system. These mismatch errors are derived from the manufacturing process deviation and the physical factors of specific circuits, which are usually difficult to predict and avoid. Therefore, in practical engineering applications, the data acquisition system using TIADC is affected by mismatches, resulting in the deterioration of the dynamic performance of the acquisition system [15].
To solve the problem of a TIADC system caused by channel mismatch, many scholars worldwide have conducted much research on the channel mismatch error of TIADC. In reference [16][17][18], the researchers used a calibration structure with a reference ADC. A premise for using this method is that the accuracy of the reference ADC must be higher than the requirements of TIADC, and its sampling rate must be lower than or even far below TIADC. Although this method can correct the bias and gain mismatch based on Using TIADC sampling technology can greatly improve data acquisition system performance, but it also introduces a new issue-channel mismatch. Bias mismatch, gain mismatch, time mismatch, and bandwidth mismatch are the most common types of channel mismatch [1,[12][13][14]. Channel mismatch will seriously reduce the spurious-free dynamic range (SFDR), signal-to-noise ratio (SNR) and distortion rate (SNDR) of the TIADC system. These mismatch errors are derived from the manufacturing process deviation and the physical factors of specific circuits, which are usually difficult to predict and avoid. Therefore, in practical engineering applications, the data acquisition system using TIADC is affected by mismatches, resulting in the deterioration of the dynamic performance of the acquisition system [15].
To solve the problem of a TIADC system caused by channel mismatch, many scholars worldwide have conducted much research on the channel mismatch error of TIADC. In reference [16][17][18], the researchers used a calibration structure with a reference ADC. A premise for using this method is that the accuracy of the reference ADC must be higher than the requirements of TIADC, and its sampling rate must be lower than or even far below TIADC. Although this method can correct the bias and gain mismatch based on statistics, it is powerless for the unstatisticsable sampling time deviation and bandwidth mismatch caused by high-frequency sampling. This method has high complexity and high hardware Appl. Sci. 2022, 12, 6257 3 of 15 costs, which are not suitable for practical applications. References [19][20][21] studied the correction structure of reference channel randomization. Since the requirement for noise is lower than that for harmonic or spurious, the reference channel randomization structure is an expedient scheme based on this principle. The randomization structure of the reference channel breaks the regularity of each channel and converts the harmonic or stray energy caused by all non-ideal factors into noise, including bias, gain, bandwidth mismatch and sampling time deviation. However, the reference channel randomization structure only converts harmonics or spurious into noise and does not eliminate these energies. Therefore, failure to really improve performance is the most fundamental flaw in this scheme. In the literature [22,23], the investigators studied the structure of a single preceding Sample-and-Hold Amplifier (pre-SHA), which directly used a single pre-SHA to sample and hold the input signal, and then assigned the retained signal to each sub-ADC in sequence, which no longer needed their own SHA. The single pre-SHA structure not only completely solves the sampling time deviation, but also solves the imbalance, gain and bandwidth mismatch caused by numerous channels; and most importantly, a single pre-SHA determines the entire bandwidth, and this structure almost completely solves the bandwidth mismatch. Although a single pre-SHA structure seems to reduce hardware complexity, it violates the most essential idea of time alternation-parallel processing. For the two-channel TIADC system, the single pre-SHA structure can nearly achieve the requirement of speed doubling, but with the increase in the number of channels, the difficulty of realizing this method will increase to an unimaginable degree. Therefore, in the current research, this structure can only be implemented in a two-channel TIADC system that does not have universal applicability. In References [24][25][26], the split ADC correction structure was used by the researchers; this method is used to correct bias and gain mismatches. The hardware cost is also acceptable, and the method is novel and distinct. However, it still does not solve the correction problem of the sampling time deviation. This structure restricts the correction of sampling time deviation and is appropriate only for low-frequency input conditions with limited bandwidth. For various reasons, such as technology and conditions, many calibration algorithms in the current research are limited by the input signal and do not consider the broadband signal that is more widely used in practice, so they are not universally applicable. While some calibration algorithms improve system performance, they have flaws, such as complex calculations, difficult hardware implementation, resource waste, and so on, and they are also unable to balance performance and cost. In this paper, system identification theory is applied to the TIADC system, which can consider some unknown errors that cannot be quantified and can further improve the correction accuracy of the TIADC system.
The remainder of this paper is introduced briefly as follows: Section 2 proposes a calibration method for TIADC system error based on system identification theory. Section 3 introduces the hardware platform of a 16-bit and four-channel TIADC high-speed data acquisition system used to validate the calibration method's feasibility. Section 4 provides an overview of the simulation and experimental results. Section 5 is a work summary.

Research on the Calibration Method
The identification model is established and analyzed in this section. In order to solve the channel mismatch problem of the TIADC system more effectively and improve the universality of the data acquisition system in various application scenarios, with the analysis of the TIADC system's structure, this paper designs an identification model to describe the frequency characteristics of the TIADC system based on system identification theory. This process will be elaborated on in Section 2.1. The frequency characteristic parameters of the TIADC system are analyzed in Section 2.2. The recursive parameters are estimated by the method described in Section 2.3, and the identification model is established using the frequency characteristic observation data of the TIADC system. Among them, the larger the input signal frequency range used by the observation frequency characteristics, the more accurate the estimation of the recursive parameters and the wider the scope of application of the system. Finally, in Section 2.4, through the frequency domain correction method, a digital compensation filter is established. In Section 2.5, we summarize the correction methods and expound on the methods to correct the whole TIADC system error. The working mechanism of the TIADC error correction system based on parameter estimation of the identification model is shown in Figure 2. The signal conditioning module in the front-end of analog signal input contains an analog filter, which can reduce the noise of the signal output from the sensor, reduce the order of the identification model, reduce the complexity of digital signal processing and improve the real-time performance of the system. them, the larger the input signal frequency range used by the observation frequency characteristics, the more accurate the estimation of the recursive parameters and the wider the scope of application of the system. Finally, in Section 2.4, through the frequency domain correction method, a digital compensation filter is established. In Section 2.5, we summarize the correction methods and expound on the methods to correct the whole TIADC system error. The working mechanism of the TIADC error correction system based on parameter estimation of the identification model is shown in Figure 2. The signal conditioning module in the front-end of analog signal input contains an analog filter, which can reduce the noise of the signal output from the sensor, reduce the order of the identification model, reduce the complexity of digital signal processing and improve the real-time performance of the system.  Figure 3 shows the flow chart for the TIADC system to establish an identification model, including experimental design, data processing, system analysis, determination of model structure, parameter estimation, and model verification. First, through the analysis of the TIADC system, a model structure is established, and a reasonable experiment is designed according to the prior knowledge and motion law of the system to ensure that the identification can achieve the desired effect. The data used for identification need to be processed in advance to improve the accuracy of identification and the availability of the identification model. After establishing the structure of the model, the values of some parameters in the model are unknown, so it is necessary to estimate the unknown parameters according to the input and output data. The model obtained by parameter estimation must be verified by the model to test its effectiveness until the performance of the identified model is close to that of the actual system.  Figure 3 shows the flow chart for the TIADC system to establish an identification model, including experimental design, data processing, system analysis, determination of model structure, parameter estimation, and model verification. First, through the analysis of the TIADC system, a model structure is established, and a reasonable experiment is designed according to the prior knowledge and motion law of the system to ensure that the identification can achieve the desired effect. The data used for identification need to be processed in advance to improve the accuracy of identification and the availability of the identification model. After establishing the structure of the model, the values of some parameters in the model are unknown, so it is necessary to estimate the unknown parameters according to the input and output data. The model obtained by parameter estimation must be verified by the model to test its effectiveness until the performance of the identified model is close to that of the actual system. them, the larger the input signal frequency range used by the observation frequency characteristics, the more accurate the estimation of the recursive parameters and the wider the scope of application of the system. Finally, in Section 2.4, through the frequency domain correction method, a digital compensation filter is established. In Section 2.5, we summarize the correction methods and expound on the methods to correct the whole TIADC system error. The working mechanism of the TIADC error correction system based on parameter estimation of the identification model is shown in Figure 2. The signal conditioning module in the front-end of analog signal input contains an analog filter, which can reduce the noise of the signal output from the sensor, reduce the order of the identification model, reduce the complexity of digital signal processing and improve the real-time performance of the system.  Figure 3 shows the flow chart for the TIADC system to establish an identification model, including experimental design, data processing, system analysis, determination of model structure, parameter estimation, and model verification. First, through the analysis of the TIADC system, a model structure is established, and a reasonable experiment is designed according to the prior knowledge and motion law of the system to ensure that the identification can achieve the desired effect. The data used for identification need to be processed in advance to improve the accuracy of identification and the availability of the identification model. After establishing the structure of the model, the values of some parameters in the model are unknown, so it is necessary to estimate the unknown parameters according to the input and output data. The model obtained by parameter estimation must be verified by the model to test its effectiveness until the performance of the identified model is close to that of the actual system. In the TIADC system, if a channel mismatch is not considered, the ADC modules of each channel can be reasonably equivalent to the first-order RC circuit. After experimental verification, the analog filter in the conditioning module can be realized using the secondorder RLC circuit. The equivalent model of a single sub-channel in the TIADC system in an ideal state is shown in Figure 4.  In the TIADC system, if a channel mismatch is not considered, the ADC modules of each channel can be reasonably equivalent to the first-order RC circuit. After experimental verification, the analog filter in the conditioning module can be realized using the secondorder RLC circuit. The equivalent model of a single sub-channel in the TIADC system in an ideal state is shown in Figure 4. First, according to Kirchhoff's law, the differential equation of the equivalent model circuit of a single sub-channel in a TIADC system under an ideal state is as follows:

Determination and Analysis of the Model Structure
Among them, i U represents the voltage of the analog input signal, After Laplace transform of the equivalent model circuit differential equation, it can be transformed into the following form: From Equation (2), the transfer function equations of the equivalent model of a single sub-channel in the TIADC system under an ideal state can be obtained as follows: Considering the actual factors, the channel mismatch errors, such as DC bias o Δ , static gain g Δ and aperture delay t Δ of each channel are introduced into the ADC equivalent model, as shown in Figure 5. First, according to Kirchhoff's law, the differential equation of the equivalent model circuit of a single sub-channel in a TIADC system under an ideal state is as follows: Among them, U i represents the voltage of the analog input signal, U o1 represents the output voltage of the analog input signal after filtering circuit, U o represents the output voltage of U o1 after ADC sampling and keeping the front end.
After Laplace transform of the equivalent model circuit differential equation, it can be transformed into the following form: From Equation (2), the transfer function equations of the equivalent model of a single sub-channel in the TIADC system under an ideal state can be obtained as follows: Considering the actual factors, the channel mismatch errors, such as DC bias ∆o, static gain ∆g and aperture delay ∆t of each channel are introduced into the ADC equivalent model, as shown in Figure 5.
where ω n denotes the undamped oscillation frequency of the system, ξ denotes the damping ratio of the system, ω c denotes the cutoff frequency of the system, and e s∆t denotes the time delay processes of the system. The values of ω n , ξ, ω c are related to the actual hardware circuit. Then, the transfer function of a single sub-channel in the TIADC system identification model can be expressed as The time delay process j t e ω of the system is expanded in the form of the Taylor series as follows: In the Equation (6), each power of jω denotes that the output of the delay link contains the derivative of the input, because the sample-and-hold structure itself is a firstorder structure, and its high-order change rate is very small, so the high-order terms can be omitted, and the approximate form is as follows: By combining Equations (5) and (7), the transfer function of the single sub-channel ADC equivalent model in the TIADC system can be expressed as follows:  According to the relationship between system frequency characteristics and the transfer function, the frequency response function G(jω) of single sub-channel ADC in the TIADC system identification model can be expressed as follows: The time delay process e jω t of the system is expanded in the form of the Taylor series as follows: In the Equation (6), each power of jω denotes that the output of the delay link contains the derivative of the input, because the sample-and-hold structure itself is a first-order structure, and its high-order change rate is very small, so the high-order terms can be omitted, and the approximate form is as follows: By combining Equations (5) and (7), the transfer function of the single sub-channel ADC equivalent model in the TIADC system can be expressed as follows:

Frequency Characteristic Analysis of the TIADC System Identification Model
In fact, identification is the process of extracting mathematical models from a system's input and output data. When the order of differential equations is higher, it is very heavy work to decompose denominator polynomials without the aid of computers. Therefore, after establishing a mathematical model of a complex field, the solution to the equation is generally not required. One of the advantages of the Laplace transform is that it can use a graphic method to predict system performance.
To facilitate the estimation of parameters of the TIADC system identification model, the transfer function in Equation (8) can be transformed into the following form: In Equation (9), m 1 , m 2 , . . . , m k , n 1 , n 2 , n 3 and n k represent the parameters to be identified, and k is the system order-number. For different applications, the order of the identification system may be even or odd. The transformation from Equation (8) to Equation (9) is a completely mathematical process. The frequency characteristics of the system can be expressed as follows: If k is odd, define the parameter vectors and information vectors in Equation (10) as follows: If k is even, define the parameter vectors and information vectors in Equation (10) as follows: ψ(ω) = −ω 2 , ω 4 , −ω 6 , · · · , (−1) k/2 ω k T ∈ R k/2 Whether k is odd or even, the transfer function of the system can be expressed by these parameter vectors and information vectors. They can be transformed into the following forms: According to Equation (23), the expressions of real part Re[G(jω)] and imaginary part Im[G(jω)] of frequency characteristics can be obtained: The real part Re[G(jω)] and imaginary part Im[G(jω)] of the frequency characteristics contain all the parameters n 0 , α 1 , α 2 , β 1 and β 2 of the system to be identified, which are also all the unknown parameters contained in the system transfer function.
The frequency characteristic can also be expressed as the plural form of the sum of the real part and the imaginary part, namely: where M(ω) Called the real frequency characteristic, N(ω) Called virtual frequency characteristic, j 2 = −1.
For the identification problem, using the observed data to construct the criterion function for estimating the unknown parameters is the key to realizing the parameter estimation, and the principle of establishing the criterion function is to realize the minimum error between the observed output and the model output. It can be seen from the frequency characteristic expression that the expressions of the real part and the imaginary part contain all the parameters to be identified in the system, so we can construct the criterion function through the expressions of the real or imaginary frequency characteristics.

Least Mean Square Parameter Estimation Algorithm Based on Virtual Frequency Characteristics
Because the real frequency characteristic expression is more complex than the virtual frequency characteristic expression, the derived algorithm is more complex in form, so this paper uses the least mean square parameter estimation algorithm based on virtual frequency characteristics.
In the frequency response identification experiment, a sine signal u(t) = U sin(ωt) with frequency ω and amplitude U is applied to the input end of the system to be identified, and theoretically ω ∈ [0, ∞]. The frequency characteristic observation data {M(ω k ), N(ω k )} corresponding to each discrete frequency point ω k (k = 0, 1, 2, . . . ) are collected.
According to Equation (25), the criterion function J * (ϑ) based on virtual frequency characteristics is constructed by using the observation data of virtual frequency characteristics {N(ω k ), k = 0, 1, 2, · · ·}, which is defined as the square of the difference between the observation data of virtual frequency characteristics N(ω k ) and the model output Transform the expression of virtual frequency characteristics in Equation (25) into the following form: Since the virtual frequency characteristic observation data N(ω k ) contains measurement noise, there is an error between the virtual frequency characteristic observation data N(ω k ) and the model output Im[G(jω)]. Therefore, according to Equation (28), the equation error expression is defined as: The expression of the dynamic data criterion function based on Equation (29) is as follows: The estimation of the system parameter ϑ = n 0 , α T 1 , α T 2 , β T 1 , β T 2 when the kth frequency ω k is input is expressed as: Based on the principle of a negative gradient search, the minimum mean square algorithm of parameters n 0 , α 1 , α 2 , β 1 and β 2 in Equation (9) can be obtained by minimizing the criterion function J(ϑ): To sum up, the steps of estimating system transfer function parameters based on the least mean square parameter estimation algorithm of virtual frequency characteristics are as follows: the specific process is shown in Figure 6.

2.
A sinusoidal excitation signal is applied to collect the observed data N(ω k ) of virtual frequency characteristics.
The gradient vector g k is calculated and formed by Equation (39), and the optimal step size µ(ω k ) (approximate step size can be taken) is calculated by Equation (38). 6.
To sum up, the steps of estimating system transfer function parameters based on the least mean square parameter estimation algorithm of virtual frequency characteristics are as follows: the specific process is shown in Figure 6.

Frequency Domain Correction Method
After the parameter estimation and verification of the identification model of the TIADC system is completed, we obtain an identification model with dynamic performance close to the actual hardware system. To improve the dynamic performance of the TIADC system, eliminating the dynamic error of the system is the first issue to be considered. When the transfer function of the measurement system is G(s) and the Laplace transform of the measured signal is X(s), the dynamic error of the measurement results is as follows: Equation (41) shows that the dynamic error of the system is related to the dynamic characteristics of the measurement system and the spectrum structure of the measured signal. The frequency domain correction method calculates the spectrum X(jω) of the measured signal from the frequency characteristic G(jω) of the test system and the spectrum Y(jω) of the measured signal, and then uses the inverse Fourier transform to obtain the estimated value of the measured signal, which can be expressed as: Next, the discrete transfer function of the TIADC system is used to directly recover the measured signal from the measured results using the deconvolution method, and good results can be obtained. The calculation of this algorithm is relatively small, and most of the calculations can be carried out in advance before the experiment. Therefore, it can be used in online test corrections or test data processing systems. Suppose x(t) is the input analog signal, and y(t) is the measurement result of the TIADC system. According to the bilinear transformation method, the transfer function of the TIADC system can be discretized and transformed into the following form: When Equation (43) is described by the difference equation, it can be expressed as: In Equation (44), x(k), y(k) are sampled values of x(t), y(t), respectively. Equation (44) shows that the measured signal can be recovered from the measured signal with the discrete transfer function of the TIADC system. Among them, the sampling interval ∆T of y(k) should be consistent with the switching period ∆T 0 (i.e., the sampling interval of the analog/digital converter) of the discrete system G z −1 . Therefore, before the experiment is conducted, every sampling interval ∆T is selected, and the discrete transfer function must be calculated by the continuous transfer function G(s).

Summary of Calibration Methods
The error estimation and correction of any single channel of the TIADC system can be realized in Sections 2.1-2.4. Through the strict distribution and management of the phase and clock of each channel of the TIADC system, after the error correction of each channel is completed, the output of each channel is merged to realize the output correction of the TIADC system.

Construction of the Experimental Platform
To verify the feasibility of the model identification method and the effectiveness of compensation, this section introduces a 16-bit, four-channel TIADC high-speed data acquisition system hardware platform. This hardware platform is mainly composed of an FPGA (XC7K410T) processing motherboard, a collection board containing two AD9653 chips, a clock board, a power divider and a computer. The clock board is configured by the host computer to generate the sampling clock and phase required by each sub-channel of the TIADC acquisition system, and a sinusoidal signal is generated as the analog input signal of the acquisition system. The analog signals are connected to the power divider and divided into four signals, which are sent to four ADC sub-channels. The data collected by the ADC acquisition board are sent to the DDR3 cache after FPGA preprocessing, and the cached data are transmitted to the computer through the USB3.0 data post-processing interface. Figure 7 shows the overall structure of the TIADC data acquisition system. Equation (44) shows that the measured signal can be recovered from the measured signal with the discrete transfer function of the TIADC system. Among them, the sampling interval T Δ of ( ) y k should be consistent with the switching period 0 T Δ (i.e., the sampling interval of the analog/digital converter) of the discrete system ( ) 1 G z − . Therefore, before the experiment is conducted, every sampling interval T Δ is selected, and the discrete transfer function must be calculated by the continuous transfer function ( ) G s .

Summary of Calibration Methods
The error estimation and correction of any single channel of the TIADC system can be realized in Sections 2.1-2.4. Through the strict distribution and management of the phase and clock of each channel of the TIADC system, after the error correction of each channel is completed, the output of each channel is merged to realize the output correction of the TIADC system.

Construction of the Experimental Platform
To verify the feasibility of the model identification method and the effectiveness of compensation, this section introduces a 16-bit, four-channel TIADC high-speed data acquisition system hardware platform. This hardware platform is mainly composed of an FPGA (XC7K410T) processing motherboard, a collection board containing two AD9653 chips, a clock board, a power divider and a computer. The clock board is configured by the host computer to generate the sampling clock and phase required by each sub-channel of the TIADC acquisition system, and a sinusoidal signal is generated as the analog input signal of the acquisition system. The analog signals are connected to the power divider and divided into four signals, which are sent to four ADC sub-channels. The data collected by the ADC acquisition board are sent to the DDR3 cache after FPGA preprocessing, and the cached data are transmitted to the computer through the USB3.0 data post-processing interface. Figure 7 shows the overall structure of the TIADC data acquisition system.

Verification of the Identification Model and Compensation
After the estimation of all the unknown parameters contained in the transfer function of the TIADC system is completed, the results of system identification are verified in this section. Through the electronic test of the four-channel TIADC data acquisition system, the accuracy of the parameter estimation algorithm was verified.
The test standard for ADC is IEEE 1241-2010 [27]. According to this standard, the sine wave can be used for testing, mainly because the sine wave frequency is single, and spectrum analysis can intuitively observe the characteristics of the system. The digital signal converted by the ADC system can be used to calculate its static performance

Verification of the Identification Model and Compensation
After the estimation of all the unknown parameters contained in the transfer function of the TIADC system is completed, the results of system identification are verified in this section. Through the electronic test of the four-channel TIADC data acquisition system, the accuracy of the parameter estimation algorithm was verified.
The test standard for ADC is IEEE 1241-2010 [27]. According to this standard, the sine wave can be used for testing, mainly because the sine wave frequency is single, and spectrum analysis can intuitively observe the characteristics of the system. The digital signal converted by the ADC system can be used to calculate its static performance parameters by histogram statistical analysis. The spectrum can also be directly obtained through FFT analysis, and then its dynamic performance parameters can be calculated.
To verify the proposed parameter estimation method, the TIADC data acquisition system mentioned in Section 3 is tested. The four ADC channels used in the TIADC system are realized by two AD9653 chips, and a single frequency sine wave is generated by the clock board. The TIADC test system is shown in Figure 8, and the ADC acquisition card is shown in Figure 9.
Appl. Sci. 2022, 12, x FOR PEER REVIEW 13 of 16 parameters by histogram statistical analysis. The spectrum can also be directly obtained through FFT analysis, and then its dynamic performance parameters can be calculated.
To verify the proposed parameter estimation method, the TIADC data acquisition system mentioned in Section 3 is tested. The four ADC channels used in the TIADC system are realized by two AD9653 chips, and a single frequency sine wave is generated by the clock board. The TIADC test system is shown in Figure 8, and the ADC acquisition card is shown in Figure 9.  By identifying and analyzing the four sub-channel models of the acquisition system, a comparison of the characteristic curves between the model of the acquisition system and the actual input and output can be obtained, as shown in Figure 10. It can be seen from the comparison of amplitude-frequency and phase-frequency curves of four sub-ADC channels that the trend of the results of the identified model is similar to the experimental data, which shows the feasibility and validity of this proposed method.  parameters by histogram statistical analysis. The spectrum can also be directly obtained through FFT analysis, and then its dynamic performance parameters can be calculated.
To verify the proposed parameter estimation method, the TIADC data acquisition system mentioned in Section 3 is tested. The four ADC channels used in the TIADC system are realized by two AD9653 chips, and a single frequency sine wave is generated by the clock board. The TIADC test system is shown in Figure 8, and the ADC acquisition card is shown in Figure 9.  By identifying and analyzing the four sub-channel models of the acquisition system, a comparison of the characteristic curves between the model of the acquisition system and the actual input and output can be obtained, as shown in Figure 10. It can be seen from the comparison of amplitude-frequency and phase-frequency curves of four sub-ADC channels that the trend of the results of the identified model is similar to the experimental data, which shows the feasibility and validity of this proposed method.
By identifying and analyzing the four sub-channel models of the acquisition system, a comparison of the characteristic curves between the model of the acquisition system and the actual input and output can be obtained, as shown in Figure 10. It can be seen from the comparison of amplitude-frequency and phase-frequency curves of four sub-ADC channels that the trend of the results of the identified model is similar to the experimental data, which shows the feasibility and validity of this proposed method. parameters by histogram statistical analysis. The spectrum can also be directly obtained through FFT analysis, and then its dynamic performance parameters can be calculated.
To verify the proposed parameter estimation method, the TIADC data acquisition system mentioned in Section 3 is tested. The four ADC channels used in the TIADC system are realized by two AD9653 chips, and a single frequency sine wave is generated by the clock board. The TIADC test system is shown in Figure 8, and the ADC acquisition card is shown in Figure 9.  By identifying and analyzing the four sub-channel models of the acquisition system, a comparison of the characteristic curves between the model of the acquisition system and the actual input and output can be obtained, as shown in Figure 10. It can be seen from the comparison of amplitude-frequency and phase-frequency curves of four sub-ADC channels that the trend of the results of the identified model is similar to the experimental data, which shows the feasibility and validity of this proposed method. Due to the existence of gain mismatch and phase mismatch, spurious will appear in the spectrum of 30 MHz, 83.3 MHz and 136.4 MHz. The output spectrum of the 150 MHz sinusoidal signal before and after compensation is shown in Figure 11. For sinusoidal input signals from 20 MHz to 150 MHz, after calibration by the TIADC system, SNR above 59 dB and SFDR above 68 dB can be obtained. SNR increased by more than 12 dB, and SFDR increased by more than 13 dB. The dynamic performance of the TIADC system is close to that of its sub-ADC, indicating the effectiveness of this method. Due to the existence of gain mismatch and phase mismatch, spurious will appear in the spectrum of 30 MHz, 83.3 MHz and 136.4 MHz. The output spectrum of the 150 MHz sinusoidal signal before and after compensation is shown in Figure 11. For sinusoidal input signals from 20 MHz to 150 MHz, after calibration by the TIADC system, SNR above 59 dB and SFDR above 68 dB can be obtained. SNR increased by more than 12 dB, and SFDR increased by more than 13 dB. The dynamic performance of the TIADC system is close to that of its sub-ADC, indicating the effectiveness of this method.
(a) (b) Figure 11. The output spectrum of the 150 MHz sinusoidal signal before and after compensation: (a) before calibration; (b) after calibration.
In Table 1, we compare the method in reference [28] with the method in this paper. After the correction of these two methods, the dynamic performance of the TIADC system used in this paper is very close, which further proves the feasibility of this method in this paper. Table 1. Comparison of the correction effects of the methods in [28] and in this article.

Method
SNR/dB SFDR/dB Method used in this article 59.1 68.9 Method used in [28] 56.4 70.3

Conclusions
This paper presents a parameter estimation and calibration method for the TIADC system identification model. According to system identification theory, the TIADC system identification model is established. The least mean square estimation algorithm is used to estimate the parameters related to the system frequency characteristics, and the digital compensation filter is established through the frequency domain correction method to correct the error of the TIADC system. A 16-bit, four-channel TIADC data acquisition system is used to verify the proposed method. Through simulation and experiments, the actual input and output characteristics of the data acquisition system are consistent with the nature of the identification model, and the digital compensation filter established by the frequency domain correction method has high correction accuracy. The data acquisition system can achieve SNR above 59.1 dB and SFDR above 68.9 dB in the input signal from 150 MHz. SNR increases more than 12 dB, SFDR increases more than 13 dB, and the dynamic performance of the system is close to its sub-ADC dynamic performance. The In Table 1, we compare the method in reference [28] with the method in this paper. After the correction of these two methods, the dynamic performance of the TIADC system used in this paper is very close, which further proves the feasibility of this method in this paper. Table 1. Comparison of the correction effects of the methods in [28] and in this article.

Method SNR/dB SFDR/dB
Method used in this article 59.1 68.9 Method used in [28] 56.4 70.3

Conclusions
This paper presents a parameter estimation and calibration method for the TIADC system identification model. According to system identification theory, the TIADC system identification model is established. The least mean square estimation algorithm is used to estimate the parameters related to the system frequency characteristics, and the digital compensation filter is established through the frequency domain correction method to correct the error of the TIADC system. A 16-bit, four-channel TIADC data acquisition system is used to verify the proposed method. Through simulation and experiments, the actual input and output characteristics of the data acquisition system are consistent with the nature of the identification model, and the digital compensation filter established by the frequency domain correction method has high correction accuracy. The data acquisition system can achieve SNR above 59.1 dB and SFDR above 68.9 dB in the input signal from 150 MHz. SNR increases more than 12 dB, SFDR increases more than 13 dB, and the dynamic performance of the system is close to its sub-ADC dynamic performance. The experimental results show the feasibility of the model identification method and the effectiveness of error correction.