A Transformer-Less Buck-Boost Grid-Tied Inverter with Low Leakage-Current and High Voltage-Gain

: To improve the efﬁciency of photovoltaic (PV) grid-tied systems and simplify the circuit structure, many pseudo DC-link inverters have been proposed by combining a sinusoidal pulse-width modulation (SPWM) controlled buck-boost converter and a low-frequency polarity unfolder. However, due to the non-ideal characteristics of power diodes, the voltage-gain of a buck-boost converter is limited. To meet the needs of grid-connected systems with low input voltage and 220 V rms utility, this paper uses two two-switch buck-boost converters with coupled inductors to develop a transformer-less buck-boost grid-tied inverter with low leakage-current and high voltage-gain. The proposed inverter is charging on the primary side of the coupled inductor and discharging in series on the primary side and the secondary side so that the voltage-gain can be greatly increased. Furthermore, the utility line can be connected to the negative end of the PV array to suppress leakage current, and the unfolding circuit can be simpliﬁed to reduce the conduction losses. High-frequency switching is only performed in one metal-oxide-semiconductor ﬁeld-effect transistor (MOSFET) in each mode, which can effectively improve conversion efﬁciency. A prototype was implemented to obtain experimental results and to prove the validity of the proposed circuit structure.


Introduction
In recent years, the amount of greenhouse gas emissions has risen rapidly along with the development of technology. On the premise of maintaining the natural environment, replacing petrochemical energy with non-radioactive and pollution-free renewable energy is an urgent and necessary work. Among the renewable energies that have been developed, the technology of PV power generation has been quite mature, making PV distributed power generation systems grow rapidly.
For PV power generation systems powered in parallel with the mains, an inverter is required to convert the PV output voltage into an AC output, so that many scholars focus on the investigation of the circuit structure of inverters [1,2]. The common H-bridge inverter is typed of buck. Since the output voltage of PV array is low level and varies greatly with the temperature and the intensity of sunlight, the general PV grid-tied system needs to insert a boost converter, as shown in Figure 1. This boost converter can achieve the functions of input-voltage regulation and maximum-power-point tracking [3]. However, except for increasing the number of components, increasing costs, and reducing reliability, the main shortcoming is lowering the system efficiency caused by multiple energy processing.
To overcome these problems, many single-stage inverters derived from boost or buck-boost converters have been proposed [4][5][6], but they are restricted by the usage of two input sources or the wide-range changes in input voltage. Therefore, high-efficiency pseudo DC-link inverters [7][8][9][10][11][12][13], as shown in Figure 2, are propose to overcome these shortcomings. As can be seen from Figure 2, a high-frequency DC-DC converter generates a unipolar half-wave and a low-frequency unfolder switches the polarity to produce AC Moreover, in the grid-tied applications, because of high efficiency, small size, and low cost, the transformer-less inverters are more attractive than those with transformers [14,15]. However, there is a parasitic capacitance between the PV panel and the frame ground, which may induce leakage current and cause electromagnetic interference, current harmonics, and power loss [16]. There are three main methods to suppress leakage current [17]: (1) Separating the PV array from utility-line in freewheeling mode; (2) Connecting the mains to the center of two DC-bus capacitors to limit the common mode voltage (CMV); (3) Connecting the mains directly to the negative end of the PV array. Distinguished by the circuit structures, transformer-less inverters with low leakage current can be classified as: (1) Diode-clamped architecture [18], (2) H5 [19], (3) HERIC [20], (4) oH5 [21], (5) H6 [22], and (f) HBZVR [23]. The H5 inverter suppresses the leakage current by adding one power switch to keep CMV as constant [19]. The oH5 inverter improves the voltage stresses of the power components by adding one additional switch to clamp CMV to be half of the H5 inverter [21]. A non-isolated inverter with step-up/down capability is proposed in the literature [17], in which a power switch is added to control the freewheeling path of inductor current. This inverter connects the utility-line to the negative end of the PV array, which can suppress leakage current. However, the disadvantage of this inverter is that it operates with the principle of buck-boost. The energy needs to be saved in shortcomings. As can be seen from Figure 2, a high-frequency DC-DC converter generates a unipolar half-wave and a low-frequency unfolder switches the polarity to produce AC voltage. Since the high-frequency energy processing is only performed once, efficiency can be improved by reducing power losses. Among these inverters, the flyback and forward converters can be used as the front-end circuit to achieve high voltage-gain and electrical isolation [7][8][9]. To apply to PV grid-tied systems with wide-ranging input-voltage changes, non-isolated pseudo DC-Link inverters are usually implemented by buck-boost converters [10][11][12][13]. If the power switches of the two-switch buck-boost converter are switched independently, the non-isolated inverter can work with the principle of either buck type or boost type. Part of the energy could be directly transferred to the output, which can improve conversion efficiency. Theoretically, the buck-boost converter has extremely high voltage gain. However, in practice, due to the non-ideal characteristics of the power elements and the reverse-recovery issue of diodes under a high duty ratio, the voltage gain is restricted. When the input voltage is low, these inverters are not feasible for the mains with high AC voltage. Moreover, in the grid-tied applications, because of high efficiency, small size, and low cost, the transformer-less inverters are more attractive than those with transformers [14,15]. However, there is a parasitic capacitance between the PV panel and the frame ground, which may induce leakage current and cause electromagnetic interference, current harmonics, and power loss [16]. There are three main methods to suppress leakage current [17]: (1) Separating the PV array from utility-line in freewheeling mode; (2) Connecting the mains to the center of two DC-bus capacitors to limit the common mode voltage (CMV); (3) Connecting the mains directly to the negative end of the PV array. Distinguished by the circuit structures, transformer-less inverters with low leakage current can be classified as: (1) Diode-clamped architecture [18], (2) H5 [19], (3) HERIC [20], (4) oH5 [21], (5) H6 [22], and (f) HBZVR [23]. The H5 inverter suppresses the leakage current by adding one power switch to keep CMV as constant [19]. The oH5 inverter improves the voltage stresses of the power components by adding one additional switch to clamp CMV to be half of the H5 inverter [21]. A non-isolated inverter with step-up/down capability is proposed in the literature [17], in which a power switch is added to control the freewheeling path of inductor current. This inverter connects the utility-line to the negative end of the PV array, which can suppress leakage current. However, the disadvantage of this inverter is that it operates with the principle of buck-boost. The energy needs to be saved in Moreover, in the grid-tied applications, because of high efficiency, small size, and low cost, the transformer-less inverters are more attractive than those with transformers [14,15]. However, there is a parasitic capacitance between the PV panel and the frame ground, which may induce leakage current and cause electromagnetic interference, current harmonics, and power loss [16]. There are three main methods to suppress leakage current [17]: (1) Separating the PV array from utility-line in freewheeling mode; (2) Connecting the mains to the center of two DC-bus capacitors to limit the common mode voltage (CMV); (3) Connecting the mains directly to the negative end of the PV array. Distinguished by the circuit structures, transformer-less inverters with low leakage current can be classified as: (1) Diode-clamped architecture [18], (2) H5 [19], (3) HERIC [20], (4) oH5 [21], (5) H6 [22], and (f) HBZVR [23]. The H5 inverter suppresses the leakage current by adding one power switch to keep CMV as constant [19]. The oH5 inverter improves the voltage stresses of the power components by adding one additional switch to clamp CMV to be half of the H5 inverter [21]. A non-isolated inverter with step-up/down capability is proposed in the literature [17], in which a power switch is added to control the freewheeling path of inductor current. This inverter connects the utility-line to the negative end of the PV array, which can suppress leakage current. However, the disadvantage of this inverter is that it operates with the principle of buck-boost. The energy needs to be saved in the inductor before being transmitted; it reduces the conversion efficiency and limits the output power.
Based on the previous considerations, a transformer-less buck-boost grid-tied inverter with low leakage-current and high voltage-gain is proposed. Two dual-switch buck-boost converters with coupled inductors are connected in parallel to generate a unipolar halfwave, and two low-frequency switches are adopted to switch the output polarity. When the proposed circuit operates in the step-up mode, the primary side of the coupled inductor is charged first, and then the primary side and the secondary side are discharged in series, which can increase voltage-gain. In addition, due to the use of two buck-boost converters in parallel, the polarity unfolder is able to be effectively simplified as two switches to reduce conduction losses. The mains can be directly attached to the negative end of the PV array to suppress leakage current. In addition, the proposed inverter also has the following features: 1.
Only single energy-processing is required, and high-frequency switching is only performed in one MOSFET in each mode, which can effectively improve efficiency; 2.
The inverter operates with the principle of boost or buck, so that part of the energy can be directly transmitted to improve efficiency; 3.
The proposed inverter is feasibility for PV grid-tied systems with wide-range voltage changes because of its step-up and step-down capabilities.

Circuit Configuration
The schematic of the investigated transformer-less buck-boost grid-tied inverter is illustrated in Figure 3. Two dual-switch buck-boost DC-DC converters with coupled inductors are connected in parallel and output unipolar half-waves respectively during positive and negative half-cycles. The dual-switch buck-boost converter for a positive half-cycle is mainly composed of the power switches S Bu1 , S Bo1 , the diodes D 1 , D 3 , and the coupled inductors L 1 , L 3 . The power switches S Bu2 , S Bo2 , the diodes D 2 , D 4 , and the coupled inductors L 2 , L 4 form the dual-switch buck-boost converter for the negative half-cycle. The capacitors C f , C s and the inductor L s are the output low-pass filter. Since this paper focuses on the steady-state characteristics and feasibility of the proposed circuit structure, the input source is represented by an ideal voltage source to simplify the circuit.  Figure 3. The schematic of the investigated transformer-less buck-boost grid-tied inverter.

Operation Principles
The investigated transformer-less buck-boost inverter is controlled by SPWM. Figure  4 is a conceptual diagram of the input voltage Vin, the mains voltage vs(t), the operation modes, and the switch driving-signals in a line-cycle, where the peak value VM of vs(t) is higher than Vin. Tac is the period of the mains voltage. As can be seen from Figure 4, based on the level of Vin and vs(t), the investigated buck-boost inverter works in step-down or step-up mode, respectively. In the following, with regard to these two modes, their working principles in steady-state and the equivalent circuits of high-frequency switching will During the positive (negative) half-cycle and in the step-down mode, the switch S Bu1 (S Bu2 ) performs high-frequency switching, and the power switch S Bo1 (S Bo2 ) is maintained in the off state. When S Bu1 (S Bu2 ) is turned on, energy is able to be directly delivered to the Appl. Sci. 2021, 11, 3625 4 of 19 output terminal via the switch S 1 (S 2 ). Its working principle is similar to a buck converter, resulting in greatly improving conversion efficiency.
During the positive (negative) half-cycle and in the step-up mode, the switch S Bo1 (S Bo2 ) performs high-frequency switching, and the power switch S Bu1 (S Bu2 ) remains on. When S Bo1 (S Bo2 ) is switched off, energy is able to be directly delivered to the output terminal via the diode D 3 (D 4 ) and the switch S 1 (S 2 ). Its working principle is similar to a boost converter, which can greatly improve conversion efficiency.
In addition, the switch S 1 (S 2 ) can provide a path for connecting the mains and the negative end of the input source, so that the leakage current of the PV array can be suppressed. The proposed transformer-less buck-boost inverter is appropriate for the PV grid-tied systems with wide-range voltage changes or high AC output-voltage because of its step-up and step-down capabilities. In addition, high-frequency switching is performed in only one MOSFET in each state, leading to low switching loss and high conversion efficiency.

Operation Principles
The investigated transformer-less buck-boost inverter is controlled by SPWM. Figure 4 is a conceptual diagram of the input voltage V in , the mains voltage v s (t), the operation modes, and the switch driving-signals in a line-cycle, where the peak value V M of v s (t) is higher than V in . T ac is the period of the mains voltage. As can be seen from Figure 4, based on the level of V in and v s (t), the investigated buck-boost inverter works in step-down or step-up mode, respectively. In the following, with regard to these two modes, their working principles in steady-state and the equivalent circuits of high-frequency switching will be provided in sequence.

Step-Down Mode
When the absolute value of the mains voltage |v s (t)| is lower than the input voltage V in , the step-down mode is performed. During the positive half-cycle (0 ≤ ωt ≤ π), the switch S Bu2 and the switches S Bo1 , S Bo2 remain in off state, and the switch S 1 remains in on state to provide a path for energy transfer. At this time, the power switch S Bu1 is controlled by high-frequency SPWM switching, and its duty ratio d Bu1 (t) is able to be presented as in Equation (1): when the switch S Bu1 is switched on, the diode D 1 turns off. Currently, the input voltage V in charges the inductors L 1 and L 3 in series through the switches S Bu1 and S 1 , and it transmits energy directly to the output. Figure 5a shows the corresponding circuit. When the switch S Bu1 is switched off and the diode D 1 is turned on, the inductors L 1 and L 3 in series release energy to the output. Figure 5b shows the corresponding circuit. The voltage gain of continuous conduction mode (CCM) is able to be presented as in Equation (2): It is worth mentioning that since the switch S 1 can connect the mains and the negative end of the input source, the leakage current of the PV array is able to be suppressed.

dBo1(t) dBo2(t) (VP-Vin )/(VP+NVin ) -Vin
Step-down  When the mains voltage v s (t) becomes negative (π ≤ ωt ≤ 2π), the switches S Bu1 , S Bo1 , and S Bo2 remain off, and the switch S 2 is turned on to provide a path for energy transmission. At this moment, the switch S Bu2 is controlled by high-frequency SPWM. Its duty ratio is the same as that of the switch S Bu1 in the positive half-cycle, which can be presented as in Equation (3): when the switch S Bu2 is switched on, the diode D 2 is switched off. At this moment, the input source V in charges the inductors L 2 , L 4 in series through the power switches S Bu2 and S 2 , and it transfers energy directly to the output. Figure 6a shows the corresponding circuit. When the switch S Bu2 is switched off, the diode D 2 is switched on, and the inductors L 2 , L 4 in series release energy to the output. Figure 6b shows the corresponding circuit, and the voltage gain of CCM is the same as Equation (2). In this state, the path of connecting the mains and the negative end of the input voltage is provided by the power switch S 2 , which can also achieve the effect of suppressing the leakage current of the PV array. When the mains voltage vs(t) becomes negative (π  ωt  2π), the switches SBu1, SBo1, and SBo2 remain off, and the switch S2 is turned on to provide a path for energy transmission. At this moment, the switch SBu2 is controlled by high-frequency SPWM. Its duty ratio is the same as that of the switch SBu1 in the positive half-cycle, which can be presented as in Equation (3): ( when the switch SBu2 is switched on, the diode D2 is switched off. At this moment, the input source Vin charges the inductors L2, L4 in series through the power switches SBu2 and S2, and it transfers energy directly to the output. Figure 6a shows the corresponding circuit. When the switch SBu2 is switched off, the diode D2 is switched on, and the inductors L2, L4 in series release energy to the output. Figure 6b shows the corresponding circuit, and the voltage gain of CCM is the same as Equation (2). In this state, the path of connecting the mains and the negative end of the input voltage is provided by the power switch S2, which can also achieve the effect of suppressing the leakage current of the PV array. . During the negative half-cycle, the corresponding circuits of step-down mode: (a) SBu1 OFF, SBu2 ON, SBo1 OFF, SBo2 OFF, S1 OFF, and S2 ON; (b) SBu1 OFF, SBu2 OFF, SBo1 OFF, SBo2 OFF, S1 OFF, and S2 ON.

Step-Up Mode
When the absolute value of the mains voltage |vs(t)| is higher than the input voltage Vin, the inverter works in step-up mode. The working principle of this mode is similar to that of a boost converter. The switch SBo1 (SBo2) is controlled by high-frequency SPWM. When the mains voltage vs(t) is positive (0  ωt  π), the switch SBu1 stays on, and the switch SBu2 stays off. When the switch SBo1 is switched on, the diode D3 is switched off, and switch S1 remains on to provide a path for energy delivering. At this moment, the input voltage Vin delivers energy to the inductor L1, and the capacitor Cf provides the energy required by the output. Figure 7a shows the corresponding circuit. The voltage across the inductor L1 is able to be expressed as in Equation (4): When the switch SBo1 is switched off, the diode D3 is switched on. At this moment, the input source Vin transfers energy to the output terminal and charges the capacitor Cf through the coupled inductors L1, L3 and the switch S1. Figure 7b shows the corresponding circuit. Since the conduction of the switch S1 can connect the mains and the negative end of the input source, the leakage current of the PV array can be suppressed. The voltage across the inductor L1 is able to be presented as in Equation (5):

Step-Up Mode
When the absolute value of the mains voltage |v s (t)| is higher than the input voltage V in , the inverter works in step-up mode. The working principle of this mode is similar to that of a boost converter. The switch S Bo1 (S Bo2 ) is controlled by high-frequency SPWM. When the mains voltage v s (t) is positive (0 ≤ ωt ≤ π), the switch S Bu1 stays on, and the switch S Bu2 stays off. When the switch S Bo1 is switched on, the diode D 3 is switched off, and switch S 1 remains on to provide a path for energy delivering. At this moment, the input voltage V in delivers energy to the inductor L 1 , and the capacitor C f provides the energy required by the output. Figure 7a shows the corresponding circuit. The voltage across the inductor L 1 is able to be expressed as in Equation (4): When the switch S Bo1 is switched off, the diode D 3 is switched on. At this moment, the input source V in transfers energy to the output terminal and charges the capacitor C f through the coupled inductors L 1 , L 3 and the switch S 1 . Figure 7b shows the corresponding circuit. Since the conduction of the switch S 1 can connect the mains and the negative end of the input source, the leakage current of the PV array can be suppressed. The voltage across the inductor L 1 is able to be presented as in Equation (5): in which N is the turn ratio of the coupled inductor and is defined as (n 1 :n 3 = 1:N). Using the volt-second balance theorem, Equation (6) is able to be found.
where d Bo is the duty ratio of the switch S Bo1 . By rearranging Equation (6), the voltage gain in CCM is shown in Equation (7): The duty ratio d Bo is able to be presented as in Equation (8): in which N is the turn ratio of the coupled inductor and is defined as (n1: n3 = 1: N). Using the volt-second balance theorem, Equation (6) is able to be found.
where dBo is the duty ratio of the switch SBo1. By rearranging Equation (6), the voltage gain in CCM is shown in Equation (7): The duty ratio dBo is able to be presented as in Equation (8): When the current of the inductor L1 (L2) drops to zero during SBo1 switched off, the inverter works in discontinuous conduction mode (DCM), and the capacitor Cf provides the energy required by the load. Equation (9) defines the inductance constant τL: where the inductor L1 (L2) is assumed to be the same inductance Lp, fS is the frequency of MOSFET switching, and RL is the resistance of equivalent output load. The voltage gain of DCM is presented as in Equation (10): If the gain shown in Equation (7) is equal to Equation (10), the inverter will operate in the boundary conduction mode (BCM). Derived from this condition, the inductance constant τLB of BCM is able to be found and expressed as in Equation (11): If the inductance constant τL is smaller than its boundary value τLB, the inverter will work in DCM. When the current of the inductor L 1 (L 2 ) drops to zero during S Bo1 switched off, the inverter works in discontinuous conduction mode (DCM), and the capacitor C f provides the energy required by the load. Equation (9) defines the inductance constant τ L : where the inductor L 1 (L 2 ) is assumed to be the same inductance L p , f S is the frequency of MOSFET switching, and R L is the resistance of equivalent output load. The voltage gain of DCM is presented as in Equation (10): If the gain shown in Equation (7) is equal to Equation (10), the inverter will operate in the boundary conduction mode (BCM). Derived from this condition, the inductance constant τ LB of BCM is able to be found and expressed as in Equation (11): If the inductance constant τ L is smaller than its boundary value τ LB , the inverter will work in DCM.
When the mains voltage v s (t) becomes negative (π ≤ ωt ≤ 2π) and working in the step-up mode, the roles of the switches S Bu1 and S Bu2 are exchanged. The switch S Bu1 stays off, and the switch S Bu2 stays on. When the switch S Bo2 is switched on, the diode D 4 is switched off, and the switch S 2 remains in the on state to provide a path for energy transmission. At this time, the input voltage V in stores energy on the inductor L 2 , and the capacitor C f provides the energy required by the output. Figure 8a shows the corresponding circuit. When the switch S Bo2 is switched off, the diode D 4 is switched on. At this moment, the input voltage V in transfers energy to the capacitor C f and the output simultaneously through the path of the coupled inductors L 2 , L 4 and the switch S 2 . Figure 8b shows the corresponding circuit. The working principle of this state is similar to that of the positive half-cycle, and the voltage gain and boundary conditions are the same as those shown in Equations (7), (10), and (11). Since the continuous conduction of the switch S 2 can provide a path for connecting the mains and the negative end of the input source, the leakage current of the PV array can be suppressed. When the mains voltage vs(t) becomes negative (π  ωt  2π) and working in the stepup mode, the roles of the switches SBu1 and SBu2 are exchanged. The switch SBu1 stays off, and the switch SBu2 stays on. When the switch SBo2 is switched on, the diode D4 is switched off, and the switch S2 remains in the on state to provide a path for energy transmission. At this time, the input voltage Vin stores energy on the inductor L2, and the capacitor Cf provides the energy required by the output. Figure 8a shows the corresponding circuit. When the switch SBo2 is switched off, the diode D4 is switched on. At this moment, the input voltage Vin transfers energy to the capacitor Cf and the output simultaneously through the path of the coupled inductors L2, L4 and the switch S2. Figure 8b shows the corresponding circuit. The working principle of this state is similar to that of the positive half-cycle, and the voltage gain and boundary conditions are the same as those shown in Equations (7), (10), and (11). Since the continuous conduction of the switch S2 can provide a path for connecting the mains and the negative end of the input source, the leakage current of the PV array can be suppressed. As reported by the analyses mentioned above, Table 1 lists the voltage gain and the condition of each switching component within one AC cycle. As shown in this table, there are only one switch and one diode switching with high frequency (marked in green) in each state, resulting in lower switching losses. In addition, in each state, there is only one switch and one diode (or two switches) conducting continuously (marked in orange), which can reduce the conduction losses.  As reported by the analyses mentioned above, Table 1 lists the voltage gain and the condition of each switching component within one AC cycle. As shown in this table, there are only one switch and one diode switching with high frequency (marked in green) in each state, resulting in lower switching losses. In addition, in each state, there is only one switch and one diode (or two switches) conducting continuously (marked in orange), which can reduce the conduction losses.

Loss Analysis
Loss analysis is performed to compare the efficiency of the investigated transformerless buck-boost inverter with the traditional grid-tied system. Since the working states are symmetrical, and the mains is a periodic sine wave, only the quarter of period needs to analyze and calculate. Assuming that the inverter always operates in CCM can simplify the analysis, and the mains voltage v s (t) is able to be presented as in Equation (12): If R L is the equivalent resistance of the output load, the output load current i s (t) will be presented as in Equation (13): Regarding the timing diagram shown in Figure 4, the inverter works in the step-down mode in the interval of time t = 0~t m . Within one high-frequency switching period, the average current of each inductor is able to be presented as in Equations (14)- (16): The inverter works in the step-up mode in the interval of time t = t m~Tac /4. Within one high-frequency switching period, the average current of each inductor is able to be presented as in Equations (17)-(19): When the peak voltage of v s (t) is higher than the input voltage, the conduction loss of each inductor is able to be obtained as in Equations (20)-(22): where N tm is the amount of high-frequency switching cycle within the time interval of t = 0~t m , and N s is the amount of high-frequency switching cycle within one AC cycle T ac . The equivalent series resistance (ESR) of each inductor is expressed as R ESR,L1 , R ESR,L3 , and R ESR,Ls , respectively. Finally, the total inductor conduction loss of the inverter is able to be calculated from Equations (20)- (22) and presented as in Equation (23): P con,L_total = P con,L1 × 2 + P con,L3 × 2 + P con,Ls .
The conduction loss of each MOSFET is able to be calculated as in Equations (24)-(26): P con,Bo1 = P con,Bo2 = 2 P con,S1 = P con,S2 = 2 where R DS,on is the conduction resistance of each MOSFET. The total switch conduction loss of the inverter is able to be calculated from Equations (24)-(26) and is presented as in Equation (27): P con,S_total = P con,Bu1 × 2 + P con,Bo1 × 2 + P con,S1 × 2.
The conduction losses of the power diodes D 1 , D 2 , D 3 , and D 4 are able to be calculated as in Equations (28) and (29): where V F is the diode voltage during forward biased. The total diode conduction loss of the inverter is able to be calculated from Equations (28) and (29) and presented as in Equation (30) P con,D_total = P con,D1 × 2 + P con,D3 × 2.
In addition to conduction losses, switching losses also affect the conversion efficiency. The switching losses are mainly composed of switching on loss, switching off loss, and output capacitance loss [24]. The switching on losses of the MOSFETs S Bo1 and S Bo2 are able to be expressed as in Equation (31): in which R Gon is the resistance of gate-loop during the on state, Q GS is the charge between gate and source, Q GD is the charge between gate and drain, V mp,on is the Miller voltage of the on state, and V th is the threshold voltage of gate. Additionally, the switching off losses of the MOSFETs S Bo1 and S Bo2 are able to be calculated as in Equation (32): in which R Goff is the resistance of the gate-loop during off state, and V mp,off is the Miller voltage of off state. Furthermore, using similar calculations, the losses of the switch S Bu1 (S Bu2 ) during switching on and switching off are able to be calculated respectively as in Equations (33) and (34): The total switch switching loss is able to be calculated from Equations (31)-(34) and presented as in Equation (35): in which P Coss,Bo1 and P Coss,Bu1 are the losses of output capacitance of MOSFETs S Bo1 and S Bu1 , respectively. In accordance with the voltage between drain and source, the characteristic curve illustrated in the datasheet of MOSFET is able to be used for the estimation of both P Coss,Bo1 and P Coss,Bu1 .
Based on above loss analyses, an example with 220 V rms output voltage and 500 W output power (V M = 312 V, R = 96.8 Ω) is taken to draw the curves of power losses. The curves of inductor conduction loss, switch conduction loss, switch switching loss, and diode conduction loss are illustrated in Figure 9, in which input voltage is between 100 and 200 V. For evaluation, Figure 9 also shows the curves of a grid-tied system with two-stage energy processing (cascading a boost converter and an H-bridge SPWM inverter).
sented as in Equation (35) , in which PCoss,Bo1 and PCoss,Bu1 are the losses of output capacitance of MOSFETs SBo1 and respectively. In accordance with the voltage between drain and source, the character curve illustrated in the datasheet of MOSFET is able to be used for the estimation of PCoss,Bo1 and PCoss,Bu1.
Based on above loss analyses, an example with 220 Vrms output voltage and 50 output power (VM = 312 V, R = 96.8 Ω) is taken to draw the curves of power losses. curves of inductor conduction loss, switch conduction loss, switch switching loss, and ode conduction loss are illustrated in Figure 9, in which input voltage is between 100 200 V. For evaluation, Figure 9 also shows the curves of a grid-tied system with two-s energy processing (cascading a boost converter and an H-bridge SPWM inverter).
It is able to be understood from Figure 9a; since the investigated inverter does need to boost the voltage to 400 V, it has lower total conduction loss of inductors. Fi 9b shows the curves of the total conduction loss of the switches based on Equations ( (27). When the input voltage is low, the high input current needs to go through the sw SBu1 or SBu2 in the step-up mode, resulting in slightly higher conduction loss of the switc It is able to be seen from the switching loss curves shown in Figure 9c that since the posed converter only requires a single stage of energy processing and only one sw performs high-frequency switching in each state, the switching losses are greatly proved. Figure 9d shows the curves of the total conduction loss of the diodes based Equations (28)-(30). Since the diodes D1 and D2 only conduct in the step-down mode total diode conduction loss is lower at low input voltage. When the input voltage incre the operation time of the step-down mode increases, and the total diode conduction increases accordingly. The traditional two-stage system only uses one diode in the b converter, and the output voltage is a high voltage of 400 V, so it has lower diode con tion loss. Overall, under the condition of 100 V input, the total loss of the investig inverter is 19.08 W, and the total loss of the traditional two-stage grid-tied system is 2 W. Therefore, it is able to be known that the total power loss of the investigated inve can be reduced to improve conversion efficiency.

Experimental Results
To prove the correctness of the previous analysis, a prototype is built and measu according to the schematic illustrated in Figure 3 and the specifications shown in Tab For avoiding the duty ratio being too large, its maximum value is set to 0.45. S the maximum duty ratio occurs at the peak output voltage of 312 V and the minim input voltage of 100 V, the turn ratio N can be calculated from Equation (7) as around In the design example, the turn ratio N of 1.5 is chosen.
By combining Equations (9) and (11), the BCM inductance LB is able to be obtaine in Equation (36): By selecting the inductor current to be BCM at the peak of sinusoidal voltage and rated power, the BCM inductance LB is able to be obtained from Equation (36) as 155 In the implementation example, 200 μH is chosen for the inductance of L1 and L2. Tab shows the selected component parameters according to the analysis and design addre before. Table 3. Component parameters of the laboratory prototype.

Component Parameters
Input capacitor, Cdc 3300 μF MOSFETs 47N60C3 It is able to be understood from Figure 9a; since the investigated inverter does not need to boost the voltage to 400 V, it has lower total conduction loss of inductors. Figure 9b shows the curves of the total conduction loss of the switches based on Equations (24)-(27). When the input voltage is low, the high input current needs to go through the switch S Bu1 or S Bu2 in the step-up mode, resulting in slightly higher conduction loss of the switches. It is able to be seen from the switching loss curves shown in Figure 9c that since the proposed converter only requires a single stage of energy processing and only one switch performs high-frequency switching in each state, the switching losses are greatly improved. Figure  9d shows the curves of the total conduction loss of the diodes based on Equations (28)-(30). Since the diodes D 1 and D 2 only conduct in the step-down mode, the total diode conduction loss is lower at low input voltage. When the input voltage increases, the operation time of the step-down mode increases, and the total diode conduction loss increases accordingly. The traditional two-stage system only uses one diode in the boost converter, and the output voltage is a high voltage of 400 V, so it has lower diode conduction loss. Overall, under the condition of 100 V input, the total loss of the investigated inverter is 19.08 W, and the total loss of the traditional two-stage grid-tied system is 24.67 W. Therefore, it is able to be known that the total power loss of the investigated inverter can be reduced to improve conversion efficiency.

Experimental Results
To prove the correctness of the previous analysis, a prototype is built and measured according to the schematic illustrated in Figure 3 and the specifications shown in Table 2. For avoiding the duty ratio being too large, its maximum value is set to 0.45. Since the maximum duty ratio occurs at the peak output voltage of 312 V and the minimum input voltage of 100 V, the turn ratio N can be calculated from Equation (7) as around 1.6. In the design example, the turn ratio N of 1.5 is chosen.
By combining Equations (9) and (11), the BCM inductance L B is able to be obtained as in Equation (36): By selecting the inductor current to be BCM at the peak of sinusoidal voltage and 50% rated power, the BCM inductance L B is able to be obtained from Equation (36) as 155 µH. In the implementation example, 200 µH is chosen for the inductance of L 1 and L 2 . Table 3 shows the selected component parameters according to the analysis and design addressed before.
The investigated transformer-less buck-boost grid-tied inverter is controlled by SPWM. Figure 10 illustrates the experimental waveforms of the output voltage v o and the driving signals of the switches S Bu1 , S Bo1 , and S 1 . When the inverter operates in the step-down mode, the switch S Bu1 is switched at high frequency, and the switches S Bo1 remain off. Conversely, when the inverter operates in the step-up mode, the switch S Bo1 performs highfrequency switching. The switch S 1 continuously conducts during the positive half-cycle to provide an energy transmission path. During the negative half-cycle, the switch S 2 replace the switch S 1 to conduct continuously, and the switch S 1 remains off. Table 3. Component parameters of the laboratory prototype.

Component Parameters
Input capacitor, C dc 3300 µF MOSFETs 47N60C3 Pwer diodes C3D10060A Turn ratio, N 1. The investigated transformer-less buck-boost grid-tied inverter is controlled by SPWM. Figure 10 illustrates the experimental waveforms of the output voltage vo and the driving signals of the switches SBu1, SBo1, and S1. When the inverter operates in the stepdown mode, the switch SBu1 is switched at high frequency, and the switches SBo1 remain off. Conversely, when the inverter operates in the step-up mode, the switch SBo1 performs high-frequency switching. The switch S1 continuously conducts during the positive halfcycle to provide an energy transmission path. During the negative half-cycle, the switch S2 replace the switch S1 to conduct continuously, and the switch S1 remains off.
Under the condition of 100 V input voltage and 500 W load, Figure 11 illustrates the experimental waveforms of the input voltage Vin, the output voltage vo, and the output current io. It can be seen that vo and io are low-distortion and close to an ideal sinusoidal wave. These results verify that the proposed buck-boost grid-tied inverter can achieve the function of DC to AC conversion. Figure 12 illustrates the experimental waveforms of the output voltage vo, and the inductor currents iL1, iL3. As shown in Figure 12a, the step-down mode is performed when the instantaneous voltage of vo is below 100 V; on the contrary, the step-up mode is performed. The inductor currents iL1, iL3 are in CCM to reduce current peaks and ripple. Figure 12b shows zoom-in waveforms on the peak of output voltage. It can be seen that the inductor L1 is charging alone and discharging in series with the inductor L3, which can effectively increase voltage gain. Figure 13 shows the simulation waveforms of the output voltage vo and the leakage current under the condition of 100 V input voltage and 500 W load. These waveforms prove that the proposed inverter can effectively suppress the leakage current of the PV panel.

Vgs(Bo1)
Vgs(S1) Figure 10. The experimental waveforms of the output voltage vo and the gate-driving signals under the condition of 100 V input voltage and 500 W load. (vo: 200 V/div; Vgs: 20 V/div; time: 5 ms/div). vo io Vin Figure 11. The experimental waveforms of the input voltage Vin, the output voltage vo, and the output current io under the condition of 100 V input voltage and 500 W load (Vin, vo: 100 V/div; io: 5 A/div; time: 5 ms/div). Under the condition of 100 V input voltage and 500 W load, Figure 11 illustrates the experimental waveforms of the input voltage V in , the output voltage v o , and the output current i o . It can be seen that v o and i o are low-distortion and close to an ideal sinusoidal wave. These results verify that the proposed buck-boost grid-tied inverter can achieve the function of DC to AC conversion. Figure 12 illustrates the experimental waveforms of the output voltage v o , and the inductor currents i L1 , i L3 . As shown in Figure 12a, the step-down mode is performed when the instantaneous voltage of v o is below 100 V; on the contrary, the step-up mode is performed. The inductor currents i L1 , i L3 are in CCM to reduce current peaks and ripple. Figure 12b shows zoom-in waveforms on the peak of output voltage. It can be seen that the inductor L 1 is charging alone and discharging in series with the inductor L 3 , which can effectively increase voltage gain. Figure 13 shows the simulation waveforms of the output voltage v o and the leakage current under the condition of 100 V input voltage and 500 W load. These waveforms prove that the proposed inverter can effectively suppress the leakage current of the PV panel.

Vgs(Bo1)
Vgs(S1) Figure 10. The experimental waveforms of the output voltage vo and the gate-driving signals under the condition of 100 V input voltage and 500 W load. (vo: 200 V/div; Vgs: 20 V/div; time: 5 ms/div). vo io Vin Figure 11. The experimental waveforms of the input voltage Vin, the output voltage vo, and the output current io under the condition of 100 V input voltage and 500 W load (Vin, vo: 100 V/div; io: 5 A/div; time: 5 ms/div). Moreover, the laboratory prototype is further measured with 200 V input voltage to verify its suitability for a wide range of input voltage applications. Figure 14 illustrates the experimental waveforms of the output voltage vo and the driving signals of the switches SBu1, SBo1, and S1. The modulation method is similar to that at 100 V input, but the operation time of the step-down mode becomes longer, and the operation time of the stepup mode becomes shorter. Figure 15 illustrates the experimental waveforms of the input voltage Vin, the output voltage vo and the output current io under the condition of 200 V input voltage and 500 W Moreover, the laboratory prototype is further measured with 200 V input voltage to verify its suitability for a wide range of input voltage applications. Figure 14 illustrates the experimental waveforms of the output voltage vo and the driving signals of the switches SBu1, SBo1, and S1. The modulation method is similar to that at 100 V input, but the operation time of the step-down mode becomes longer, and the operation time of the stepup mode becomes shorter. Figure 15 illustrates the experimental waveforms of the input voltage Vin, the output Moreover, the laboratory prototype is further measured with 200 V input voltage to verify its suitability for a wide range of input voltage applications. Figure 14 illustrates the experimental waveforms of the output voltage v o and the driving signals of the switches S Bu1 , S Bo1 , and S 1 . The modulation method is similar to that at 100 V input, but the operation time of the step-down mode becomes longer, and the operation time of the step-up mode becomes shorter.

Vgs(S1)
Step-up Stepdown  The measured odd-order harmonics and total harmonic distortion (THD) of the inverter output under 100 V and 200 V input voltages are collected in Table 4. The data meet the requirements of international electrical standards; it is able to verify the feasibility of the investigated inverter. Figure 18 illustrates the experimental efficiency curves of the laboratory prototype, in which the efficiency is up to 95% at 100 V input and 96.7% at 200 V input, respectively. These results further confirm that high conversion efficiency can be achieved by the investigated inverter with a single stage of energy processing. Figure 19 shows the picture with the experimental test bench. The development board of dsPIC33FJ16GS504 generates SPWM driving signals, and the wire-wound resistor is used as testing loads.   Figure 16 illustrates the experimental waveforms of the output voltage v o , and the inductor currents i L1 , i L3 under the same conditions. At Figure 16a, due to the higher input voltage, the peak of inductor currents is lower than those at 100 V input voltage. Figure 16b illustrates zoom-in waveforms of the inductor currents i L1 , i L3 on the peak of output voltage. It can be seen that the inductor L 1 is still charging alone and discharging in series with the inductor L 3 . Figure 17

Vgs(S1)
Step-up Stepdown   The measured odd-order harmonics and total harmonic distortion (THD) of the inverter output under 100 V and 200 V input voltages are collected in Table 4. The data meet the requirements of international electrical standards; it is able to verify the feasibility of the investigated inverter. Figure 18 illustrates the experimental efficiency curves of the laboratory prototype, in which the efficiency is up to 95% at 100 V input and 96.7% at 200 V input, respectively. These results further confirm that high conversion efficiency can be achieved by the investigated inverter with a single stage of energy processing. Figure 19 shows the picture with the experimental test bench. The development board of dsPIC33FJ16GS504 generates SPWM driving signals, and the wire-wound resistor is used as testing loads. vo io Figure 15. The experimental waveforms of the input voltage Vin, the output voltage vo, and the output current io under the condition of 200 V input voltage and 500 W load (Vin, vo: 100 V/div; io: 5 A/div; time: 5 ms/div). The measured odd-order harmonics and total harmonic distortion (THD) of the inverter output under 100 V and 200 V input voltages are collected in Table 4. The data meet the requirements of international electrical standards; it is able to verify the feasibility of the investigated inverter. Figure 18 illustrates the experimental efficiency curves of the laboratory prototype, in which the efficiency is up to 95% at 100 V input and 96.7% at 200 V input, respectively. These results further confirm that high conversion efficiency can be achieved by the investigated inverter with a single stage of energy processing. Figure 19 shows the picture with the experimental test bench. The development board of dsPIC33FJ16GS504 generates SPWM driving signals, and the wire-wound resistor is used as testing loads.     Figure 17. The simulation waveforms of the output voltage vo and the leakage current iLeakage under the condition of 200 V input voltage and 500 W load (vo: 100 V/div; iLeakage: 100 mA/div; time: 5 ms/div)

Discussions
According to the experimental waveforms above, the feasibility of the proposed inverter has indeed been verified. In order to further summarize its main contributions and discuss the performance in terms of loss, efficiency, cost, and harmonic distortions, the following discussions are carried out.
The traditional PV grid-tied system is composed of a boost converter and a H-bridge inverter. Due to the two-stage energy processing, the system efficiency is reduced. The proposed inverter only needs single energy processing, and only one power switch performs high frequency switching, improving the conversion efficiency effectively. By adding coupled inductors, the voltage gain of the inverter can be increased, which is suitable for low input voltage applications. The inverter has both step-up and step-down functions so that it is suitable for PV systems with wide-range input-voltage fluctuation.
Based on the results of the previous loss analysis, the expected full load efficiency should be 96.3%. The measured full load efficiency of 100V input shown in Figure 18 is about 94.7%, which is slightly lower than the expected result. This is because only the power losses of the main power components at room temperature is considered in the loss analysis. Long-time operation increases the junction temperature and on-resistance of power semiconductor components, resulting in increase of power loss. In addition, the conduction loss of the copper wire in the circuit layout should be of considerable proportion, but it is not included in the loss analysis. Table 5 shows comparisons between the proposed buck-boost inverter and the traditional two-stage grid-tied system. Since the proposed inverter requires only a single stage of energy processing, its measured full-load efficiency can be as high as 94.7%. In the two-stage system, even if the efficiencies of the boost converter and the inverter are both up to 97%, the overall efficiency is only about 94.1%, which is lower than the proposed inverter. The proposed inverter has the beneficial feature of reduced voltage stress of power switches, which is favorable for reducing the cost of power components. Although the proposed inverter requires a higher number of components, the overall cost is only slightly higher than the two-stage system. Since the proposed inverter has both step-up and step-down capabilities, and it has high voltage gain, its operable input voltage range is relatively wide. In addition, since the proposed inverter and the traditional two-stage system both have an output low-pass filter, their total harmonic distortions can be lower than 2% to meet electrical specifications.

Conclusions
In this article, the development and the implementation of the transformer-less buckboost grid-tied inverter with low leakage-current and high voltage-gain have been successfully achieved. Two dual-switch buck-boost converters with coupled inductors are connected in parallel to generate unipolar half-waves, and two low-frequency switches are adopted to switch the output polarity. By adding coupled inductors, the voltage gain can be effectively increased, so the proposed inverter is suitable for a wide range of input-voltage applications. Since only single energy processing is required, and only one MOSFET performs high-frequency switching in each mode, switching losses and efficiency can be effectively improved. In addition, the two unfolding switches can also provide a path for connecting the mains to the negative end of the input voltage, so that the leakage current of the PV array can be effectively suppressed. Finally, an experimental prototype was constructed, and corresponding measurements were made to verify the validity of the circuit structure of the investigated inverter.