Comprehensive Model for Evaluating the Performance of Mach-Zehnder-Based Silicon Photonic Switch Fabrics in Large Scale

: Building a large-scale Mach-Zehnder-based silicon photonic switch circuit (LS-MZS) requires an appropriate choice of architecture. In this work, we propose, for the ﬁrst time to our knowledge, a single metric that can be used to compare di ﬀ erent topologies. We propose an accurate analytical model of the signal-to-crosstalk ratio (SCR) that highlights the performance limitations of the main building blocks: Mach-Zehnder interferometers (MZI) and waveguide crossings. It is based on the cumulative crosstalk and total insertion loss of the LS-MZS. Four di ﬀ erent architectures: Beneš, dilated Beneš, switch and select, double-layer network were studied for the reason that they are mainly referenced in the literature. We compared them using our developed SCR indicator. With reference to the state-of-the-art technology, the analysis of the four architectures using SCR showed that, on a large scale, a high number of waveguide crossings signiﬁcantly a ﬀ ects the performance of the switch matrix. Moreover, better performance was reached using the double-layer-network architecture. Then, we presented a 2 × 2 MZI using two electro-optic phase shifters and a waveguide crossing realized in LETI’s silicon photonics technology. Measured performances were quite good: the switch circuit had a crosstalk of − 31.3 dB and an insertion loss estimated to be less than 1.31 dB.


Introduction
Data switching networks are facing increasing difficulties in handling the exponential growth of traffic [1]. The scaling up of traditional network-on-chip capacity is severely limited by overheating problems [2]. Silicon photonics is believed to be a potential solution to improve the performance of interconnects and computing systems, specifically allowing larger bandwidth and lower power consumption. Data switching networks can thus benefit from several advantages of Si-technology such as large-area wafers, CMOS-compatibility, large-scale dimension device integration, high-level integration process and device density, heterogeneous integration such as electro-optic modulators and germanium photodetectors, low-cost, high volume, and compactness. Planar photonic switches have been largely fabricated on Silicon platforms, based on thermo-optic (TO) or/and electro-optic (EO) phase shifters. The first ones have a micro-second switching transient time, which matches the requirements of telecommunication network nodes and inter-data center connections. In contrast, the second ones have a nano-second switching transient, which fits the requirements of CPU/CPU and CPU/memory interconnections as well as intra-data center connections [3]. Mach-Zehnder interferometer (MZI) is a critical building block for scalable silicon photonic systems, whether in optical

Performance Limitations of LS-MZS
This section will discuss the two main performance parameters that should be optimized to commercialize large-scale switch fabrics: insertion loss and optical crosstalk. We will model these limitations for MZI and waveguide crossing, which will also be useful to introduce our formalism later.

Insertion Loss
Insertion loss is a major challenge that limits the scaling up of the switch fabric. Losses can reach up to 2 dB per MZI and 0.2 dB per waveguide crossing. Unfortunately, these two components are needed in high numbers to design any switch matrix. Therefore, the architecture chosen must limit the number of cascaded MZIs and waveguide crossings. The power attenuation can be modeled by a loss factor l MZI and l X in the case of an MZI and a waveguide crossing, respectively. P out MZI = P in l MZI (1) P out X = P in l X (2) where P in is the optical input power, P out MZI and P out X are the output powers of each component, respectively ( Figure 1). Insertion loss is then defined as the loss factor in dB, noted Loss MZI and Loss X in the following.

Optical Crosstalk
Optical crosstalk occurs when a portion of the signal power leaks into an unwanted output, which could be generated in both MZI and waveguide crossing because of their design. We model these leakages by a factor in MZI and in waveguide crossing (see Figure 1). The values of and are usually less than 0.01. Crosstalk ratio is defined as the difference, in logarithmic scale, of the output power on the destructive port to the one on the constructive port. The crosstalk issue in MZI is largely due to phase errors or power imbalance inside the arms of the Mach-Zehnder. The phase error can be corrected by introducing heaters on both sides [11], whereas the power imbalance is produced by intrinsic absorptions in waveguide when using electro-optic phase-shifting diode junctions [12] and by the imbalance in 3-dB couplers. Optical crosstalk ratio in MZI and waveguide crossing, named and , can be written as follows: In the rest of the paper, the unwanted power, written in blue in Figure 1, will be called crosstalk power. It is worth mentioning that there are generally two types of crosstalk, leakage from other signal sources and multi-path interference of the original signal. In this work, they will be treated as purely additive crosstalk.

Large-Scale Photonic Switch Architectures
We review four architectures-Beneš, dilated Beneš, double layer network, switch and selectthat are widely discussed in literature. In the following, we will use the words Stage to refer to a stack of MZIs in the same line, and interconnection to describe the set of waveguides connecting two stages. The Beneš network [13] is a recursive architecture. To construct × −Beneš, two blocs of /2 × /2 −Beneš are put in the center, and themselves connected to the input/output stages with the interconnection shown in Figure 2. Although it has the smallest overall number of MZIs and stages amongst the four different architectures studied in this paper, it generates first-order crosstalk because each MZI is crossed by two signals, drastically decreasing the overall performance.

Optical Crosstalk
Optical crosstalk occurs when a portion of the signal power leaks into an unwanted output, which could be generated in both MZI and waveguide crossing because of their design. We model these leakages by a factor m in MZI and x in waveguide crossing (see Figure 1). The values of m and x are usually less than 0.01. Crosstalk ratio is defined as the difference, in logarithmic scale, of the output power on the destructive port to the one on the constructive port. The crosstalk issue in MZI is largely due to phase errors or power imbalance inside the arms of the Mach-Zehnder. The phase error can be corrected by introducing heaters on both sides [11], whereas the power imbalance is produced by intrinsic absorptions in waveguide when using electro-optic phase-shifting diode junctions [12] and by the imbalance in 3-dB couplers. Optical crosstalk ratio in MZI and waveguide crossing, named Xtalk MZI and Xtalk X , can be written as follows: In the rest of the paper, the unwanted power, written in blue in Figure 1, will be called crosstalk power. It is worth mentioning that there are generally two types of crosstalk, leakage from other signal sources and multi-path interference of the original signal. In this work, they will be treated as purely additive crosstalk.

Large-Scale Photonic Switch Architectures
We review four architectures-Beneš, dilated Beneš, double layer network, switch and select-that are widely discussed in literature. In the following, we will use the words Stage to refer to a stack of MZIs in the same line, and interconnection to describe the set of waveguides connecting two stages. The Beneš network [13] is a recursive architecture. To construct N × N−Beneš, two blocs of N/2 × N/2−Beneš are put in the center, and themselves connected to the input/output stages with the interconnection shown in Figure 2. Although it has the smallest overall number of MZIs and stages amongst the four different architectures studied in this paper, it generates first-order crosstalk because each MZI is crossed by two signals, drastically decreasing the overall performance. Appl. Sci. 2020, 10, x FOR PEER REVIEW 4 of 16 In order to mitigate the crosstalk in Beneš, Padmanabhan and Netravali have proposed a dilated Beneš topology [14]. The recursion of this architecture is similar to the Beneš one, but only one signal travels through any MZI (Figure 3), so that the first-order crosstalk can be fully avoided. The double-layer network (DLN) was proposed by Lu and Thompson [15]. A × −DLN consists of two layers, each one composed of two /2 × /2 − DLN and connected to the input/output stages with the interconnection shown in Figure 4. The number of stages is as low as in Beneš, but the total number of MZIs increases rapidly for a large value of .  The switch and select (S&S) consists of 1 × and × 1 switch units, shown in Figure 5 [16]. To build a × structure, (1 × ) and ( × 1) blocks are used and connected via a central interconnection. This topology has the lowest crosstalk caused by MZIs. Nevertheless, the calculation In order to mitigate the crosstalk in Beneš, Padmanabhan and Netravali have proposed a dilated Beneš topology [14]. The recursion of this architecture is similar to the Beneš one, but only one signal travels through any MZI (Figure 3), so that the first-order crosstalk can be fully avoided. In order to mitigate the crosstalk in Beneš, Padmanabhan and Netravali have proposed a dilated Beneš topology [14]. The recursion of this architecture is similar to the Beneš one, but only one signal travels through any MZI (Figure 3), so that the first-order crosstalk can be fully avoided.  The double-layer network (DLN) was proposed by Lu and Thompson [15]. A × −DLN consists of two layers, each one composed of two /2 × /2 − DLN and connected to the input/output stages with the interconnection shown in Figure 4. The number of stages is as low as in Beneš, but the total number of MZIs increases rapidly for a large value of .  The switch and select (S&S) consists of 1 × and × 1 switch units, shown in Figure 5 [16]. To build a × structure, (1 × ) and ( × 1) blocks are used and connected via a central interconnection. This topology has the lowest crosstalk caused by MZIs. Nevertheless, the calculation The double-layer network (DLN) was proposed by Lu and Thompson [15]. A N × N−DLN consists of two layers, each one composed of two N/2 × N/2−DLN and connected to the input/output stages with the interconnection shown in Figure 4. The number of stages is as low as in Beneš, but the total number of MZIs increases rapidly for a large value of N. In order to mitigate the crosstalk in Beneš, Padmanabhan and Netravali have proposed a dilated Beneš topology [14]. The recursion of this architecture is similar to the Beneš one, but only one signal travels through any MZI (Figure 3), so that the first-order crosstalk can be fully avoided. The double-layer network (DLN) was proposed by Lu and Thompson [15]. A × −DLN consists of two layers, each one composed of two /2 × /2 − DLN and connected to the input/output stages with the interconnection shown in Figure 4. The number of stages is as low as in Beneš, but the total number of MZIs increases rapidly for a large value of .  The switch and select (S&S) consists of 1 × and × 1 switch units, shown in Figure 5 [16]. To build a × structure, (1 × ) and ( × 1) blocks are used and connected via a central interconnection. This topology has the lowest crosstalk caused by MZIs. Nevertheless, the calculation  Table 1 shows the number of MZIs and waveguide crossings we find for the worst path, and for each topology.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 5 of 16 of the number of waveguide crossings exhibits quadratic growth. Table 1 shows the number of MZIs and waveguide crossings we find for the worst path, and for each topology.

Analytical Model: Signal-To-Crosstalk Ratio
In this section, we introduce an analytical model of the SCR of a switch network. Then, we show how to apply it to Beneš, dilated Beneš, switch and select, and double-layer network.

Signal-to-Crosstalk Ratio Model
We start by calculating the SCR of a simple example: a 4 × 4-Beneš. Then, we propose a general equation that can be adapted to any architecture. The 4 × 4-Beneš structure is shown in Figure 6. The four inputs , , , are connected to the four outputs through the appropriate colored paths. In this example, we have chosen the worst combination connection among the 4! possible ones. We are working on the assumption that the first order crosstalk caused by MZI ( ) and waveguide crossing ( ) is not negligible, and so is the second-order crosstalk generated by MZI ( 2 ). The other contributions are neglected: for instance, optical crosstalk caused by an MZI could be the origin of another optical crosstalk generated at a waveguide crossing, or vice versa. This case is not considered here because it has a small influence on the total SCR. Table 2 details the output power following each stage of the structure in Figure 6. The wanted-signal is written in black, crosstalk generated by MZI and waveguide crossing are respectively mentioned in blue and red. Assuming that all signals are coherent and in-phase, we can write for the input signals = = = = . The SCR at the worst output (out2 or out3) is then: Table 1. Topology comparison for the first case in terms of stage and waveguide crossing counts N is the number of inputs/outputs.

Analytical Model: Signal-to-Crosstalk Ratio
In this section, we introduce an analytical model of the SCR of a switch network. Then, we show how to apply it to Beneš, dilated Beneš, switch and select, and double-layer network.

Signal-to-Crosstalk Ratio Model
We start by calculating the SCR of a simple example: a 4 × 4-Beneš. Then, we propose a general equation that can be adapted to any architecture. The 4 × 4-Beneš structure is shown in Figure 6. The four inputs P in1 , P in2 , P in3 , P in4 are connected to the four outputs through the appropriate colored paths. In this example, we have chosen the worst combination connection among the 4! possible ones. We are working on the assumption that the first order crosstalk caused by MZI (m) and waveguide crossing (x) is not negligible, and so is the second-order crosstalk generated by MZI (m 2 ). The other contributions are neglected: for instance, optical crosstalk caused by an MZI could be the origin of another optical crosstalk generated at a waveguide crossing, or vice versa. This case is not considered here because it has a small influence on the total SCR. Table 2 details the output power following each stage of the structure in Figure 6. The wanted-signal is written in black, crosstalk generated by MZI and waveguide crossing are respectively mentioned in blue and red. Assuming that all signals are coherent and in-phase, we can write for the input signals P = P in1 = P in2 = P in3 = P in4 . The SCR at the worst output (out2 or out3) is then: 10 log + + 1 + 2 ( + + 1) + + which simplifies to: Note that if we neglect the effect of waveguide crossings, i.e., ≈ 0, ≈ 1 and crosstalk of second-order 2 ≈ 0, SCR is equal to −10log (3 ), which is the equation obtained in [15]. Based on the example of 4 × 4 −Beneš structure, we notice that the wanted-signal travels through 3 MZIs and 2 waveguide crossings, which represents the worst path. It can also be noted that crosstalk powers at a given output come from different paths that have the same number of stages but a different number of waveguide crossings, so the total insertion loss for each crosstalk power is not always the same. In a large-scale network, it will be difficult to calculate the exact path of each crosstalk power, thus, we assume for simplification purposes that all crosstalk powers pass through an average number of waveguide crossings. Conversely, the number of stages is always the same for all crosstalk powers. All parameters we have taken into consideration in our model are included in Equation (7). 10log which simplifies to:

Input and Path Number
After S1 After S2 After S3 Note that if we neglect the effect of waveguide crossings, i.e., x ≈ 0, l X ≈ 1 and crosstalk of second-order m 2 ≈ 0, SCR is equal to −10log(3m), which is the equation obtained in [15]. Based on the example of 4 × 4−Beneš structure, we notice that the wanted-signal travels through 3 MZIs and 2 waveguide crossings, which represents the worst path. It can also be noted that crosstalk powers at a given output come from different paths that have the same number of stages but a different number of waveguide crossings, so the total insertion loss for each crosstalk power is not always the same. In a large-scale network, it will be difficult to calculate the exact path of each crosstalk power, thus, we assume for simplification purposes that all crosstalk powers pass through an average number of waveguide crossings. Conversely, the number of stages is always the same for all crosstalk powers. All parameters we have taken into consideration in our model are included in Equation (7).
We note num MZI and num X respectively the number of stages and waveguide crossings in the worst path for a given architecture (Table 1). K MZI (N, m)P and K X (N, x)P are, respectively, the total cumulative crosstalk powers at the worst-output generated by MZIs and waveguide crossings. The wanted-signal is weighted in the expression by l MZI num MZI l X num X , which corresponds to the worst path, while the cumulative crosstalk powers are weighted by l MZI num MZI l X M X . M X is the average of the number of waveguide crossings in the worst and the best paths. We add a hat operator on SCR to highlight an approximation. N is the size of the topology. The equation can be simplified as follows: The loss factor l MZI num MZI is canceled out as a common factor in the numerator and denominator.
In the example of 4 × 4-Beneš: K MZI (4, m) = 3m + 3m 2 , K X (4, x) = 2x and M X = num X 2 = 1 because the number of waveguide crossings equals two in the worst path and zero in the best path, hence, It is important to note that Equation (9) is equivalent to Equation (6), considering that the factor l X is very close to 1 (waveguide crossing losses varying between 0.03 dB and 0.21 dB in the literature). We should keep in mind that our model is based on two main assumptions. The first one is that all crosstalk powers pass through the same number of MZIs, which is always the case in the multi-stage architectures studied. The second one is that all crosstalk powers also pass through the same number of waveguide crossings (=M X ), which enables us to keep the calculus simple. The latter assumption could decrease the accuracy of our model, especially when crossing losses are significant. However, we will see in Appendix A that our model remains valid even with relatively high crossing losses, 0.2 dB. Now, our general analytical model is completely defined by Equation (8), we can then apply it to Beneš, dilated Beneš, switch and select, and double-layer network. To do so, the num X − M X exponent that we need for each architecture can be easily calculated from Table 1. All that remains is to compute the terms K MZI (N, m) and K X (N, x), what we are going to do in the next subsection. For simplification purposes, the terms K MZI (N, m) and K X (N, x) will be simply called cumulative crosstalk powers generated by MZIs and waveguide crossings, respectively.

Cumulative Crosstalk Power Terms
We first calculate the cumulative crosstalk power generated by MZIs. As seen before, for 4 × 4-Beneš: K MZI (4, m) = 3m + 3m 2 . Beneš is a recursive structure, thus, it is not difficult to determine K MZI (N, m) for a higher scale. For 8 × 8-Beneš, we find 5m + 10m 2 . Then, we can derive a general formula for N × N-Beneš, with N = 2 n where ∈ N * : We note k = log 2 (N). The results for the other three architectures are mentioned in [15,17] and summarized in Table 3. We still have to calculate cumulative crosstalk power from waveguide crossings. In the Beneš matrix, all waveguides are crossed by optical power, so all crossings are contributors to crosstalk. In the worst case: For dilated Beneš (Figure 3), only one signal passes through each MZI, and therefore not all waveguide crossings are crossed by signals for a given network configuration. The cumulative crosstalk power induced by waveguide crossings in the worst case is: Appl. Sci. 2020, 10, 8688 8 of 16 By adding up: Similarly, for DLN ( Figure 4): We get: For N × N-S&S ( Figure 5), each 1 × N-bloc is crossed by only one signal. Therefore, it is not difficult to find: The following table summarizes the values corresponding to each topology. Note that an architecture's total crosstalk power could be slightly reduced by introducing intelligent algorithms [18]. Table 3. Topology comparison in terms of cumulative crosstalk generated by MZIs and waveguide crossings for each topology.

K MZI (N,m) K X (N,x)
All the expressions needed are now computed for the four architectures. We will depictŜCR values as a function of N for the four architectures in order to compare them; this will be the subject of the next section.

Architecture Comparison
In the following section, we calculateŜCR of the four architectures based on the component performances found in the literature. Today's best results are presented in Table 4.
Comparison between the four topologies shows a significant impact of waveguide crossings on the overall performance of the network. S&S is the best to reduce first-order and second-order crosstalk powers generated by MZIs. Nevertheless, it does not scale well because its central interconnection contains a high number of waveguide crossings, as shown in Figure 7a. The waveguide crossing count in the dilated Beneš is also important; this has a strong impact when its insertion loss is not optimized. Indeed, in Figure 7b and for Loss X = 0.21 dB [19], the dilated BenešŜCR (solid red line) decreases more rapidly and becomes lower than BenešŜCR for N = 32. In general, each architecture can be badly affected if the waveguide crossing performances are not sufficiently optimized, as seen in Figure 7c, with Xtalk X = −20 dB [20]. The four architectures have similar performances with aŜCR lower than 17 dB for N ≥ 4. DLN seems to be the most favorable architecture, whoseŜCR value decreases more slowly. Its major challenge is the overall number of MZIs, which is relatively large.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 9 of 16 similar performances with a lower than 17 dB for N ≥4. DLN seems to be the most favorable architecture, whose value decreases more slowly. Its major challenge is the overall number of MZIs, which is relatively large.

MZI and Waveguide Crossing Characteristics
In this section, we present the performances of our MZI and waveguide crossing fabricated in LETI's 200 mm silicon photonics fabrication platform, with which we will plot the values of the four topologies.
We designed a 2 × 2 MZI circuit, Figure 8 [23]. The structure has 3-dB multimode interference couplers (M1 and M2), a 250 μm-length PIN diode phase shifter in each arm (PS1 and PS2), a 50 μmlength heater in each arm too (H1 and H2) and a photodetector at each output-side (P1 and P2). A loop-back waveguide was added for fiber alignment and for evaluating the insertion losses of MZI. Measurements of optical power on Out1 and Out2 were performed using a fiber array feeding the

MZI and Waveguide Crossing Characteristics
In this section, we present the performances of our MZI and waveguide crossing fabricated in LETI's 200 mm silicon photonics fabrication platform, with which we will plot theŜCR values of the four topologies.
We designed a 2 × 2 MZI circuit, Figure 8 [23]. The structure has 3-dB multimode interference couplers (M1 and M2), a 250 µm-length PIN diode phase shifter in each arm (PS1 and PS2), a 50 µm-length heater in each arm too (H1 and H2) and a photodetector at each output-side (P1 and P2). A loop-back waveguide was added for fiber alignment and for evaluating the insertion losses of MZI. Measurements of optical power on Out1 and Out2 were performed using a fiber array feeding the input In1. The bar-state and cross-state were observed depending on the change in phase shift. For that, a current of up to 12 mA is first injected into PS1, and then the same protocol was applied to PS2. The obtained results of the two-phase shifters were combined and depicted in Figure 9a. It is important to point out that our MZI operates using the two electro-optic (EO) phase shifters (PS1 and PS2), whereas the two heaters (H1 and H2) were specifically integrated to correct static phase errors. The results presented below were obtained without phase corrections, that is to say, only EO phase shifters were operated.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 10 of 16 input In1. The bar-state and cross-state were observed depending on the change in phase shift. For that, a current of up to 12 mA is first injected into PS1, and then the same protocol was applied to PS2. The obtained results of the two-phase shifters were combined and depicted in Figure 9a. It is important to point out that our MZI operates using the two electro-optic (EO) phase shifters (PS1 and PS2), whereas the two heaters (H1 and H2) were specifically integrated to correct static phase errors. The results presented below were obtained without phase corrections, that is to say, only EO phase shifters were operated. For the best die, we measured a crosstalk of −33.4 dB in bar-state, and a crosstalk of −31.3 dB in cross-state. The transmission spectrum in both states and for the loop-back waveguide is depicted in Figure 9b, the insertion loss recorded in the MZI equals 6.42 dB at the best wavelength, but this value includes the grating coupler losses. In the loop-back waveguide, the insertion loss is 5.11 dB. Therefore, the MZI insertion loss is estimated near 1.31 dB. It is important to note that, at the wafer scale, the calculated mean value of crosstalk is −25 dB, and by testing the other input (Out2 instead of Out1), the same value was found. It is noteworthy that these measurements were carried out at room temperature. We did not change the temperature to investigate its effect on the MZI, but we think that it is quite resistant to temperature changes. Waveguide crossing was also characterized; the results obtained are shown in Figure 9c. The measured crosstalk is lower than −42 dB, with an insertion loss of 0.1 dB. Our best components in performances are summarized in Table 5.  Table 4 values, our technology has better performances in terms of crosstalk, but lower performances in terms of loss. For the best die, we measured a crosstalk of −33.4 dB in bar-state, and a crosstalk of −31.3 dB in cross-state. The transmission spectrum in both states and for the loop-back waveguide is depicted in Figure 9b, the insertion loss recorded in the MZI equals 6.42 dB at the best wavelength, but this value includes the grating coupler losses. In the loop-back waveguide, the insertion loss is 5.11 dB. Therefore, the MZI insertion loss is estimated near 1.31 dB. It is important to note that, at the wafer scale, the calculated mean value of crosstalk is −25 dB, and by testing the other input (Out2 instead of Out1), the same value was found. It is noteworthy that these measurements were carried out at room temperature. We did not change the temperature to investigate its effect on the MZI, but we think that it is quite resistant to temperature changes. Waveguide crossing was also characterized; the results obtained are shown in Figure 9c. The measured crosstalk is lower than −42 dB, with an insertion loss of 0.1 dB. Our best components in performances are summarized in Table 5.  Table 4 values, our technology has better performances in terms of crosstalk, but lower performances in terms of loss. We compared the four topologies discussed before, based on these performances; Figure 10 shows values for each of them. DLN scales better than the others did, a 32 × 32 switch can be fabricated with an ≥ 20 dB. However, we can notice that it is badly impacted by the first-order MZI crosstalk generated at the center stage, unlike dilated Beneš and S&S, whose s are over 40 dB for = 4. values of dilated Beneš is quite good on a small scale (N ≤16), but waveguide crossings loss (0.1 dB/crossing) badly affect its performance for the higher scale. Beneš is a good topology because its does not drop quickly. Nevertheless, it requires further optimization of first-order MZI crosstalk. The high number of waveguide crossings in S&S is still a real issue; we think it is not adequate for our technology. Other topologies could be analyzed using our SCR analytical model to choose the most suitable. We compared the four topologies discussed before, based on these performances; Figure 10 showŝ SCR values for each of them. DLN scales better than the others did, a 32 × 32 switch can be fabricated with anŜCR ≥ 20 dB. However, we can notice that it is badly impacted by the first-order MZI crosstalk generated at the center stage, unlike dilated Beneš and S&S, whoseŜCRs are over 40 dB for N = 4. SCR values of dilated Beneš is quite good on a small scale (N ≤ 16), but waveguide crossings loss (0.1 dB/crossing) badly affect its performance for the higher scale. Beneš is a good topology because itŝ SCR does not drop quickly. Nevertheless, it requires further optimization of first-order MZI crosstalk. The high number of waveguide crossings in S&S is still a real issue; we think it is not adequate for our technology. Other topologies could be analyzed using our SCR analytical model to choose the most suitable.

Discussion
By using our simple metric in order to evaluate and compare between architectures, we found that waveguide crossings are critical components, especially in large-scale switches. Lu and Thompson in [15] and Kabacinski in [17] did not consider the effects of waveguide crossings in their SNR calculations. With these obtained results, we underline its strong influence on the LS-MZS performances. Indeed, S&S is a simple architecture that reduces the crosstalk induced by MZIs, but the central interconnection, composed of a large number of waveguide crossings, considerably limits the overall performance of the network. The high number of waveguide crossings also influences the performance of dilated Beneš. DLN offers the right compromise in terms of stage count, crossing count, and total cumulative crosstalk. Yet, the total number of MZIs increases rapidly. Furthermore, we can also determine the maximum crosstalk and loss values of each component in order to design an LS-MZS of order N.

Appendix A
Here, we show how we simulated Beneš and dilated Beneš numerically in order to test the accuracy of our expression. Also, we discuss the results of the simulations. A switch topology can be represented as a matrix decomposition of multiple stages and interconnections, as shown in Figure A1.

Discussion
By using our simple metric in order to evaluate and compare between architectures, we found that waveguide crossings are critical components, especially in large-scale switches. Lu and Thompson in [15] and Kabacinski in [17] did not consider the effects of waveguide crossings in their SNR calculations. With these obtained results, we underline its strong influence on the LS-MZS performances. Indeed, S&S is a simple architecture that reduces the crosstalk induced by MZIs, but the central interconnection, composed of a large number of waveguide crossings, considerably limits the overall performance of the network. The high number of waveguide crossings also influences the performance of dilated Beneš. DLN offers the right compromise in terms of stage count, crossing count, and total cumulative crosstalk. Yet, the total number of MZIs increases rapidly. Furthermore, we can also determine the maximum crosstalk and loss values of each component in order to design an LS-MZS of order N. Funding: This work was supported by the French national program 'programme d'Investissements d'Avenir', IRT Nanoelec ANR-10-AIRT-05.

Conflicts of Interest:
The authors declare no conflict of interest.

Appendix A
Here, we show how we simulated Benes and dilated Benes numerically in order to test the accuracy of ourŜCR expression. Also, we discuss the results of the simulations.
A switch topology can be represented as a matrix decomposition of multiple stages and interconnections, as shown in Figure A1.
Here, we show how we simulated Beneš and dilated Beneš numerically in order to test the accuracy of our expression. Also, we discuss the results of the simulations. A switch topology can be represented as a matrix decomposition of multiple stages and interconnections, as shown in Figure A1.  With m, n j ∈ N * × N * and j ∈ {1, m}. The transfer matrix of the switch network can be seen as a product of the stage matrices: With, We define, For i ∈ 1, n j : The State of each M ij depends on the network configuration. T j is the interconnection matrix connecting two following stages, S j−1 and S j+1 . This matrix model is detailed through the example of 4 × 4 − Benes ( Figure 6). The following interconnection in Figure A2 can be modeled with the matrix T defined as: Appl. Sci. 2020, 10, x FOR PEER REVIEW 13 of 16 With , ∈ ℕ * × ℕ * and ∈ {1, }. The transfer matrix of the switch network can be seen as a product of the stage matrices: We define, For ∈ 1, : The State of each depends on the network configuration. is the interconnection matrix connecting two following stages, and . This matrix model is detailed through the example of 4 × 4 − Beneš ( Figure 6). The following interconnection in Figure A2 can be modeled with the matrix defined as: We note: P out1 , P out2 , P out3 , P out4 , the four powers of the structure outputs. The expression of 4 × 4 − Benes can therefore be written as follows: and, We have applied the matrix approach to implement Beneš and dilated Beneš for 2, 4, 8, and 16 switch sizes. Then we have tested several permutations of MZIs, corresponding to various possible paths, with the consideration that only one signal passes through an MZI in dilated Beneš. The performance parameters used are: Xtalk MZI = −20 dB, Xtalk X = −25 dB, Loss X = 0.03 dB. The implementation of the matrix models was developed with Python, and the simulations were limited to N ≤ 16 because of the time requirement. The matrix simulation results, in black square dots on Figure A3 for both architectures, fit well to ourŜCR model ones plotted as the solid blue line. In order to investigate the waveguide crossings effects, Figure A3a traces theŜCR values of Benes without taking into account the effects of waveguide crossings (solid red line), i.e., x = 0 and l x = 1. As we can notice, the difference between the two curves increases with the number of inputs/outputs; this is due to the number of waveguide crossings becoming high in a large network. For dilated Beneš, the results are presented in Figure A3b. We observe that the gap between the two curves is even higher (from 15 to 18 dB to be compared to 5 dB max for Beneš), that is because the waveguide crossing count in this architecture is much higher.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 14 of 16 implementation of the matrix models was developed with Python, and the simulations were limited to N ≤ 16 because of the time requirement. The matrix simulation results, in black square dots on Figure A3 for both architectures, fit well to our model ones plotted as the solid blue line. In order to investigate the waveguide crossings effects, Figure A3a traces the values of Beneš without taking into account the effects of waveguide crossings (solid red line), i.e., = 0 and = 1. As we can notice, the difference between the two curves increases with the number of inputs/outputs; this is due to the number of waveguide crossings becoming high in a large network. For dilated Beneš, the results are presented in Figure A3b. We observe that the gap between the two curves is even higher (from 15 to 18 dB to be compared to 5 dB max for Beneš), that is because the waveguide crossing count in this architecture is much higher. As mentioned in Section 4.2, the accuracy of our model could decrease when waveguide crossing losses are important. For verification purposes, we simulated Beneš considering = 0.2 , relatively high losses. The results are shown in Figure A4. We can see that our model still gives a good approximation (less than 1.5 dB difference between value and simulation result in the case of Beneš of order 16). This shows that our mathematical model remains valid even if the waveguide crossing losses are significant. As mentioned in Section 4.2, the accuracy of our model could decrease when waveguide crossing losses are important. For verification purposes, we simulated Beneš considering Loss X = 0.2 dB, relatively high losses. The results are shown in Figure A4. We can see that ourŜCR model still gives a good approximation (less than 1.5 dB difference betweenŜCR value and simulation result in the case of Beneš of order 16). This shows that our mathematical model remains valid even if the waveguide crossing losses are significant.