Enhanced E ﬃ cient EMT-Type Model of the MMCs Based on Arm Equivalence

: The large number of switching elements in modular multilevel converters (MMCs) contribute a tremendous computational burden for electromagnetic transient (EMT) simulation programs. Detailed equivalent models (DEMs) and average value model (AVMs) are currently two major types of accurate and e ﬃ cient model. However, the DEMs are still computationally ine ﬃ cient for the simulation scenarios in large-scale MMC based high-voltage direct current (MMC-HVDC) grids, as the models represent all submodule (SMs) switching events, and memorize all individual capacitor voltages. Though the AVMs provide a faster simulation speed by using a single equivalent capacitor on the DC side, they have a relatively low simulation accuracy compared to DEMs, especially under blocked mode. This paper proposes an enhanced computationally e ﬃ cient model based on arm equivalence (AEM), which can accurately represent the dynamic behaviors in both de-blocked and blocked modes. Compared to the DEMs, the proposed AEM is more e ﬃ cient, with no loss of accuracy, and the simulation speed is irrespective of the SM number. The accuracy and computational e ﬃ ciency of the proposed model were validated against the DEM and AVM through several simulation scenarios in a two-terminal MMC-HVDC system on the power systems computer aided design / electromagnetic transient in DC


Introduction
The modular multilevel converter based high-voltage direct current (MMC-HVDC) has been widely applied in large-scale renewable energy integration and asynchronous power grid interconnection [1][2][3]. Compared with the conventional line-commutated converter (LCC) and two-or three-level voltage source converters (VSCs), the MMC has become the most promising and competitive alternative due to its high modularity, no commutation failure, and excellent output waveforms [4][5][6][7].
In order to research the dynamic behaviors of MMCs, significant research efforts have been devoted to develop MMC models for different application purposes on electromagnetic transient (EMT) simulation programs [8,9]. Most EMT simulation programs use Dommel's algorithm [8]. With the application of trapezoidal integration, all dynamic elements are converted into a Norton equivalent current source in parallel with a conductance. Then, the admittance matrix equation of the full circuit is formulated to solve the circuit, which is the nodal analysis method.
The detailed switching modes (DSMs) (e.g., detailed nonlinear insulated-gate bipolar transistor (IGBT)-based model, and simplified IGBT switchable resistance-based model) could accurately present the IGBT switching characteristics and dynamic behaviors of the MMCs [10]. Whereas, with a large count in switching elements, the MMC contributes a significantly large number of switchable nodes to the admittance matrix (Y) of the full circuit. Due to the high switching frequency (typically in the kHz range) [11], the large-sized Y must be frequently updated and re-inversed at every switching 1.
The proposed AEM can more accurately reproduce the dynamics of the arm currents and the SM capacitor voltages compared to AVMs. The proposed AEM can reproduce the dynamic behaviors of the DEM under different scenarios very accurately, and is more computationally efficient with no loss of accuracy. 2.
The proposed AEM can accurately represent the dynamic responses in both de-blocked and blocked modes. Meanwhile, the ON-state and OFF-state resistances of the IGBT and its anti-parallel diodes in the SMs are accurately represented.

3.
The proposed AEM is verified against the DEM and AVM in a two-terminal MMC-HVDC system. The simulation results demonstrate the accuracy and computational efficiency of the proposed model in both de-blocked and blocked modes. Moreover, the simulation speed of the AEM is irrespective of the SM number. 4.
Except for the dynamics of individual SMs, the proposed AEM could be suitable for various simulation scenarios with no loss of accuracy, especially for large-scale MMC-HVDC grids.
This paper is organized as follows: Section 2 makes a brief introduction about the general structure, the control scheme, the DEM, and the AVM of the MMC. In Section 3, the arm equivalent model is derived based on average switching functions (ASFs). Based on the Thévenin's theorem and nested fast and simultaneous solution, Section 4 describes the modelling process of the proposed AEM in detail. In Section 5, the accuracy and computational efficiency of the AEM is verified against the DEM and Appl. Sci. 2020, 10, 8421 3 of 18 AVM, with several scenarios applied on the power systems computer aided design/ electromagnetic transient in DC system (PSCAD/EMTDC) program. Conclusions are drawn in Section 6.

General Structure
As illustrated in Figure 1a, the three-phase MMC consists of six arms, and each arm is composed of numerous half-bridge submodules (HBSMs) and an inductor (L 0 ) in series [20]. N is the number of HBSMs per arm. The arm voltage and the arm current are v rj and i rj , respectively. Here, the subscripts r (r = p, n) denote the upper and lower arms; j (j = a, b, c) denote one of the three phases. v sj (v sa , v sb , and v sc ,) and i vj (i va , i vb , and i vc ,) are the AC voltage and current in phase j at the AC side of the MMC, respectively; L ac is the equivalent reactance of the AC system. Figure 1a, the three-phase MMC consists of six arms, and each arm is composed of numerous half-bridge submodules (HBSMs) and an inductor (L0) in series [20]. N is the number of HBSMs per arm. The arm voltage and the arm current are vrj and irj, respectively. Here, the subscripts r (r = p, n) denote the upper and lower arms; j (j = a, b, c) denote one of the three phases. vsj (vsa, vsb, and vsc,) and ivj (iva, ivb, and ivc,) are the AC voltage and current in phase j at the AC side of the MMC, respectively; Lac is the equivalent reactance of the AC system.

As illustrated in
Each HBSM contains two IGBTs, two anti-parallel diodes and a capacitor (C0). The firing signals of the two IGBTs are T1 and T2, respectively. vC, rj_x is the voltage of the xth capacitor on the r arm in phase j; vSM, rj_x is the output voltage of the xth SM on the r arm in phase j. As shown in Figure 1b-d, the current flow paths are highlighted in a red color, and the current flow paths rely on the current flow direction.
Two IGBTs are open circuit.

Control Scheme
As depicted in Figure 2, the vector current control based on the decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL) is adopted for the MMC, which can completely eliminate the detection errors of conventional synchronous reference frame phase-locked loop (SRF-PLL) [21]. In Figure 2, vsabc (vsabc = [vsa vsb vsc] T ) and ivabc (ivabc = [iva ivb ivc] T ) are the three-phase voltage and current vectors at the AC side of the MMC, respectively; θ is the vsabc phase angle detected by are the dq axis positive-sequence voltage and current component vectors, respectively, and similarly for  Each HBSM contains two IGBTs, two anti-parallel diodes and a capacitor (C 0 ). The firing signals of the two IGBTs are T 1 and T 2 , respectively. v C, rj_x is the voltage of the xth capacitor on the r arm in phase j; v SM, rj_x is the output voltage of the xth SM on the r arm in phase j. As shown in Figure 1b-d, the current flow paths are highlighted in a red color, and the current flow paths rely on the current flow direction.
As shown in Figure 1b,c, under steady-state operation, each HBSM only has two states: (1) inserted mode (T 1 = 1, and T 2 = 0), v SM, rj_x = v C, rj_x , and the charging or discharging of the capacitor depends on the current flow direction; (2) bypassed mode (T 1 = 0, and T 2 = 1), v SM, rj_x = 0, irrespective of the current flow direction. As depicted in Figure 1d, under abnormal operation (e.g., start-up, protective actions), the HBSM is blocked by switching off all IGBTs, and both T 1 and T 2 are set to zero. Two IGBTs are open circuit.

Control Scheme
As depicted in Figure 2, the vector current control based on the decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL) is adopted for the MMC, which can completely eliminate the detection errors of conventional synchronous reference frame phase-locked loop (SRF-PLL) [21]. In Figure 2, v sabc (v sabc = [v sa v sb v sc ] T ) and i vabc (i vabc = [i va i vb i vc ] T ) are the three-phase voltage and current vectors at the AC side of the MMC, respectively; θ is the v sabc phase T   are the dq   axis positive-sequence voltage and current component vectors, respectively, and similarly Here, the superscripts + and − denote positive-sequence and negative-sequence components; the superscript * denotes the command references of the variables. p s and q s are the instantaneous active and reactive power [22], and P * s and Q * s are the command references for the output active and reactive power of the MMC, respectively. V * dc is the DC voltage command reference, and V * s is the command reference for the amplitude of AC voltage v sj .
output active and reactive power of the MMC, respectively. dc V is the DC voltage command reference, and  s V is the command reference for the amplitude of AC voltage vsj.
The control scheme is decomposed to an outer-loop power controller and an inner-loop current controller [23]. According to the active-and reactive-power control objectives, the outer-loop power controller generates the dq axis positive-sequence current command references vd i  and vq i  for the inner loop current control, respectively. The inner-loop current controller regulates the dq axis positive-sequence current components ( vdq i  ) at their references ( vdq i  ), and eliminate the negativesequence current components ( vdq i  ) with their references ( vdq i  ) set as zero, respectively [24]. Due to the conceptual and implementational simplicity, nearest level modulation (NLM) is adopted for a MMC with a high number of SMs [11].

Type A: Detailed Equivalent Models (DEMs)
DEMs reduce the size of the admittance matrix (Y) and the simulation burden of the MMC significantly, and the individual dynamics of every SM are still depicted [12]. As shown in Figure 3b, with the trapezoidal integration method, each SM capacitor is represented by an equivalent history voltage source in series with a resistance RC0, x = ΔT/(2C0), where ΔT denotes the simulation time-step. Then, based on Thévenin's theorem, the xth SM equivalent circuit in Figure 3c is obtained:  The control scheme is decomposed to an outer-loop power controller and an inner-loop current controller [23]. According to the active-and reactive-power control objectives, the outer-loop power controller generates the dq axis positive-sequence current command references i + * vd and i + * vq for the inner loop current control, respectively. The inner-loop current controller regulates the dq axis positive-sequence current components (i + vdq ) at their references (i + * vdq ), and eliminate the negative-sequence current components (i − vdq ) with their references (i − * vdq ) set as zero, respectively [24]. Due to the conceptual and implementational simplicity, nearest level modulation (NLM) is adopted for a MMC with a high number of SMs [11].

Type A: Detailed Equivalent Models (DEMs)
DEMs reduce the size of the admittance matrix (Y) and the simulation burden of the MMC significantly, and the individual dynamics of every SM are still depicted [12]. As shown in Figure 3b, with the trapezoidal integration method, each SM capacitor is represented by an equivalent history Appl. Sci. 2020, 10, 8421 5 of 18 voltage source in series with a resistance R C0, x = ∆T/(2C 0 ), where ∆T denotes the simulation time-step. Then, based on Thévenin's theorem, the xth SM equivalent circuit in Figure 3c is obtained: where where, v SM, x (t) and i SM, x (t) denotes the voltage and current of the xth SM at time t, respectively; V SMEQ, x (t − ∆T) denotes the equivalent history output voltage of the xth SM at earlier time t − ∆T, and V C0, x (t − ∆T) denotes the equivalent history capacitor voltage of the xth SM capacitor at earlier time t − ∆T; the values of resistor R u, x (similarly, R l, x ) are either a low resistance R on at ON-state or a large resistance R off at OFF state, which depends on the switch state [25]. Then, for the arm in series with N SMs, the arm equivalent circuit can be constructed as in Figure 3d, where, the arm current i Arm (t) = i SM, x (t), Appl. Sci. 2020, 10, x FOR PEER REVIEW 5 of 17 where, vSM, x(t) and iSM, x(t) denotes the voltage and current of the xth SM at time t, respectively; VSMEQ, x(t − ΔT) denotes the equivalent history output voltage of the xth SM at earlier time t − ΔT, and VC0, x(t − ΔT) denotes the equivalent history capacitor voltage of the xth SM capacitor at earlier time t − ΔT; the values of resistor Ru, x (similarly, Rl, x) are either a low resistance Ron at ON-state or a large resistance Roff at OFF state, which depends on the switch state [25]. Then, for the arm in series with N SMs, the arm equivalent circuit can be constructed as in Figure 3d, where, the arm current Here, VArm, x(t − ΔT) denotes the equivalent history arm voltage of xth SM at earlier time t − ΔT; vArm(t) is the arm voltage at time t.

Type B: Average Value Models (AVMs)
The AVMs neglect the impact of SM capacitor ripple voltage by using a single equivalent capacitance, and further improve the simulation efficiency. The AVMs have less accurate simulations compared to the DEMs [15].
A brief overview of the AVM is expressed here, and a further description is given in [13]. As shown in Figure 4, the IGBTs are not explicitly represented and the behaviour of the MMC is modelled with the controlled voltage sources (vvj) and controlled current source (Icon), where where, vref,vj is the j phase voltage reference generated by the control system, which is a per-unit value; Ceq, AVM represents the DC-side equivalent capacitance; LArm (= L0) and RArm (= NRON) denotes the arm equivalent inductance and resistance, respectively. Under de-blocked mode, the switch (S1) is open, and S2 is closed; under blocked mode, S1 is closed to emulate the MMC blocking while switch S2 is open. The dynamics under blocked mode are relatively inaccurate [15]. Here, V Arm, x (t − ∆T) denotes the equivalent history arm voltage of xth SM at earlier time t − ∆T; v Arm (t) is the arm voltage at time t.

Type B: Average Value Models (AVMs)
The AVMs neglect the impact of SM capacitor ripple voltage by using a single equivalent capacitance, and further improve the simulation efficiency. The AVMs have less accurate simulations compared to the DEMs [15].
A brief overview of the AVM is expressed here, and a further description is given in [13]. As shown in Figure 4, the IGBTs are not explicitly represented and the behaviour of the MMC is modelled with the controlled voltage sources (v vj ) and controlled current source (I con ), where where, v ref,vj is the j phase voltage reference generated by the control system, which is a per-unit value; C eq, AVM represents the DC-side equivalent capacitance; L Arm (= L 0 ) and R Arm (= NR ON ) denotes the arm equivalent inductance and resistance, respectively. Under de-blocked mode, the switch (S 1 ) is open, and S 2 is closed; under blocked mode, S 1 is closed to emulate the MMC blocking while switch S 2 is open. The dynamics under blocked mode are relatively inaccurate [15].

Equivalent Circuit of the MMC
In this Section, the arm equivalent circuits are only derived under de-blocked mode. The arm equivalence under blocked mode will be discussed in the next Section.

Average Capacitor Current of the SMs
The positive direction of the currents and voltages are shown in Figure 1a. As shown in Figure  1b, when the SM is under inserted mode, through the switching actions of power devices, the arm current is diverted into the capacitor branch of the SM. The current flowing through the capacitor is defined as the capacitor current. The capacitor current of the xth SM on the r arm in phase j iC, rj_x is equal to the current flowing through the r arm in phase j iArm, rj. Namely, iC, rj_x = iArm, rj. In contrast, iC, rj_x is equal to zero for bypassed mode. Each SM is under only one mode at a specific moment. For the sake of convenience, iC, rj_x is expressed as: where, iArm, rj is the current flowing through the r arm in phase j; Srj_x represents the switching function of the xth SM on the r arm in phase j, and is defined as: Sum up the capacitor current of all N SMs on the specific arm, then: As the number of SMs per arm N is very large, and the switching frequency is high enough, the inserted mode and bypassed mode for each SM are switching frequently. Therefore, the definition of the ASF is applied to represent the characteristic of SM frequent switching actions to simplify the analysis. For the sake of simplicity, the ASF is defined as Srj to denote the average insertion ratio of the SMs on the r arm in phase j, and is expressed as [16,26]: Figure 4. The average value model (AVM) topology.

Equivalent Circuit of the MMC
In this Section, the arm equivalent circuits are only derived under de-blocked mode. The arm equivalence under blocked mode will be discussed in the next Section.

Average Capacitor Current of the SMs
The positive direction of the currents and voltages are shown in Figure 1a. As shown in Figure 1b, when the SM is under inserted mode, through the switching actions of power devices, the arm current is diverted into the capacitor branch of the SM. The current flowing through the capacitor is defined as the capacitor current. The capacitor current of the xth SM on the r arm in phase j i C, rj_x is equal to the current flowing through the r arm in phase j i Arm, rj . Namely, i C, rj_x = i Arm, rj . In contrast, i C, rj_x is equal to zero for bypassed mode. Each SM is under only one mode at a specific moment. For the sake of convenience, i C, rj_x is expressed as: where, i Arm, rj is the current flowing through the r arm in phase j; S rj_x represents the switching function of the xth SM on the r arm in phase j, and is defined as: Sum up the capacitor current of all N SMs on the specific arm, then: As the number of SMs per arm N is very large, and the switching frequency is high enough, the inserted mode and bypassed mode for each SM are switching frequently. Therefore, the definition of the ASF is applied to represent the characteristic of SM frequent switching actions to simplify the analysis. For the sake of simplicity, the ASF is defined as S rj to denote the average insertion ratio of the SMs on the r arm in phase j, and is expressed as [16,26]: In order to maintain the DC voltage V dc stable, the sum of S pj and S nj in phase j is controlled as 1.
The average capacitor current of the SMs on the r arm in phase j i C, rj is defined as: Note that, the sums of the currents in Equations (11) and (14) do not express the connection of SMs in parallel, but express the concept of SM average switching actions. From Equations (12) and (13), Equations (11) is rewritten as:

Equivalent Voltage of the Arm
Similarly to the average capacitor current, the output voltage of the xth SM on the r arm in phase j v sm, rj_x is expressed as: Sum up the voltage of all N SMs, then: Suppose that all N SMs on an arm are identical, and all SM capacitor voltages are perfectly balanced [27,28], then the average capacitor voltage of each SM on the r arm in phase j v C, rj is expressed as: Substitute Equations (12), (17) into Equation (16), and Equation (16) is rewritten as: From Equation (18), the equivalent output voltage on the r arm in phase j v EQ, rj is defined as:

Equivalent Voltage of the Arm
Based on the relationship between the voltage and current of the capacitor, the xth SM capacitor current i C, rj_x can also be written as: Appl. Sci. 2020, 10, 8421 8 of 18 Sum up the capacitor current of all N SMs on the specific arm, then: Combine with Equation (18), then Substitute Equations (13), (14), (20) into Equation (23), and Equation (23) is rewritten as: According to Equation (23), the arm equivalent circuit based on the average capacitor current are shown in Figure 5b, which models the charging and discharging of the arm equivalent capacitor C EQ1, rj , and can accurately represent the voltage ripples of the equivalent capacitor. The resistances R 1 and R 2 in Figure 5b,c are employed to take the losses of the power devices into account, whose values will be discussed later. In Figure 5b,c, the arm current mainly flows through the path marked in blue or purple color, and extremely weak current flows through R 2 due to the very large R 2 .
Appl. Sci. 2020, 10, x FOR PEER REVIEW 8 of 18 From (19), Equation (21) is re-derived as: According to Equation (26), the arm equivalent circuit based on arm current is replaced as in Figure 5c, which reflects the relationship between the arm equivalent output voltage and arm current, with an ASF-related equivalent capacitor CEQ2, rj, and can exhibit the dynamics of the arm currents. In Figure 5c, the circuit Arm ,rj i′ is very approximate to the arm current Arm ,rj i due to the R2 shunt effect.
CEQ2, rj is defined as: As shown in Figure 5b,c, compared with DSMs, the arm equivalence could drastically reduce the size of the nodes in the entire circuit and the computational intensity. The application for two arm equivalent circuits will be discussed in next Section.

Values of Resistances R1 and R2
An IGBT and its anti-parallel diode act as a bidirectional switch, and only one of them is conducted at a given instance. The switching actions can be treated as a two-state resistor: (1) ON state with a low resistance Ron; (2) OFF state with a large resistance Roff. Under a de-blocked state, for each arm, the sum of the SMs at inserted mode and bypassed mode is N at any instant. In other words, based on the current path as drawn in Figure 5a, the ON-state and OFF-state devices are always equal to N. Hence, based on the ASF, R1, and R2 are expressed as: 1 o n = R NR (28) 2 o f f = R NR (29)

Modelling Process of the Proposed AEM
Most EMT simulation programs use Dommel's algorithm [29]. Through the application of the trapezoidal integration, all dynamic elements are converted into a Norton equivalent current source in parallel with a conductance. Then, the admittance matrix equation of full circuit is formulated to solve the circuit, through the nodal analysis method (I = YU). Here, Y is the admittance matrix; U is C EQ1, rj is expressed as: From (19), Equation (21) is re-derived as: According to Equation (26), the arm equivalent circuit based on arm current is replaced as in Figure 5c, which reflects the relationship between the arm equivalent output voltage and arm current, with an ASF-related equivalent capacitor C EQ2, rj , and can exhibit the dynamics of the arm currents. In Figure 5c, the circuit i Arm,rj is very approximate to the arm current i Arm,rj due to the R 2 shunt effect. C EQ2, rj is defined as: As shown in Figure 5b,c, compared with DSMs, the arm equivalence could drastically reduce the size of the nodes in the entire circuit and the computational intensity. The application for two arm equivalent circuits will be discussed in next Section.

Values of Resistances R 1 and R 2
An IGBT and its anti-parallel diode act as a bidirectional switch, and only one of them is conducted at a given instance. The switching actions can be treated as a two-state resistor: (1) ON state with a low resistance R on ; (2) OFF state with a large resistance R off . Under a de-blocked state, for each arm, the sum of the SMs at inserted mode and bypassed mode is N at any instant. In other words, based on the current path as drawn in Figure 5a, the ON-state and OFF-state devices are always equal to N. Hence, based on the ASF, R 1 , and R 2 are expressed as:

Modelling Process of the Proposed AEM
Most EMT simulation programs use Dommel's algorithm [29]. Through the application of the trapezoidal integration, all dynamic elements are converted into a Norton equivalent current source in parallel with a conductance. Then, the admittance matrix equation of full circuit is formulated to solve the circuit, through the nodal analysis method (I =YU). Here, Y is the admittance matrix; U is the nodal voltage vector; I is the injection current vector that is renovated at each time-step, and is a function of the intrinsic sources and history terms arising from discrete companion components at earlier time-steps. By employing nested fast and simultaneous solution [19], the MMC circuit is decomposed into six arm subsystems, and a non-arm subsystem that excludes six arms. Each arm subsystem can be solved separately to a Thévenin equivalent circuit, which leads to a significant reduction in computation. Then, the Thévenin equivalent circuits of six arm subsystems are inserted in to the non-arm subsystem to solve the overall MMC-HVDC system. Through this approach, the arm with numerous SMs is reduced to a single 2-node element. Thus, the size of the admittance matrix (Y) of the overall circuit is drastically decreased, and the computational efficiency is significantly improved.

Thévenin Equivalent Circuit for the Arm on De-Blocked Model
Note that, the subscript rj is omitted later for simplicity. For the solution of the arm Thévenin equivalent circuit, the arm equivalent circuit based on arm current in Figure 5c is adopted.
Based on the trapezoidal integration method, the equivalent capacitor C EQ2 is represented as an equivalent history voltage source V C, EQ (t − ∆T) and a resistor R C, EQ2 , as in: The arm equivalent circuit inserted with C EQ2 discrete companion model is shown in Figure 6b, where v Arm (t) is the arm output voltage. Then, the Thévenin equivalent circuit of the arm is derived as in Figure 6c, whose parameters are as follows: The arm equivalent circuit inserted with CEQ2 discrete companion model is shown in Figure 6b, where vArm(t) is the arm output voltage. Then, the Thévenin equivalent circuit of the arm is derived as in Figure 6c, whose parameters are as follows:

Solution for the Equivalent Capacitor Voltage on De-Blocked Model
After the Thévenin equivalent circuit of the six arm subsystems at an earlier time-step is attained, as in Figure 6d, the entire circuit at the current time-step is finally solved by inserting the discrete companion models of the six arm subsystems into the non-arm subsystem. Then, the arm currents iArm(t) are obtained. According to the Figure 6b, the circuit Arm i is calculated as: From Equation (15), the average capacitor current iC(t) at current time-step is expressed as: According to Figure 5b, the arm equivalent capacitor voltage vEQ(t) at current time-step is calculated as:

Solution for the Equivalent Capacitor Voltage on De-Blocked Model
After the Thévenin equivalent circuit of the six arm subsystems at an earlier time-step is attained, as in Figure 6d, the entire circuit at the current time-step is finally solved by inserting the discrete companion models of the six arm subsystems into the non-arm subsystem. Then, the arm currents i Arm (t) are obtained. According to the Figure 6b, the circuit i Arm is calculated as: From Equation (15), the average capacitor current i C (t) at current time-step is expressed as: According to Figure 5b, the arm equivalent capacitor voltage v EQ (t) at current time-step is calculated as: where, Here, i C (t − ∆T) and v EQ (t − ∆T) are the history of the average capacitor current and equivalent output voltage at an earlier time-step, respectively.

Thévenin Equivalent Circuit for the Arm on Blocked Model
Under blocked mode, all IGBTs on the arm are switched off, and the current path relies on the direction of the current. As shown in Figure 7a, when the current is positive, all capacitors on the arm are inserted in series into the arm, and the corresponding Thévenin equivalent circuit is depicted as the dark-green part in Figure 7c. Here, where, v C0 (t − ∆T) denotes the equivalent history voltage source of SM average capacitor voltage. Similarly to Equation (10), V C0, EQ (t − ∆T) is equal to V C0, EQ, x (t − ∆T). For negative current, alternatively, the current only flows through the diode D 2 as shown in Figure 7b,c.
where, vC0(t − ΔT) denotes the equivalent history voltage source of SM average capacitor voltage. Similarly to Equation (10), VC0, EQ(t − ΔT) is equal to VC0, EQ, x(t − ΔT). For negative current, alternatively, the current only flows through the diode D2 as shown in Figure 7b,c. As shown in Figure 7c, the blocked-state Thévenin circuit retains two static elements: the diodes D1 and D2 with negligible conductive resistances. The ON or OFF states of D1 and D2 directly depend on the EMT simulation programs, and do not need users to imitate their switching action. The solution for the equivalent capacitor voltage under blocked model is similar to the solution under deblocked model, and is not discussed in this paper for the sake of conciseness.

Thé venin Equivalent Circuit for Full States
The full-state Thévenin equivalent circuit is detailed in Figure 8a, where the IGBT T3 is inserted in parallel with D2 to switch the de-blocked or blocked modes. The T3 is ON for de-blocked mode, or OFF for blocked mode. In Figure 8b-d, the paths that current flows through under different states are highlighted in red, respectively. The parameters of the equivalent circuit are listed in Table 1. Here, in blocked mode, REQ1 is assigned with NRon to account for the conductive resistances of all diodes on the arm. As shown in Figure 7c, the blocked-state Thévenin circuit retains two static elements: the diodes D 1 and D 2 with negligible conductive resistances. The ON or OFF states of D 1 and D 2 directly depend on the EMT simulation programs, and do not need users to imitate their switching action. The solution for the equivalent capacitor voltage under blocked model is similar to the solution under de-blocked model, and is not discussed in this paper for the sake of conciseness.

Thévenin Equivalent Circuit for Full States
The full-state Thévenin equivalent circuit is detailed in Figure 8a, where the IGBT T 3 is inserted in parallel with D 2 to switch the de-blocked or blocked modes. The T 3 is ON for de-blocked mode, or OFF for blocked mode. In Figure 8b-d, the paths that current flows through under different states are highlighted in red, respectively. The parameters of the equivalent circuit are listed in Table 1. Here, in blocked mode, R EQ1 is assigned with NR on to account for the conductive resistances of all diodes on the arm.

Simulation Studies
The DEM, the AVM, and the proposed AEM were implemented by using PSCAD/EMTDC. A two-terminal 200-level monopolar MMC-HVDC system was built to benchmark the accuracy and efficiency of the proposed AEM in comparison with the DEM and AVM. The MMC system and its parameters are illustrated in Figure 9 and Table 2, respectively. The MMC controllers depicted in Figure 10 were implemented in three models, and the SM capacitor voltage balancing control in [27] was adopted for the DEM. The MMC1 and MMC2 use P-Q and Vdc-Q controls, respectively. In Figure  10

Simulation Studies
The DEM, the AVM, and the proposed AEM were implemented by using PSCAD/EMTDC. A two-terminal 200-level monopolar MMC-HVDC system was built to benchmark the accuracy and efficiency of the proposed AEM in comparison with the DEM and AVM. The MMC system and its parameters are illustrated in Figure 9 and Table 2, respectively. The MMC controllers depicted in Figure 10 were implemented in three models, and the SM capacitor voltage balancing control in [27] was adopted for the DEM. The MMC1 and MMC2 use P-Q and V dc -Q controls, respectively. In Figure 10, K Vdc , K P , K Vs , and K Q are the proportional coefficients, and T Vdc , T P , T Vs , and T Q are the integral time constants of the proportional-integral (PI) regulator, respectively. Here, K Vdc = 10, K P = 0.64, K Vs = 0.20, K Q = 0.21, T Vdc = 0.01 s, T P = 0.0165 s, T Vs = 0.0025 s, and T Q = 0.029 s

Simulation Studies
The DEM, the AVM, and the proposed AEM were implemented by using PSCAD/EMTDC. A two-terminal 200-level monopolar MMC-HVDC system was built to benchmark the accuracy and efficiency of the proposed AEM in comparison with the DEM and AVM. The MMC system and its parameters are illustrated in Figure 9 and Table 2, respectively. The MMC controllers depicted in Figure 10 were implemented in three models, and the SM capacitor voltage balancing control in [27] was adopted for the DEM. The MMC1 and MMC2 use P-Q and Vdc-Q controls, respectively. In Figure  10       The simulation time step was 20 µs. In the following simulation results, the SM capacitor voltage of the DEM was the sum of all individual SM capacitor voltages on the upper arm in phase a of MMC1, and the arm current was observed on the upper arm in phase a of MMC1. Since the AVM does not have the capacity to represent the arm dynamics, the arm current and SM capacitor voltages of the AEM and DEM, only, were compared.

Steady State
At t = 1.0 s, The P reference of MMC1 stepped from 200 MW to 400 MW. The MMC1 transients due to the change of the P reference are shown in Figure 11. As the active power was regulated to 400 MW at t = 1.0 s, the DC current rose from 0.5 kA to 1 kA, which led to higher SM capacitor voltage ripples, as shown in Figure 11d. The current rise rate of the AVM was slightly slower than the other two models.

DC-Side Pole-to-Ground Fault
At t = 1.0 s, a DC-side pole-to-ground permanent fault was applied in the middle of the overhead DC line, as shown in Figure 9. For the AEM and DEM, both MMC1 and MMC2 were blocked at 2 ms after the DC fault occurred. For the AVM, S1 was closed, and S2 was open at 1.002 s. The AC breakers were opened at t = 1.1 s. The responses of the three models are shown in Figure 12.
After the fault occurred, the DC voltage dropped sharply, as in Figure 12b, and the MMCs immediately contributed the fault current to the DC fault location. As shown in Figure 12c, the DC currents rose sharply as the SM capacitor discharge current became the dominant component, resulting in the active power of MM1 increasing, and SM capacitor voltages reducing successively. After blocking the MMCs, the SM capacitor was no longer discharged, thus staying constant, as shown in Figure 12d. Therefore, the fault current from the AC system became the dominant component. After the ACCB is tripped, the residual DC fault currents will gradually decay through the R-L damping loop [30,31]. Due to the large decay time constant in the damping loop, it takes a From Figure 11, the dynamics of the proposed AEM very accurately reproduced the responses of the DEM. Especially in Figure 11d, the ripple of the equivalent capacitor voltage for the AEM is essentially identical to the sum of all individual SM capacitor voltages for the DEM, which proves the accuracy of the proposed AEM. Compared to the AEM and DEM, only the AC voltage in phase a at valve-side was the same as the other models. Nevertheless, the AVM shows low accuracy on the DC side, where only the variation trends of DC voltage and DC current were similar.

DC-Side Pole-to-Ground Fault
At t = 1.0 s, a DC-side pole-to-ground permanent fault was applied in the middle of the overhead DC line, as shown in Figure 9. For the AEM and DEM, both MMC1 and MMC2 were blocked at 2 ms after the DC fault occurred. For the AVM, S 1 was closed, and S 2 was open at 1.002 s. The AC breakers were opened at t = 1.1 s. The responses of the three models are shown in Figure 12.

AC-Side Three-Phase-to-Ground Fault
A three-phase-to-ground fault is applied to the MMC1 primary side at t = 1.0 s, and is cleared after 0.1 s (t = 1.1 s). Figure 13 illustrates the simulation waveforms of three models. After the AC fault occurred, the AC voltage at the MMC1 primary side dropped to zero, thus leading to the active power and DC current reducing to zero. Due to the insufficient active power at the DC side, the DC voltage and SM capacitor voltage decreased. After clearing the AC fault, and with the active power gradually recovered, the DC voltage gradually increased to the rated value. As in Figure 13b, the variation amplitude of DC voltage for the AVMs was larger than the other two models. The current waveform of the AVMs was significantly different from the other models during the fault.
As in Figure 13, the proposed AEM accurately matches the transient responses of the DEM, while the AVM cannot properly replicate the transient responses of the DEM. Comprehensively considering the Sections 5.1-5.3, the proposed AEM is suitable for various scenarios with no loss of accuracy; the AVM is more suitable for studying the AC side dynamics of MMC, while the DC side dynamics are somewhat inaccurate. After the fault occurred, the DC voltage dropped sharply, as in Figure 12b, and the MMCs immediately contributed the fault current to the DC fault location. As shown in Figure 12c, the DC currents rose sharply as the SM capacitor discharge current became the dominant component, resulting in the active power of MM1 increasing, and SM capacitor voltages reducing successively. After blocking the MMCs, the SM capacitor was no longer discharged, thus staying constant, as shown in Figure 12d. Therefore, the fault current from the AC system became the dominant component. After the ACCB is tripped, the residual DC fault currents will gradually decay through the R-L damping loop [30,31]. Due to the large decay time constant in the damping loop, it takes a long time (about 0.4 s) for the fault DC current to decay to zero [30].
It was observed that the trends of the DC fault currents for three models were similar before blocking the MMCs, since the DC-side equivalent fault circuits were similar [30]. After blocking the MMCs, the proposed AEM very accurately reproduced the transient responses of the DEM. Compared to the AEM and DEM, only the DC voltage was similar to the other models. Since the AC side and DC side of AVM are decoupled, the capacitor C eq, AVM is disconnected after blocking the MMCs, leading to the incorrect dynamics, especially for the active power and DC current. This simulation scenario directly reflected that the AVMs have difficulty achieving accurate results under blocked mode.
Therefore, the proposed AEM can accurately reproduce the dynamic responses in both de-blocked and blocked modes.

AC-Side Three-Phase-to-Ground Fault
A three-phase-to-ground fault is applied to the MMC1 primary side at t = 1.0 s, and is cleared after 0.1 s (t = 1.1 s). Figure 13 illustrates the simulation waveforms of three models. After the AC fault occurred, the AC voltage at the MMC1 primary side dropped to zero, thus leading to the active power and DC current reducing to zero. Due to the insufficient active power at the DC side, the DC voltage and SM capacitor voltage decreased. After clearing the AC fault, and with the active power gradually recovered, the DC voltage gradually increased to the rated value. As in Figure 13b, the variation amplitude of DC voltage for the AVMs was larger than the other two models. The current waveform of the AVMs was significantly different from the other models during the fault.

Computational Performance
A 1.0-s simulation study for the test system in Figure 9 was executed on a PC with 3.6 GHz Intel core i7-7700 HQ with 32 GB RAM under Microsoft Windows 10 operating system. Different numbers of SMs per arm were employed in the simulation studies to represent different complexities of test systems. The simulation execution times for the three models are summarized in Table 3.
From Table 3, the DEM required longer simulation execution times, as the number of SMs per arm increased, since all SMs were considered separately and all individual capacitor voltage ripples were recorded. However, the proposed AEM requires the same execution time regardless of the number of the SMs per arm, as all SMs do not have to be considered separately, due to the arm equivalence. The proposed AEM was about only 45% slower than the AVM, and was more than three times faster than the DEM in terms of simulation efficiency. Hence, Table 3 demonstrates that the proposed model can be efficiently suitable for large-scale MMC-HVDC grids. In conclusion, the proposed AEM not only has an accuracy consistent with DEMs, but also has a satisfactory simulation efficiency compared to the AVMs. Table 3. Execution times for the three models. As in Figure 13, the proposed AEM accurately matches the transient responses of the DEM, while the AVM cannot properly replicate the transient responses of the DEM. Comprehensively considering the Sections 5.1-5.3, the proposed AEM is suitable for various scenarios with no loss of accuracy; the AVM is more suitable for studying the AC side dynamics of MMC, while the DC side dynamics are somewhat inaccurate.

Computational Performance
A 1.0-s simulation study for the test system in Figure 9 was executed on a PC with 3.6 GHz Intel core i7-7700 HQ with 32 GB RAM under Microsoft Windows 10 operating system. Different numbers of SMs per arm were employed in the simulation studies to represent different complexities of test systems. The simulation execution times for the three models are summarized in Table 3. From Table 3, the DEM required longer simulation execution times, as the number of SMs per arm increased, since all SMs were considered separately and all individual capacitor voltage ripples were recorded. However, the proposed AEM requires the same execution time regardless of the number of the SMs per arm, as all SMs do not have to be considered separately, due to the arm equivalence. The proposed AEM was about only 45% slower than the AVM, and was more than three times faster than the DEM in terms of simulation efficiency. Hence, Table 3 demonstrates that the proposed model can be efficiently suitable for large-scale MMC-HVDC grids. In conclusion, the proposed AEM not only has an accuracy consistent with DEMs, but also has a satisfactory simulation efficiency compared to the AVMs.

Conclusions
This paper proposed an enhanced computationally efficient model for MMC based on arm equivalence. The proposed AEM could accurately reproduce the dynamic responses in both de-blocked and blocked modes, and has significant computational efficiency, especially for the large-scale MMC-HVDC grids. Based on a two-terminal monopolar MMC-HVDC system built on the PSCAD/EMTDC program, the accuracy and efficiency of the proposed AEM was verified against the DEM and AVM, with several simulation scenarios, where both de-blocked and blocked modes were considered. The simulation results demonstrated that: 1.
The proposed model can accurately represent the dynamics of the arm currents and SM capacitor voltages compared to AVM. In terms of simulation efficiency, the proposed AEM is only about 45% slower than the AVM, and is more than three times faster than the DEM.

2.
Compared to the DEM, the proposed AEM very accurately reproduces the dynamic behaviors of the DEM under different scenarios, and affords a substantial acceleration in simulation speed, with no loss of accuracy. Except for the dynamics of individual SMs, the proposed AEM could be suitable for various simulation scenarios with no loss of accuracy.

3.
The proposed AEM consumes the same amount of execution time regardless of the number of the SMs per arm, thus it can be efficiently adopted for large-scale MMC-HVDC grids with high computational speed.

4.
Although the simulation efficiency of AVMs is satisfactory, they lose accuracy compared to DEMs, especially for the blocked mode. Thus, the AVMs are suitable for system-level studies, which mainly focus on the steady-state dynamics and responses of AC fault.
Thereby, the proposed AEM has a higher computational efficient with no loss of accuracy, which is desirable for studies of large-scale MMC-HVDC grids with large numbers of SMs.
Author Contributions: Investigation, writing: X.L.; Supervision: Z.X. All authors have read and agreed to the published version of the manuscript.
Funding: This research received no external funding.

Conflicts of Interest:
The authors declare no conflict of interest.