A Non-Volatile Memory Based on NbO x / NbSe 2 Van Der Waals Heterostructures

: Two-dimensional (2D) van der Waals (vdW) layered transition metal dichalcogenides (TMDs) materials have been receiving a huge interest due to atomically thin thickness, excellent optoelectronic properties, and free dangling bonds. Especially the metallic TMDs, such as MoTe 2 (1T’ phase), NbS 2, or NbSe 2, have shown fascinating physical properties through various applications, such as superconductor and charge density wave. However, carrier transport of metallic TMDs would be degraded due to the poor stability in ambient conditions. To date, achieving both high device performance and long-term stability is still a huge challenge. Thus, an alternative way to develop both unavoidable native oxide and metallic TMDs is under consideration for new era research. In this respect, 2D metallic TMD materials have attracted high attention due to their great potential in neuromorphic-based devices with metal-insulator-metal structures, making it possible to produce scalable, ﬂexible, and transparent memory devices. Herein, we experimentally demonstrated a synthesized metallic NbSe 2 by a chemical vapor deposition method with a highly uniform, good shape distribution and layer controller ranging from 2–10 layers. Together, for the ﬁrst time, we proposed the NbO x / NbSe 2 heterostructure memristor device based on the native NbO x oxide on the interface of multi-layer NbSe 2 ﬂakes. The ultra-thin native NbO x oxide of 3 nm was formed after a period of oxidation time under air condition, which acts as a memristive surface in the Au-NbO x -Au lateral memristor device, in which oxygen vacancies form a conductive ﬁlament. Our NbO x / NbSe 2 hetero-tructured memristor exhibits a stable memory window, a low-resistance-state / high-resistance-state ratio of 20, and stable endurance properties over 20 cycles at a low working voltage of 1 V. Furthermore, by the retention property test, non-volatile characteristics were conﬁrmed after over 3000 s in our best data. Through a systematic study of the NbO x / NbSe 2 heterostructured memristor device, this report will open new opportunities for next-generation memory devices application. 2 FET device at varying V gs of − 50 V to 50 V. As the results indicate, an ohmic contact behavior with a linear relation between I and V were observed with no current di ﬀ erence x -Au lateral memristor device, in which oxygen vacancies form a conductive ﬁlament. Our memristor shows an LRS / HRS ratio of 20 and stable cyclic endurance properties at a low working voltage of 1 V. Furthermore, by retention test, non-volatile characteristics were conﬁrmed at 3000 s. This systematic study of the NbO x / NbSe 2 heterostructured memristor device is expected to open the possibilities of a viable next-generation memory device. Funding acquisition, K.K., Y.H.L. and W.J.Y.; Project administration, W.J.Y.; Resources, K.K., Y.H.L. and W.J.Y.; Supervision, T.L.P. and W.J.Y.; Validation, J.E.K., T.L.P. and W.J.Y.; Visualization, J.E.K. and T.L.P.; Writing—original draft, J.E.K., V.T.V. and T.T.H.V.; Writing—review and editing, J.E.K., T.L.P., Y.R.K.


Introduction
As the amount of data to be processed by the development of an information technology (IT) industry increases, demands on memory chips with high performance and miniaturization have increased rapidly. Accordingly, studies on next-generation memories based on new structures and materials have been actively conducted [1][2][3][4]. In terms of scaling down the limitation of silicon-based memories, the two-dimensional (2D) van der Waals (vdW) layered transition metal dichalcogenide (TMD) materials have received great attention due to their excellent properties, such as atomically thin thickness [5], high mobility [6], various bandgaps [7], transparency [8], flexibility [9] and free dangling bonds [10]. This enables the potential development of various nano-scaled high-performance devices not only in memories, but also in field-effect transistors [11], photodetectors [12], biosensors [13], diodes [14], and so on. However, most of the studies until now have been mainly based on mechanical exfoliation methods with limitations of flake size and low yield, which restrict their application to commercialized-devices. Thus, synthesis on mass-produced 2D materials for large scale and low cost through the chemical vapor deposition (CVD) method has been proposed [15][16][17].
Among them, there has been a demand for utilizing metallic 2D materials for fabricating metal-insulator-metal (MIM) structures for next-generation memory, resistive switching random-access memory (ReRAM) [18,19], which has been spotlighted with attractive advantages, such as fast switching speed, low operation voltage, and good scalability, making it one of the most promising candidates for next nonvolatile memory devices [1][2][3][4]. Despite such favorable demands, the sensitive metallic 2D materials were easily degraded due to poor stability in ambient conditions [18]. To address such poor stability of metallic TMDs, passivation or interfacial engineering have been introduced [20][21][22]. Nonetheless, to achieve both high device performance and long-term stability is still hugely challenging. Thus, another alternative way to develop both unavoidable native oxide and metallic TMDs is under consideration for new era research. In this respect, the sensitive metallic TMD vdW material can be utilized as resistive memory by forming an ultra-thin native oxide on the surface of host materials under ambient conditions, which can act as a memristive surface memristor with an oxygen vacancy, forming a conductive filament [23,24].
In this study, we have experimentally demonstrated the synthesis of NbSe 2 flake by the CVD approach with highly uniform, good shape distribution and layer controller ranging from 2 layers to 10 layers. Furthermore, for the first time, we proposed the NbO x /NbSe 2 heterostructure memristor device based on the native NbO x oxide on the interface of multi-layer NbSe 2 flake. The ultra-thin native NbO x oxide of 3 nm was formed after a period of oxidation time under air condition, which acts as a memristive surface in the Au-NbO x -Au lateral memristor device, in which oxygen vacancies forming a conductive filament. Our NbO x /NbSe 2 heterostructured memristor exhibits a stable memory window with reversible switching processes at a low working voltage of 1 V. Furthermore, the memristor shows a low-resistance-state (LRS)/high-resistance-state (HRS) ratio of about 20 and non-volatile properties via a retention test of 3000 s. Moreover, good endurance without any degradation up to 20 endurance cycles was demonstrated. Our strategy to fabricate feasible memristor for next-generation memory devices suggests new opportunities based on the CVD-grown 2D metallic materials. Figure 1a shows a schematic of a CVD growth of NbSe 2 flakes. Firstly, the ammonium niobium oxalate (ANO)-C 4 H 4 NNbO 9 ·xH 2 O (Sigma-Aldrich) was used as the niobium (Nb) precursor. The stock solution of Nb was prepared by dissolving a calculated amount of ANO powders in a deionized (DI) water. (0.3 g/10 mL) The sodium hydroxide (NaOH) was used as a promoter and medium solution of iodixanol (Opti Prep density gradient medium, Sigma Aldrich) which enhances the adhesion between the solution and the growth substrate during the liquid source coating process. These compositions were mixed in a precise ratio and then uniformly shaken with a speed of 300 rpm to obtain a homogeneous solution phase. The mixed solution was then deposited on a 300-nm thick SiO 2 /Si substrate by a spin-coating with a speed of 3500 rpm for 1 min. Next, the coated substrate was annealed at 500 • C for 30 min in the air to convert ANO into Nb 2 O 5 as well as burn carbon from Opti [25]. For a typical CVD growth process, the coated substrate was placed on a ceramic plate and loaded in the center of the quartz tube of a CVD chamber. Here, the solid selenium (Se) was located at an entrance region with a distance of 17 cm from the center of the quartz tube of the chamber. Note that the distance of the Se source was controlled at various positions from 17 to 18.5 cm for controlling the heating temperature of the source, which will be discussed in detail later (Figure 1b). The temperature was controlled at 380 • C at the Se source location while the growth reaction was performed at 800 • C for 20 min under the flowing of 300 sccm N 2 and 20 sccm H 2 gas, which was used as a carrier gas during the whole growth process ( Figure S1). Finally, the chamber was rapidly cooled down by opening the furnace after completing the whole synthesis process. (a,b) The schematic image and photo image of synthesis settings for NbSe 2 Growth. The ammonium niobium oxalate-C 4 H 4 NNbO 9 ·xH 2 O (ANO) source-coated substrate was loaded in the center of the CVD chamber and the solid Se was located at the upstream region where the distance is 17 cm from the center of the quartz; (c) optical microscope image of as-grown NbSe 2 ; (d) Raman mapping image according to A 1g mode; (e) the out-of-plane A 1g mode at 225 cm −1 and the in-plane E 2g mode at 250 cm −1 were observed.

Fabrication of NbO x /NbSe 2 Heterostructured Memristor Device
The as-grown NbSe 2 flake sample was transferred to a target substrate by a typical wet-transfer approach [26]. Firstly, the as-grown NbSe 2 sample was coated with a poly-methyl-methacrylate (PMMA) C4, which formed a support layer. Then, the substrate was etched with a diluted hydrogen fluoride (HF) acid solution to separate the grown sample/PMMA film from the growth substrate. With several rinsing with deionized (DI) water, it was transferred onto a target SiO 2 /Si substrate. Finally, after drying the transferred sample, the PMMA support layer was removed by acetone and rinsed again via isopropyl alcohol (IPA) solution. (Figure 1c) The native oxide layer (NbO x ) was formed by exposing the grown NbSe 2 sample to the air at room temperature for several days (in our case, 21 days), resulting in NbO x /NbSe 2 heterostructure, where the NbO x layer can act as a memristive surface. To fabricate the memristor device, the metal electrodes (source and drain) for a probe contact were patterned on NbO x /NbSe 2 heterostructures using e-beam lithography followed by e-beam deposition of Cr/Au (5/50 nm). Electrical and memristive feature measurements for NbSe 2 and NbO x /NbSe 2 heterostructures were performed using a probe station and a semiconductor analyzer (Keysight B1500A) at room temperature.

NbSe 2 Material Characterization
The NbSe 2 flake was characterized by Raman spectroscopy at room temperature under a 0.4-mW laser power and 532-nm wavelength excitation laser (XperRam200, Nano base) (Figure 1d). The spatially resolved Raman mapping images are shown according to A 1g and E 2g modes, as shown in Figure 1d and Figure S2, respectively. As a result, the intensity of both peaks (A 1g and E 2g ) was distributed uniformly. It suggests that we successfully grew high uniformity of the NbSe 2 flake using the CVD method. In the middle part of the NbSe 2 flake, there was a damage point, which was attributed to the laser focus during the measurement process. In Figure 1e, it is clearly shown that the Raman peak of our NbSe 2 flake is located at about 225 cm −1 and about 250 cm −1 of NbSe 2 , which are assigned to the out-of-plane mode A 1g peak and the in-plane mode E 2g peak in NbSe 2 flake [27].
To further optimize our CVD-grown NbSe 2 flake, we conducted experiments to meticulously explore possibly contributing to the NbSe 2 thickness as a function of Se source distance (d Se ) from the center of the quartz. Figure 2 shows the NbSe 2 flake grown with different distances between the Se solid source and center of the quartz, ranging from 17 to 18.5 cm while fixing all other parameters. It is noted that the one-zone CVD chamber was used for synthesis. The temperature set for the growth (800 • C for this experiment) can be kept well at the center of the quartz tube but gradually declines as it goes toward the edge of the quartz tube. Thus, controlling the loading position of Se (d Se ) in the quartz tube can be interpreted as controlling the heating temperature of the Se source. Base on that, the NbSe 2 flake thickness concerning the d Se for 17-18.5 cm was separately measured in Figure 2a [27]. The selenization amount during growth can heavily determine the thickness of the NbSe 2 , because the NbSe 2 form a stacking layer over the grown flakes rather than expanding towards the SiO 2 surface, which can form a larger flake. Note that the SiO 2 surface is not flat and has many dangling bonds, which result in high energy barrier energy and low diffusion NbSe 0,1,2 radicals [28]. Thus, NbSe 2 growth at the SiO 2 surface is remarkably limited and, therefore, the staking of NbSe 2 is perpendicularly formed. Figure 2i summarizes the thickness of NbSe 2 flake corresponding to the d Se (for 17-18.5 cm). The error bar indicates ±10 • C and ±2 nm for the x and y-axis, respectively. From the data, with increasing the d Se , the thickness of NbSe 2 flake decreased due to the selenization process as described above. According to the height profiles in atomic force microscopy (AFM, SPA 400, Seiko Instruments) images along with the d Se ranging from 17-18.5 cm, the different thicknesses of 2.4 to 12 nm, corresponding to the 2 layers, 4 layers, 6 layers, and 10 layers, are defined.
Together, Raman spectroscopy also identifies the thickness of the CVD-grown NbSe 2 (Figure 2j). For the measurements, a laser power of 0.4 mW and an excitation wavelength of 532 nm were used. At room temperature, the intensity of the peaks (A 1g and E 2g ) of thin-layer NbSe 2 , such as 2 or 4 layers, were shown weekly. However, as the thickness increased, such as to 6 or 10 layers, the intensity of the two peaks increased noticeably, which is in good agreement with the previous reports [27]. For more optimal conditions for NbSe 2 growth, the roles of H 2 and the ratio of the carrier gas were examined ( Figure S3). Without H 2 flow, there are only NbSe 2 particles grown, while the NbSe 2 flake size tends to be small under high H 2 concentration (N 2 /H 2 = 300/40~60). This is because it has been reported that H 2 plays a reducer agent in the growth reaction [29]. Thus, in the absence of H 2, there are insufficient NbSe 0,1,2 radicals for growth, while H 2 also promotes the chemical etching effect rather than the formation of NbSe 2 under a high flow of H 2 [30]. From these perspectives and our results, 300/20 sccm for carrier gas ratio was found to be the optimal condition.

NbSe 2 Electrical Characterization
We now describe the electrical characteristic of our NbSe 2 flakes field-effect transistor (FET) device at room temperature under a high vacuum (1 × 10 −6 Torr), Figure 3a. Figure 3b shows the transfer characteristics of the NbSe 2 FET device at V gs, sweeping from −50 to 50 V at various V ds ranging from −0.5 to 0.5 V. As a result, our NbSe 2 flakes show an intrinsically metallic behavior with no gate dependence from −50 V to 50 V and a high on-current of 0.1 mA. Figure 3c shows the output characteristics of the NbSe 2 FET device at varying V gs of −50 V to 50 V. As the results indicate, an ohmic contact behavior with a linear relation between I and V were observed with no current difference according to different gate voltage biasing, in agreement with transfer curve results. These properties were also confirmed in our other NbSe 2 devices ( Figure S4).

Properties of the NbO x /NbSe 2 Heterostructured Memristor Device
Considering the highly electrical conductivity of our NbSe 2 flakes, we built the NbO x /NbSe 2 heterostructure for a memristor device as shown in Figure 4a. Before discussing, it is noted that the thin NbSe 2 flakes (below six layers) are very sensitive in ambient, which is easily damaged in a short period, suggesting unsuitability for our heterostructure memristor device ( Figure S5). To perform this concept device, we are using the thick NbSe 2 flakes of 10 layers (Figure 4b). By exposing the thick NbSe 2 flakes under an ambient condition for 21 days, the native NbO x layer was formed on the NbSe 2 interface. Our NbO x /NbSe 2 heterostructure is operating in a lateral direction (Au-NbO x -Au) by resistance switching through the lateral NbO x layer on top of NbSe 2 . Furthermore, in the NbO x /NbSe 2 lateral memristor, total resistance (R tot ) can be considered as NbSe 2 resistance (R NbSe2 ) + NbO x resistance (R NbOx ) ( Figure S6) [31]. In the case of a low resistance state (LRS), R tot is more influenced by R NbSe2 compared to R NbOx because of the formation of conductive filament interior of the oxide layer. Thus, during the LRS state, low R tot can be realized by using a thicker metallic NbSe 2 layer, resulting in high-performance LRS. Figure 4b shows the optical microscope images and AFM mapping images of intrinsic multi-layer NbSe 2 flake (top-panel) and the NbO x /NbSe 2 flake (bottom panel) are depicted. The intrinsic multi-layer NbSe 2 was observed to have a 12-nm thickness (black solid line in Figure 4c). After a period of 21 days in the air condition, the native NbO x oxide was formed. The height of the flake was increased up to 15 nm (blue solid line in Figure 4c) which can be interpreted as forming a 3-nm NbO x native oxide layer on top of the intrinsic NbSe 2 flake. Figure 4d shows the current-voltage (I-V) characteristic of our NbO x /NbSe 2 heterostructure memristor device. The inserted image is an optical microscope image of our device. Voltage was swept as 0 V → +1 V → −1 V → 0 V between the drain and the source electrode with the duration time of 0.1s, which showed reproducible and nonvolatile hysteretic resistive switching behavior in synaptic memory. During the positive voltage sweep, the current increased via migration of positively charged oxygen vacancies (conductive filament (CF) formation), with which the device showed the HRS to LRS transition. The resistance state kept LRS with the reverse voltage sweep. Then, again, the reset transition process started at −1V, and the LRS to HRS transition was exhibited during the negative voltage sweep. Here, the noise had occurred during the I-V switching measurement, which is probably due to the non-uniform and ultra-thin native oxide layer (~3 nm NbO x ). It is suggested that the conductive filament pathway can be randomly formed and induce the current noise in the set/reset process during the extraction/recovery process of oxygen vacancies. The retention time and cyclic endurance were also examined to elucidate memory functionalities. In Figure 4e, a single writing pulse of V W = +1 V and −1 V was applied to switch memory into LRS and HRS, respectively, with a typical switching time of 0.1 s. The reading current was read out with a small reading bias of V R = 0.1 V and was defined as the current of HRS (black dotted line) and LRS (red dotted line). Moreover, no degradation was shown up to over 20 endurance cycles, maintaining a stable on/off ratio of 20. The retention property of the NbO x /NbSe 2 heterostructure memristor was also conducted under a 10-mV reading voltage, resulting in over 250 s as shown in Figure 4f. The short retention time is because of our measurement set up as following, by (i) I-V switching, (ii) retention time test, and (iii) endurance test. To get all good electrical characteristics at once, the retention time was measured until~250 s. To further prove the retention ability of our device, we measured other devices by focusing on the retention test on the same substrate. As a result, our best data were obtained at~3000 s in retention time under a 10-mV reading voltage ( Figure S7), where both LRS and HRS were stably remained, confirming the non-volatile properties of our NbO x /NbSe 2 heterostructure memristor device.
For understanding the resistance switching behavior in the memristor, the formation process of conductive filaments (CFs) should be preceded. The mechanism of conductive filaments in our NbSe 2 /NbO x heterostructure memristor is depicted in Figure 4g. In particular, if the voltage is biased to the drain electrode, the electric field is applied to the NbO x layer and the movement of oxygen ions inside the oxide layer is generated. This movement causes positively charged oxygen vacancies in the oxide layer which acts as the CF. Accordingly, the source and drain electrodes are connected, and a switch-on state is maintained by exhibiting a low-resistance-state (LRS) at the oxide layer (high-resistance-state (HRS) to LRS transition, Set). In contrast, under reverse bias, the conductive filaments disappear via filling the oxygen vacancies by moving oxygen ions, which results in HRS on the oxide layer (LRS to HRS transition, Reset). To confirm the conduction mechanisms in our NbO x /NbSe 2 memory device, the I-V curve of Figure 4d was replotted with a double-logarithmic scale as shown in Figure S8. According to the graphs, our device followed the Space Charge Limited Conduction (SCLS) mechanism with the most accepted factor as oxygen vacancies in our device [32,33]. The details are discussed in the Supplementary Note 1.
Besides, an exposing time in the air is an important factor for realizing our heterostructure memristor device. We compared the I-V characteristic to the influence of the oxidation period, expected to provide the large on/off current ratio of LRS/HRS (Figure 4h and Figure S9). As result, with increasing the oxidation time, the HRS keeps decreasing while the LRS remains stable. More details about the relationship between the oxidation time and the device performance are explained in Supplementary Note 2. Our NbSe 2 /NbO x heterostructure memristor device was mostly stable at 21 days of oxidation time in ambient conditions. To prove that, we measured our device under ambient and vacuum conditions, as shown in Figure S10. From the data, the device shows well repeatable memory behavior in both conditions, indicating that the elimination of oxygen in the air was un-affected by our device performance. Thus, we can conclude that the non-volatile memory behavior of our NbSe 2 /NbO x heterostructure originates from the NbO x oxide layer on the NbSe 2 interface, which is similar to the NbS 2 material in the previously reported study [31].

Conclusions
In conclusion, we have demonstrated the synthesis of NbSe 2 flakes by the CVD approach via specifically controlled Se source distance from the center of the quartz (d Se ) and the carrier gas ratio (H 2 :N 2 ). Concerning these efforts, we had successfully grown the NbSe 2 flakes with highly uniform, good shape distribution, controlling layers from 2 to 10 layers. Together, we proposed the NbO x /NbSe 2 heterostructure memristor device based on the native NbO x oxide on the interface of NbSe 2 flakes. Here, the NbO x oxide layer acts as a memristive surface in the Au-NbO x -Au lateral memristor device, in which oxygen vacancies form a conductive filament. Our memristor shows an LRS/HRS ratio of 20 and stable cyclic endurance properties at a low working voltage of 1 V. Furthermore, by retention test, non-volatile characteristics were confirmed at 3000 s. This systematic study of the NbO x /NbSe 2 heterostructured memristor device is expected to open the possibilities of a viable next-generation memory device.

Supplementary Materials:
The following are available online at http://www.mdpi.com/2076-3417/10/21/7598/s1, Figure S1: The CVD growth condition for NbSe2 flakes; Figure S2: Raman mapping image according to E2g mode at 250 cm −1 of the CVD-grown NbSe2; Figure S3: CVD NbSe2 growth tendency according to the optimization of carrier gas ratio (N2:H2); Figure S4: Electrical characteristics of various other CVD-grown NbSe2 flakes; Figure S5: The oxidization effect of the thin CVD-grown NbSe2 flake; Figure S6: Formation of channels in a memristor device structured with NbOx/NbSe2 heterostructure; Figure S7: Retention properties of the NbOx/NbSe2 memristor under 0.01-V read voltage; Figure S8: I-V curves of NbOx/NbSe2 memory devices, displayed on a double-logarithmic scale; Figure S9: I-V characteristic of NbOx/NbSe2 heterostructure memristor along with the influence of oxidation time (0-24 days); Figure S10: Electrical comparison of memristor under vacuum and ambient condition. Supplementary Note 1: Explanation of the conduction mechanism of our NbOx/NbSe2 memory device based on the SCLC mechanism; Supplementary Note 2: Explanation of the relationship between the exposure time and device performance.