A Secondary Reconfigurable Inverter and Its Control Strategy

This article proposes a topology of the secondary reconfigurable inverter and the corresponding fault-tolerant control strategy. When the secondary reconfigurable inverter is operating normally, its topology structure is the TPSS circuit. When the power semiconductor devices in the inverter are faulty, the inverter circuit needs to be reconfigured. After removing the faulty power semiconductor devices, the remaining power semiconductor devices and the DC side powers are reconstructed as the TPFS structure to keep the system running normally. This article also proposes a switch-pulse-resetting algorithm. This paper adopts the control strategy connecting the constant-voltage, constant-frequency control method with the switch pulse resetting algorithm. It need not change the control algorithm when the proposed reconfigurable inverter is transformed from the normal running state into the faulty running state. The inverter dependability is greatly improved. Finally, the feasibility and effectiveness of the proposed second reconfigurable inverter topology and control strategy are verified by simulation and experiment.


Introduction
With the development of power electronics technology, voltage source inverters have been widely used [1][2][3][4]. The power semiconductor devices of the inverter and its control circuit constitute the weakest link, which is vulnerable to being faulty. Its reliability problems have not been solved effectively [5][6][7]. The usual faults in the inverter are short circuits and open circuits of power semiconductor devices. The wrong triggering signals, the auxiliary power failure, the device over-voltage breakdown, the avalanche breakdown, and the thermal breakdown can lead to a short circuit fault on the power semiconductor device. Since the existence of a short circuit fault time is too short, it is hard to diagnose. Hence, the diagnosis and protection of short circuit faults are mostly based on the design of the hardware circuit. This has been summarized in the literature [8]. The fast fuse can also be put into the inverter circuit to turn the short circuit fault into the open circuit, which uses the open circuit diagnosis method to handle the faults. It is therefore convenient to implement the topology reconfiguration and the fault-tolerant control strategy [9,10]. The main reasons causing the open circuit of the power switches are the device rupture, the bonding line breaking or welding, the loss of driving signals or the circuit failure, etc. A power semiconductor device fault will make the inverter operate in an abnormal state and affect the system performance, and the voltage and current stresses of the other devices will be increased. The system will crash, so it must be diagnosed in time.
To improve the dependability of inverters, fault-tolerant strategies have been investigated by a large number of studies. These can be divided into redundant and nonredundant fault-tolerant strategies. Redundant fault-tolerant strategies include switch-redundant topologies [9], neutral leg topologies [10], additional phase leg topologies [11], cascaded inverter topology [12], etc. In the modular multilevel inverter, many standardized redundant modules are integrated into the branch to allow the system redundancy [13]. However, these solving methods are often complex. The nonredundant fault-tolerant inverter structure reconstructs the faulty inverter. Three-phase four-switch (TPFS) inverters have been intensively researched as the fault-tolerant topology structure when a three-phase six-switch (TPSS) inverter is faulty, where one phase terminal is connected to the midpoint of the DC side capacitors. The TPFS inverter can improve the system reliability and has the potential for quick recovery of partial system performance [14,15]. The development of the four-switch inverter technology in the field of motor drive is relatively mature [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30], including DC Motors, IM Drives etc. However, it was not fault-tolerant. The literature [28,29] has adopted the traditional fault-tolerant TPFS inverter in the microgrid. However, the control strategy was complicated. There are many fault-tolerant control strategies when an open circuit fault occurs. Fault-tolerant control strategies have been proposed for diodes of NPC (neutral point clamped) inverters [31], flying-span capacitor inverters [32], cascade multilevel inverters [33,34], T-type three-level inverters [35,36], etc.. Additional TRIACS (TRIode alternating current semiconductor) are added for fault-tolerant operations [31][32][33][34][35][36][37][38].
However, if the traditional fault-tolerant inverter undergoes a power semiconductor device fault on any bridge, the bridge arm needs to be removed, and the control algorithm in the normal running state needs to be converted into the control algorithm in the faulty state, which is complicated. In response to these problems, a topology of a secondary reconfigurable inverter and the corresponding control strategy are proposed in this article. The reconfigurable fault-tolerant space is much larger than that of the traditional fault-tolerant inverter. This article also proposes a switch-pulse-resetting algorithm. The inverter can be kept stable running with the proposed control strategy, which needs not change the control algorithm converting the normal running state into the faulty running state.
This article is organized as follows. Section 2 proposes the topology structure of the secondary reconfigurable inverter. The equivalent circuits in the first faulty state and second faulty state are given separately, and the operating principle of the reconfigurable inverter is analyzed. The normal operating principle and faulty operating principle of the secondary reconfigurable inverter are analyzed, and then the relationship between the normal state and the fault state of the corresponding DC side voltage is obtained. In addition, the switch pulse resetting algorithm is proposed. In Section 3, the feasibility and effectiveness of the proposed second reconfigurable inverter topology and control strategy are verified by simulation and experiment. Section 4 presents the conclusions.

The Topology Structure of the Secondary Reconfigurable Inverter
The topology structure of the proposed secondary reconfigurable inverter is shown in Figure 1. The inverter DC side voltage is provided by battery storage, which can ideally be considered as two DC sources with equal voltage value. V 1 -V 6 are the power semiconductor devices IGBT, which constitute the three-phase inverter circuit. TR 13 , TR 35 , TR b and TR w are the TRIACS, which consist of the secondary reconfigurable circuit. A series of LC filters are used to inhibit higher harmonics and excessive short-circuit current. When the secondary reconfigurable inverter is operating normally, it is a TPSS inverter circuit.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 3 of 13 constitute the three-phase inverter circuit. TR13, TR35, TRb and TRw are the TRIACS, which consist of the secondary reconfigurable circuit. A series of LC filters are used to inhibit higher harmonics and excessive short-circuit current. When the secondary reconfigurable inverter is operating normally, it is a TPSS inverter circuit. The usual faults for the inverter are the short circuit and the open circuit of the power semiconductor devices. When the power semiconductor devices in the inverter encounter a short-circuit fault, the corresponding fast fuses will be fused, and the short-circuit fault is transformed into the open-circuit fault. The secondary reconfigurable inverter circuit is formed by cutting off the fault switches and connecting with the corresponding Triacs. When one or two of the power switch is faulty, the relationship among the corresponding Triacs and power switches are shown in Table 1. In Table 1, consider cases 1 and 2 as examples. When the power switch V1 in the TPSS inverter circuit is faulty, turn on the Triacs TRwandTR13. Sending the pulse of V1 to be the pulse of V3 means that Tv3 = Tv1. The DC side voltage source can be considered as the b-phase bridge of the inverter, which constitutes the TPFS inverter circuit. V4 stops working. The reconstructed phases are Sa(V3, V2) and Sb(C1, C2). The reconstructing process is shown in Figure 2a, which is the first fault tolerance. Now the inverter is running in a fault-tolerant state. If V2 is also faulty, V3 and V4 construct phase The usual faults for the inverter are the short circuit and the open circuit of the power semiconductor devices. When the power semiconductor devices in the inverter encounter a short-circuit fault, the corresponding fast fuses will be fused, and the short-circuit fault is transformed into the open-circuit fault. The secondary reconfigurable inverter circuit is formed by cutting off the fault switches and connecting with the corresponding Triacs. When one or two of the power switch is faulty, the relationship among the corresponding Triacs and power switches are shown in Table 1.
In Table 1, consider cases 1 and 2 as examples. When the power switch V 1 in the TPSS inverter circuit is faulty, turn on the Triacs TR w andTR 13 . Sending the pulse of V 1 to be the pulse of V 3 means that T v3 = T v1 . The DC side voltage source can be considered as the b-phase bridge of the inverter, which constitutes the TPFS inverter circuit. V 4 stops working. The reconstructed phases are S a (V 3 , V 2 ) and S b (C 1 , C 2 ). The reconstructing process is shown in Figure 2a, which is the first fault tolerance. Now the inverter is running in a fault-tolerant state. If V 2 is also faulty, V 3 and V 4 construct phase S a (V 3 , V 4 ), sending the pulse of V 2 to be the pulse of V 4 , T v4 = T v2 , which is the secondary reconfiguration as shown in Figure 2b. Other cases have a similar switch process.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 4 of 13 Sa(V3, V4), sending the pulse of V2 to be the pulse of V4, Tv4 = Tv2, which is the secondary reconfiguration as shown in Figure 2b. Other cases have a similar switch process. The traditional reconfigurable fault-tolerant inverter is shown in Figure 3. From Figure 3, it can be seen that if one or two of the power switches in the traditional fault-tolerant inverter are faulty, the whole bridge needs to be removed. The relationship between the corresponding Triacs and power switches are shown in Table 2.

Case
Fault V1 and V4 Toc S a (C1, C2) 8 V2 and V5 Tob S b (C1, C2) 9 V3 and V6 Toa S c (C1, C2) According to Table 2, the fault-tolerant space is small with just nine cases. The topology of the secondary reconfigurable inverter proposed in this paper greatly improves the fault-tolerant space. According to Table 1, the proposed secondary reconfigurable inverter has 21 fault-tolerant cases. Therefore, compared with the traditional inverter, the proposed secondary reconfigurable inverter has a broader fault-tolerant space. The fault-tolerant space of the proposed secondary reconfigurable The traditional reconfigurable fault-tolerant inverter is shown in Figure 3. The traditional reconfigurable fault-tolerant inverter is shown in Figure 3. From Figure 3, it can be seen that if one or two of the power switches in the traditional fault-tolerant inverter are faulty, the whole bridge needs to be removed. The relationship between the corresponding Triacs and power switches are shown in Table 2.

Case
Fault V1 and V4 Toc S a (C1, C2) 8 V2 and V5 Tob S b (C1, C2) 9 V3 and V6 Toa S c (C1, C2) According to Table 2, the fault-tolerant space is small with just nine cases. The topology of the secondary reconfigurable inverter proposed in this paper greatly improves the fault-tolerant space. According to Table 1, the proposed secondary reconfigurable inverter has 21 fault-tolerant cases. Therefore, compared with the traditional inverter, the proposed secondary reconfigurable inverter has a broader fault-tolerant space. The fault-tolerant space of the proposed secondary reconfigurable From Figure 3, it can be seen that if one or two of the power switches in the traditional fault-tolerant inverter are faulty, the whole bridge needs to be removed. The relationship between the corresponding Triacs and power switches are shown in Table 2.
According to Table 2, the fault-tolerant space is small with just nine cases. The topology of the secondary reconfigurable inverter proposed in this paper greatly improves the fault-tolerant space. According to Table 1, the proposed secondary reconfigurable inverter has 21 fault-tolerant cases.
Therefore, compared with the traditional inverter, the proposed secondary reconfigurable inverter has a broader fault-tolerant space. The fault-tolerant space of the proposed secondary reconfigurable inverter is improved greatly. Moreover, the control algorithm in a normal operation state needs to be converted into the control algorithm in the faulty state, which is complicated.

Analysis of the Switching Mode
When the secondary reconfigurable inverter is running in the faulty state, the faulty power switch is removed. The remaining power switches of the two bridges can be reconfigured to keep operating. Each switching mode of the TPFS inverter has the corresponding switching mode as the TPSS inverter in a normal state. Varieties of switching modes and current paths of the TPSS inverter circuit and the reconfigured TPFS inverter circuit are shown in Figure 4.
When the secondary reconfigurable inverter is running in the faulty state, the faulty power switch is removed. The remaining power switches of the two bridges can be reconfigured to keep operating. Each switching mode of the TPFS inverter has the corresponding switching mode as the TPSS inverter in a normal state. Varieties of switching modes and current paths of the TPSS inverter circuit and the reconfigured TPFS inverter circuit are shown in Figure 4.     In switching mode (a 1 ), there are two current paths, i 41 and i 42 , which both flow from the upper-half source of the DC-side source, which is equivalent to the condition that the b-phase lower-half bridge is connected and the upper bridge arm is cut off in the TPSS inverter circuit. At the moment, two current paths, i 61 and i 62 , also exist in the TPSS inverter circuit.
According to the switching mode (a 1 ) in Figure 4, the two current paths i 41 and i 42 satisfy the following equations, respectively.
Therefore the three-phase output voltages of the reconfigurable inverter circuit are In switching mode (a 2 ), the two current paths i 61 and i 62 of the normal inverter circuit satisfy the following equations, respectively.
Then, the three-phase output voltages of the normal inverter circuit are defined by the following equations respectively.
Let the three-phase output voltages of the reconfigurable inverter circuit be equal to the three-phase output voltages of the normal inverter circuit, respectively. Hence, That is to say, Connecting Equation (12) with the Equations (1), (2), (6) and (7), it can be derived that the output current of the inverter satisfies the following equations Similar results can be obtained in other switching modes, which are not repeated here. By setting the DC side voltage value of the reconfigurable inverter to be twice the DC-side voltage in the normal state, we can control the inverter according to the switching state shown in Table 1, no matter if the inverter is running in a faulty state or in a normal state. The normal output voltage and output current can be obtained in both states.

The Control Strategy for the Reconfigurable Inverter
When the power semiconductor devices of the secondary reconfigurable inverter are faulty, the TPSS inverter circuit is reconfigured as the TPFS inverter circuit. The relationship between the pulse signals produced by the SPWM (Sinusoidal Pulse Width Modulation) and the on-off states of each power semiconductor device is shown in Table 1. T v1 -T v6 are the 6-channel modulation signals.
The switch-pulse-resetting algorithm is also proposed in this article. This article adopts the control strategy connecting the voltage-frequency control strategy with the switch-pulse-resetting algorithm. The flow figure of the control strategy is seen in Figure 5.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 7 of 13 In Figure 5, the signals produced by VI control are put into SPWM, and then the initial 6-channel pulse signals Tv1-Tv6 are obtained by the SPWM. According to the on-off states of the 6 power semiconductor devices V1-V6, whether each pulse signal needs to alter or not is determined by the on-off states of 6 power semiconductor devices V1-V6. Finally, the device outputs the resetting pulse signals Tv1-Tv6 according to the red box in the Figure 5. There is no need for other cases to alter the initial pulse signals: Figure 5 shows that it need not alter the control algorithm when the system running from the normal state into the faulty state.

Simulation Results and Discussion
The circuit model of the secondary reconfigurable inverter shown in Figure 1 was built in MATLAB/Simulink platform to verify the feasibility and effectiveness of the proposed reconfigurable inverter in this article. This paper adopts the controlling strategy connecting the constant-voltage, constant-frequency control method and the switch pulse resetting algorithm.
The main parameters of the reconfigurable inverter applied in islanded micro-grid are shown the following Table 3. In Figure 5, the signals produced by VI control are put into SPWM, and then the initial 6-channel pulse signals T v1 -T v6 are obtained by the SPWM. According to the on-off states of the 6 power semiconductor devices V 1 -V 6 , whether each pulse signal needs to alter or not is determined by the on-off states of 6 power semiconductor devices V 1 -V 6 . Finally, the device outputs the resetting pulse signals T v1 -T v6 according to the red box in the Figure 5. There is no need for other cases to alter the initial pulse signals: Figure 5 shows that it need not alter the control algorithm when the system running from the normal state into the faulty state.

Simulation Results and Discussion
The circuit model of the secondary reconfigurable inverter shown in Figure 1 was built in MATLAB/Simulink platform to verify the feasibility and effectiveness of the proposed reconfigurable inverter in this article. This paper adopts the controlling strategy connecting the constant-voltage, constant-frequency control method and the switch pulse resetting algorithm.
The main parameters of the reconfigurable inverter applied in islanded micro-grid are shown the following Table 3. The simulation waveforms of the reconfigurable inverter applied to the islanded microgrid in the normal operating state and various faulty states are shown as follows. Set the system operating in normal state during 0-0.1 s and operating in the faulty state during 0.1-0.2 s.
The simulation results of the inverter without reconfigurable structure are shown in Figure 6, which include the waveforms of the output voltages, the output currents and the deviations between output voltages with reference voltages. Figure 7 shows the simulation results of the inverter with a reconfigurable structure.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 8 of 13 The simulation waveforms of the reconfigurable inverter applied to the islanded microgrid in the normal operating state and various faulty states are shown as follows. Set the system operating in normal state during 0-0.1 s and operating in the faulty state during 0.1-0.2 s.
The simulation results of the inverter without reconfigurable structure are shown in Figure 6, which include the waveforms of the output voltages, the output currents and the deviations between output voltages with reference voltages. Figure 7 shows the simulation results of the inverter with a reconfigurable structure.  When the DC side voltage is set as 400 V and without reconfigurable structure in the inverter, Figure 6a1,b1,c1 show output voltages, currents and deviations between the output voltage with the reference voltage corresponding to faulty phase a, respectively. Figure 6a2,b2,c2 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase b, respectively. Figure 6a3,b3,c3 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase c, respectively. It can be seen from the waveforms that the inverter voltages and the currents of the inverter are the expected standard sinusoidal waves when the inverter is running in the normal state at 0-0.1 s. Moreover, the deviation among the inverter output voltage with reference voltage is very small at about 3 V. After 0.1 s, the inverter is running in the faulty state. The inverter output voltage and output current are seriously distorted, and a three-phase imbalance appears. The deviation among inverter output voltage with reference voltage is too large.
Take case 1 in Table 1 as an example to verify the feasibility and validity of the proposed topology and the control algorithm in this simulation. The power switch V1 is faulty, and the inverter is reconstructed from TPSS to TPFS to be fault-tolerant. The DC voltage is set as 800 V in the reconfigurable inverter. Figure 7a-c are output voltages, currents and deviations between the output voltage with the reference voltage, respectively. All waveforms can be kept the same before and after the inverter is reconfigured because a power switch is broken at 0.1 s. If another power switch is faulty, the same output voltages and currents are obtained as the results in the first reconfiguration. Figure 7 represents the similar simulating waveforms of other cases in Table 1. That is to say, whether the inverter is reconfigured or not because of one or two power switches being broken, the output voltages and currents are similar to the reference voltages and currents. Therefore, the simulation results verify the feasibility and effectiveness of the proposed secondary reconfigurable inverter topology and control strategy.

Experimental Results and Discussion
To further verify the feasibility and effectiveness of the proposed circuit topology of secondary reconfigurable inverter for the islanded microgrid, the experimental platform of the reconfigurable inverter was built. The system parameters were the same as the simulation parameters. DSP(digital signal processor) TMS320F2812 was used to generate pulses for the fault-tolerant inverter. Images of the experimental setups are shown in Figure 8. The main circuit board has a good and compact structural layout. The DC side voltages are provided by the rectifier. The loads are the resistors. When the DC side voltage is set as 400 V and without reconfigurable structure in the inverter, Figure 6a1,b1,c1 show output voltages, currents and deviations between the output voltage with the reference voltage corresponding to faulty phase a, respectively. Figure 6a2,b2,c2 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase b, respectively. Figure 6a3,b3,c3 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase c, respectively. It can be seen from the waveforms that the inverter voltages and the currents of the inverter are the expected standard sinusoidal waves when the inverter is running in the normal state at 0-0.1 s. Moreover, the deviation among the inverter output voltage with reference voltage is very small at about 3 V. After 0.1 s, the inverter is running in the faulty state. The inverter output voltage and output current are seriously distorted, and a three-phase imbalance appears. The deviation among inverter output voltage with reference voltage is too large.
Take case 1 in Table 1 as an example to verify the feasibility and validity of the proposed topology and the control algorithm in this simulation. The power switch V 1 is faulty, and the inverter is reconstructed from TPSS to TPFS to be fault-tolerant. The DC voltage is set as 800 V in the reconfigurable inverter. Figure 7a-c are output voltages, currents and deviations between the output voltage with the reference voltage, respectively. All waveforms can be kept the same before and after the inverter is reconfigured because a power switch is broken at 0.1 s. If another power switch is faulty, the same output voltages and currents are obtained as the results in the first reconfiguration. Figure 7 represents the similar simulating waveforms of other cases in Table 1. That is to say, whether the inverter is reconfigured or not because of one or two power switches being broken, the output voltages and currents are similar to the reference voltages and currents. Therefore, the simulation results verify the feasibility and effectiveness of the proposed secondary reconfigurable inverter topology and control strategy.

Experimental Results and Discussion
To further verify the feasibility and effectiveness of the proposed circuit topology of secondary reconfigurable inverter for the islanded microgrid, the experimental platform of the reconfigurable inverter was built. The system parameters were the same as the simulation parameters. DSP(digital signal processor) TMS320F2812 was used to generate pulses for the fault-tolerant inverter. Images of the experimental setups are shown in Figure 8. The main circuit board has a good and compact structural layout. The DC side voltages are provided by the rectifier. The loads are the resistors. When the DC side voltage is set as 400 V and without reconfigurable structure in the inverter, Figure 6a1,b1,c1 show output voltages, currents and deviations between the output voltage with the reference voltage corresponding to faulty phase a, respectively. Figure 6a2,b2,c2 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase b, respectively. Figure 6a3,b3,c3 show output voltages, currents and deviations between the inverter output voltage with the reference voltage corresponding to faulty phase c, respectively. It can be seen from the waveforms that the inverter voltages and the currents of the inverter are the expected standard sinusoidal waves when the inverter is running in the normal state at 0-0.1 s. Moreover, the deviation among the inverter output voltage with reference voltage is very small at about 3 V. After 0.1 s, the inverter is running in the faulty state. The inverter output voltage and output current are seriously distorted, and a three-phase imbalance appears. The deviation among inverter output voltage with reference voltage is too large.
Take case 1 in Table 1 as an example to verify the feasibility and validity of the proposed topology and the control algorithm in this simulation. The power switch V1 is faulty, and the inverter is reconstructed from TPSS to TPFS to be fault-tolerant. The DC voltage is set as 800 V in the reconfigurable inverter. Figure 7a-c are output voltages, currents and deviations between the output voltage with the reference voltage, respectively. All waveforms can be kept the same before and after the inverter is reconfigured because a power switch is broken at 0.1 s. If another power switch is faulty, the same output voltages and currents are obtained as the results in the first reconfiguration. Figure 7 represents the similar simulating waveforms of other cases in Table 1. That is to say, whether the inverter is reconfigured or not because of one or two power switches being broken, the output voltages and currents are similar to the reference voltages and currents. Therefore, the simulation results verify the feasibility and effectiveness of the proposed secondary reconfigurable inverter topology and control strategy.

Experimental Results and Discussion
To further verify the feasibility and effectiveness of the proposed circuit topology of secondary reconfigurable inverter for the islanded microgrid, the experimental platform of the reconfigurable inverter was built. The system parameters were the same as the simulation parameters. DSP(digital signal processor) TMS320F2812 was used to generate pulses for the fault-tolerant inverter. Images of the experimental setups are shown in Figure 8. The main circuit board has a good and compact structural layout. The DC side voltages are provided by the rectifier. The loads are the resistors. When the DC side voltage is set as 400 V in the non-reconfigurable inverter that is faulty, in phase a, phase b and phase c, the experimental results are shown in Figure 9. Figure 9a1-a3 show output voltages corresponding, respectively, to faulty phase a, b and c with the vertical axis 100 V/grid and horizontal axis 10 ms/grid. Figure 9b1-b3 show output currents corresponding, respectively, to faulty phase a, b and c with the vertical axis 30 A/grid and horizontal axis 10 ms/grid. Figure 9c1-c3 show the voltage deviations between output voltages and reference voltages corresponding, respectively, to faulty phase a, b and c with the vertical axis 50 V/grid and horizontal axis 10 ms/grid. This can be seen from the waveforms being distorted seriously and three-phase imbalance when the inverter is operating in a faulty state. The voltage deviations between output voltages and reference voltages are too large.  When the DC side voltage is set as 400 V in the non-reconfigurable inverter that is faulty, in phase a, phase b and phase c, the experimental results are shown in Figure 9.  When the DC side voltage is set as 400 V in the non-reconfigurable inverter that is faulty, in phase a, phase b and phase c, the experimental results are shown in Figure 9. Figure 9a1-a3 show output voltages corresponding, respectively, to faulty phase a, b and c with the vertical axis 100 V/grid and horizontal axis 10 ms/grid. Figure 9b1-b3 show output currents corresponding, respectively, to faulty phase a, b and c with the vertical axis 30 A/grid and horizontal axis 10 ms/grid. Figure 9c1-c3 show the voltage deviations between output voltages and reference voltages corresponding, respectively, to faulty phase a, b and c with the vertical axis 50 V/grid and horizontal axis 10 ms/grid. This can be seen from the waveforms being distorted seriously and three-phase imbalance when the inverter is operating in a faulty state. The voltage deviations between output voltages and reference voltages are too large.  Take case 1 in Table 1 as an example to verify the feasibility and validity of the proposed topology and the control algorithm. The power switch V 1 is faulty, and the inverter is reconstructed from TPSS to TPFS. Figure 10a1,a2 show output voltages corresponding to faulty phase a with the vertical axis 100 V/grid and horizontal axis 10 ms/grid. Figure 10b1,b2 show output currents corresponding to faulty phase a with the vertical axis 30 A/grid and horizontal axis 10 ms/grid. Figure 10c1,c2 show the voltage deviations between output voltages and reference voltages with the vertical axis 50 V/grid and horizontal axis 10 ms/grid. When the DC side voltage is set as 800 V in the reconfigurable inverter to be fault-tolerant, the experimental results of the changing process from a normal state to fault-tolerant state are shown in Figure 10a1,b1,c1. Since the DC side voltage satisfies all DC voltage conditions, it can be seen that the fault-tolerant waves are similar to the normal ones after the transient state. The inverter output voltages and output currents are standard sinusoidal waves. The deviation among inverter output voltage with reference voltage is small, and the steady experimental results are shown in Figure 10a2-c2. All the output waveforms after the inverter is reconstructed are similar to those in normal states. Other cases in Table 1 have similar results. Experimental results further verified the feasibility and validity of the proposed secondary reconfigurable topology and the control algorithm.
Appl. Sci. 2020, 10, x FOR PEER REVIEW 11 of 13 Take case 1 in Table 1 as an example to verify the feasibility and validity of the proposed topology and the control algorithm. The power switch V1 is faulty, and the inverter is reconstructed from TPSS to TPFS. Figure 10a1,a2 show output voltages corresponding to faulty phase a with the vertical axis 100 V/grid and horizontal axis 10 ms/grid. Figure 10b1,b2 show output currents corresponding to faulty phase a with the vertical axis 30 A/grid and horizontal axis 10 ms/grid. Figure 10c1,c2 show the voltage deviations between output voltages and reference voltages with the vertical axis 50 V/grid and horizontal axis 10 ms/grid. When the DC side voltage is set as 800 V in the reconfigurable inverter to be fault-tolerant, the experimental results of the changing process from a normal state to fault-tolerant state are shown in Figure 10a1,b1,c1. Since the DC side voltage satisfies all DC voltage conditions, it can be seen that the fault-tolerant waves are similar to the normal ones after the transient state. The inverter output voltages and output currents are standard sinusoidal waves. The deviation among inverter output voltage with reference voltage is small, and the steady experimental results are shown in Figure 10a2-c2. All the output waveforms after the inverter is reconstructed are similar to those in normal states. Other cases in Table 1 have similar results. Experimental results further verified the feasibility and validity of the proposed secondary reconfigurable topology and the control algorithm.

Conclusions
This article proposes a novel secondary reconfigurable inverter and the corresponding faultolerant control strategy. When the power semiconductor devices in the inverter are faulty, removing the faulty power semiconductor devices, the remaining power semiconductor devices and the DC source are remodeled to keep the inverter running. The fault-tolerant space is much larger than that of traditional inverter. This article has analyzed the relationship between the DC side voltages in a faulty state and in a normal state, given the corresponding control strategy and the switch-pulse-resetting algorithm. It need not change the control algorithm when the proposed reconfigurable inverter transforms the normal state into the faulty state. The simulation model was built in a normal state and various faulty states. The simulation and experimental results verify the feasibility and effectiveness of the proposed reconfigurable inverter topology structure and the control strategy.

Conclusions
This article proposes a novel secondary reconfigurable inverter and the corresponding faultolerant control strategy. When the power semiconductor devices in the inverter are faulty, removing the faulty power semiconductor devices, the remaining power semiconductor devices and the DC source are remodeled to keep the inverter running. The fault-tolerant space is much larger than that of traditional inverter. This article has analyzed the relationship between the DC side voltages in a faulty state and in a normal state, given the corresponding control strategy and the switch-pulse-resetting algorithm. It need not change the control algorithm when the proposed reconfigurable inverter transforms the normal state into the faulty state. The simulation model was built in a normal state and various faulty states. The simulation and experimental results verify the feasibility and effectiveness of the proposed reconfigurable inverter topology structure and the control strategy.

Conflicts of Interest:
The authors declare no conflict of interest.